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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 847 records · Page 47
All sourcesNASA NTRSDOE OSTI
DOE OSTI2014

Traffic information computing platform for big data

Big data environment create data conditions for improving the quality of traffic information service. The target of this article is to construct a traffic information computing platform for big data environment. Through in-depth analysis the connotation and technology characteristics of big data and traffic information service, a distributed traffic atomic information computing platform architecture is proposed. Under the big data environment, this type of traffic atomic information computing architecture helps to guarantee the traffic safety and efficient operation, more intelligent and personalized traffic information service can be used for the traffic information users.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS2003

Evaluation of Cache-based Superscalar and Cacheless Vector Architectures for Scientific Computations

The growing gap between sustained and peak performance for scientific applications has become a well-known problem in high performance computing. The recent development of parallel vector systems offers the potential to bridge this gap for a significant number of computational science codes and deliver a substantial increase in computing capabilities. This paper examines the intranode performance of the NEC SX6 vector processor and the cache-based IBM Power3/4 superscalar architectures across a number of key scientific computing areas. First, we present the performance of a microbenchmark suite that examines a full spectrum of low-level machine characteristics. Next, we study the behavior of the NAS Parallel Benchmarks using some simple optimizations. Finally, we evaluate the perfor- mance of several numerical codes from key scientific computing domains. Overall results demonstrate that the SX6 achieves high performance on a large fraction of our application suite and in many cases significantly outperforms the RISC-based architectures. However, certain classes of applications are not easily amenable to vectorization and would likely require extensive reengineering of both algorithm and implementation to utilize the SX6 effectively.

Oliker, Leonid↗
NASA NTRS1989

A language comparison for scientific computing on MIMD architectures

Choleski's method for solving banded symmetric, positive definite systems is implemented on a multiprocessor computer using three FORTRAN based parallel programming languages, the Force, PISCES and Concurrent FORTRAN. The capabilities of the language for expressing parallelism and their user friendliness are discussed, including readability of the code, debugging assistance offered, and expressiveness of the languages. The performance of the different implementations is compared. It is argued that PISCES, using the Force for medium-grained parallelism, is the appropriate choice for programming Choleski's method on the multiprocessor computer, Flex/32.

Jones, Mark T.↗
NASA NTRS1990

A robust self-starting explicit computational methodology for structural dynamic applications - Architecture and representations

A robust self-starting explicit architecture for computational structural dynamics is described. The proposed methodology involves expressing the governing equations of motion in conservation form and temporal discretization is accomplished in the spirit of the Lax-Wendroff type formulations. The development of the basic methodology is shown. Discretization in space is accomplished by introducing stress-based representations and employing the classical Galerkin scheme. Numerical test model results are presented which validate the architecture.

Tamma, Kumar K.↗
NASA NTRS2002

Project Integration Architecture (PIA) and Computational Analysis Programming Interface (CAPRI) for Accessing Geometry Data from CAD Files

Integration of a supersonic inlet simulation with a computer aided design (CAD) system is demonstrated. The integration is performed using the Project Integration Architecture (PIA). PIA provides a common environment for wrapping many types of applications. Accessing geometry data from CAD files is accomplished by incorporating appropriate function calls from the Computational Analysis Programming Interface (CAPRI). CAPRI is a CAD vendor neutral programming interface that aids in acquiring geometry data directly from CAD files. The benefits of wrapping a supersonic inlet simulation into PIA using CAPRI are; direct access of geometry data, accurate capture of geometry data, automatic conversion of data units, CAD vendor neutral operation, and on-line interactive history capture. This paper describes the PIA and the CAPRI wrapper and details the supersonic inlet simulation demonstration.

Benyo, Theresa L.↗
DOE OSTI2023

Advances in SRF cavity architectures for quantum computing

Superconducting radio frequency (SRF) cavities offer an excellent platform for storing and processing quantum information due to their exceptionally long lifetimes and large accessible Hilbert spaces. A common strategy to manipulate the quantum states is to use a nonlinear element like a transmon. Nevertheless, constructing a 3D SRF architecture with sustained cavity lifetimes presents several challenges. In this talk, we present our successful integration of transmons with single-cell Nb SRF cavities, enabling the preparation of several non-classical states. Preliminary results reveal the potential of this platform to build a qudit-based quantum computer, departing from traditional qubit-based architectures. We discuss strategies to enhance coherence times, develop high-fidelity gate schemes, and expand the system for constructing a multi-qudit quantum processor. Furthermore, we explore how this architecture can bolster dark matter detection efficiency through multi-photon quantum state preparation.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
NASA NTRSDate not supplied

Zero-Trust Architecture for Autonomous Edge Computing

We are at the apex of an aviation revolution where autonomy will play a central role in enabling complex, multi-agent systems to communicate, interact, and collaborate on a myriad of applications spanning autonomous swarms to wild-fire management. Autonomy is not an absolute but rather a spectrum ranging from a system requiring significant human intervention to one requiring little to none [1]. For example, the extreme, in the case of an autonomous aircraft, is one that operates independently in the airspace interacting with all other elements (air traffic controllers, other pilots) as if it were a human pilot. Critical to this vision is an architecture that enables autonomous agents to interact with minimal latency. Edge computing is an emerging architecture where compute and storage is pushed to the ‘edge’ of the network in order to minimize the round-trip time from agent to resource thereby mitigating the latency associated with cloud-only based approaches. Additionally, services can generate massive amounts of data (e.g., video feeds), which may require analysis in near real-time. Moving this data to the cloud for further processing may not be feasible due to latency, bandwidth, and cost. Privacy, security, and reliability can also be improved by edge computing architectures. However, this geo-distributed and dynamic* architecture complicates the establishment of unambiguous network security boundaries and can lead to vulnerabilities including man in the middle attacks, replay attacks, physical security breaches of edge nodes, signal interception, etc. This motivates the need for zero-trust architectures [2–4] which de-emphasize the notion of static network perimeters and, as the name implies, do not instill any innate trust in any particular agent. It is required that all agents must be authorized and approved in every transaction. In this paper, we present a zero-trust architecture suitable for edge-computing applications that demand significant low-latency, security, privacy, and reliability.

zero trust↗
DOE OSTI2023

Advances in SRF qubit architectures for quantum computing

Superconducting radio frequency (SRF) cavities provide an excellent platform for storing quantum information as quantum d-level systems (qudits) due to their exceptionally long lifetimes and large accessible Hilbert spaces. A common strategy to manipulate the states is to use a nonlinear element like a transmon. There are, however, several challenges to building a 3D SRF architecture while maintaining a long cavity lifetime. We demonstrate our successful integration of transmons with single-cell Nb SRF cavities and the ability to prepare several non-classical states. Finally, we discuss our strategies to improve the coherence times, gate schemes, and extend the system for building a multi-qudit quantum processor.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2024

Progress on 3D SRF-based architecture for quantum computing

Superconducting radio frequency (SRF) cavities are excellent choices for storing and manipulating quantum information as quantum d-level systems (qudits) due to their exceptionally long lifetimes and large accessible Hilbert spaces. A common strategy to manipulate the states is to use a nonlinear element like a transmon. We present preliminary experimental results obtained with cavity displacements and selective number dependent arbitrary phase gates for universal qudit control, and its application towards High-energy physics (HEP) simulations and beyond. We discuss the advantages and challenges associated with building a 3D SRF architecture while maintaining long cavity lifetimes in the presence of lossy components. We show how the system coherence properties can be preserved by carefully engineering to minimize the participation of the long coherence modes in different loss channels, while ensuring sufficient quantum controllability. We further discuss the path towards building multi-qudit systems.

Romanenko, Alexander↗
DOE OSTI2014

A Compute Capable SSD Architecture for Next-Generation Non-volatile Memories

Existing storage technologies (e.g., disks and ash) are failing to cope with the processor and main memory speed and are limiting the overall perfor- mance of many large scale I/O or data-intensive applications. Emerging fast byte-addressable non-volatile memory (NVM) technologies, such as phase-change memory (PCM), spin-transfer torque memory (STTM) and memristor are very promising and are approaching DRAM-like performance with lower power con- sumption and higher density as process technology scales. These new memories are narrowing down the performance gap between the storage and the main mem- ory and are putting forward challenging problems on existing SSD architecture, I/O interface (e.g, SATA, PCIe) and software. This dissertation addresses those challenges and presents a novel SSD architecture called XSSD. XSSD o oads com- putation in storage to exploit fast NVMs and reduce the redundant data tra c across the I/O bus. XSSD o ers a exible RPC-based programming framework that developers can use for application development on SSD without dealing with the complication of the underlying architecture and communication management. We have built a prototype of XSSD on the BEE3 FPGA prototyping system. We implement various data-intensive applications and achieve speedup and energy ef- ciency of 1.5-8.9 and 1.7-10.27 respectively. This dissertation also compares XSSD with previous work on intelligent storage and intelligent memory. The existing ecosystem and these new enabling technologies make this system more viable than earlier ones.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2018

Performance and Energy Usage of Workloads on KNL and Haswell Architectures. In: High Performance Computing Systems. Performance Modeling, Benchmarking, and Simulation

Manycore architectures are an energy-efficient step towards exascale computing within a constrained power budget. The Intel Knights Landing (KNL) manycore chip is a specific example of this and has seen early adoption by a number of HPC facilities. It is therefore important to understand the performance and energy usage characteristics of KNL. In this paper, we evaluate the performance and energy efficiency of KNL in contrast to the Xeon (Haswell) architecture for applications representative of the workload of users at NERSC. We consider the optimal MPI/OpenMP configuration of each application and use the results to characterize KNL in contrast to Haswell. As well as traditional DDR memory, KNL contains MCDRAM and we also evaluate its efficacy. Our results show that, averaged over our benchmarks, KNL is 1.84 × more energy efficient than Haswell and has 1.27 × greater performance.

Benchmarking↗
DOE OSTI2024

cclib 2.0: An updated architecture for interoperable computational chemistry

Interoperability in computational chemistry is elusive, impeded by the independent development of software packages and idiosyncratic nature of their output files. The cclib library was introduced in 2006 as an attempt to improve this situation by providing a consistent interface to the results of various quantum chemistry programs. The shared API across programs enabled by cclib has allowed users to focus on results as opposed to output and to combine data from multiple programs or develop generic downstream tools. Initial development, however, did not anticipate the rapid progress of computational capabilities, novel methods, and new programs; nor did it foresee the growing need for customizability. Here, we recount this history and present cclib 2, focused on extensibility and modularity. We also introduce recent design pivots—the formalization of cclib’s intermediate data representation as a tree-based structure, a new combinator-based parser organization, and parsed chemical properties as extensible objects.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
NASA NTRS1992

The SURE approach to reliability analysis

The SURE computer program, a reliability-analysis tool for ultrareliable computer-system architectures, provides rapid computational capability for semi-Markov models useful in describing the fault-handling behavior of fault-tolerant computer systems. The basic mathematics of SURE and its user interface are described, including a sample interactive session. The basis of the SURE model-pruning capability is presented, and the SURE loop-truncation method is justified. The techniques used to develop a semi-Markov model of a fault-tolerant computer system are also reviewed.

Butler, Ricky W.↗
NASA NTRS2014

CSP: A Multifaceted Hybrid Architecture for Space Computing

Research on the CHREC Space Processor (CSP) takes a multifaceted hybrid approach to embedded space computing. Working closely with the NASA Goddard SpaceCube team, researchers at the National Science Foundation (NSF) Center for High-Performance Reconfigurable Computing (CHREC) at the University of Florida and Brigham Young University are developing hybrid space computers that feature an innovative combination of three technologies: commercial-off-the-shelf (COTS) devices, radiation-hardened (RadHard) devices, and fault-tolerant computing. Modern COTS processors provide the utmost in performance and energy-efficiency but are susceptible to ionizing radiation in space, whereas RadHard processors are virtually immune to this radiation but are more expensive, larger, less energy-efficient, and generations behind in speed and functionality. By featuring COTS devices to perform the critical data processing, supported by simpler RadHard devices that monitor and manage the COTS devices, and augmented with novel uses of fault-tolerant hardware, software, information, and networking within and between COTS devices, the resulting system can maximize performance and reliability while minimizing energy consumption and cost. NASA Goddard has adopted the CSP concept and technology with plans underway to feature flight-ready CSP boards on two upcoming space missions.

Reconfigurable↗