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At least 847 records · Page 47

Open loop digital frequency multiplier

An open loop digital frequency multiplier is described which has a multiplied output synchronized to low frequency clock pulse. The system includes a multistage digital counter which provides a pulse output as a function of an integer divisor. The integer divisor and the timing or counting cycle of the counter are interrelated to the frequency of a clock input. The counting cycle is controlled by a one shot multivibrator which, in turn, is driven by a reference frequency input.

Moore, R. C.↗

DSN research and technology support

The ongoing activities at the Venus Station (DSS 13) and the Microwave Test Facility (MTF) discussed include: (1) equipment implementation for unattended operation at DSS 13; (2) salvaging of a 20-kW klystron, at a cost savings of several thousand dollars by the DSN High Power Transmitter Facility; (3) extensive tracking activities with the 26-m antenna including DSN Platform Parameters, Multistation Planetary Radar, Helios II Spectrum Broadening Analysis, VLBI Validation, Planetary Radio Astronomy, and Pulsar Rotation Constancy, for a total time of 219-1/4 observing hours; (4) clock synchronization transmissions from the DSS 13 master clock to the overseas 64-m antenna complexes and special implementation activities in support of PV-78; and (5) implementation of a hydrogen maser frequency standard and the pathfinder installation of a utility control system (UCS) and significant station modification and maintenance.

Jackson, E. B.↗

Bit-synchronizer lock detector

Circuit measures phase error that exists in phase-locked loop between clock signal recorded in data on magnetic tape and reconstructed clock signal. Circuit presents error as digital word that can be compared with predetermined threshold to indicate lock status. With simple alterations, circuit can also be used as phase detector.

Huey, D. C.↗

A picosecond resolution Time Digitizer for laser ranging

The Time Digitizer capable of covering a range of 0.34 sec in 9.76 psec increments is described. The time interval between a pair of start-stop pulses is digitized coarsely in 20 nsec periods by a very accurate 50 MHz reference clock. The residual fractions of a clock period at the start and the stop end of the measured interval are stretched in two interpolators and digitized in 9.76 psec increments. An equivalent digitizing frequency of 102.4 GHz is thus achieved. The digitizer is built in a minicrate and communicates via a standard crate controller. It is intended for use in the laser ranging between ground stations and the Laser Geodetic Satellite (LAGEOS). It is shown that the distribution in any two adjacent 9.76 psec channels of a small number of identical test time intervals is essentially binomial. The performance of the digitizer and test results are given.

Turko, B.↗

Investigation of the dynamic range problem and providing software support for the AOL system

The present scheme for providing system timing for the airborne oceanographic lidar (AOL) system is not completely satisfactory. The possibility of using a digital approach to generate the forty pulses needed to energize the gates leading to the charge digitizers was investigated. The solution in terms of general analog and digital circuitry is straightforward. The crystal oscillator provides a stable frequency source which is used as a clock to the ring counter. The ring counter propagates a pulse from stage one to stage forty. Each of the outputs has an amplifier for isolation. This design is easy to implement in the frequency range up to 50 MHZ. Because a gate pulse width of from about 2 to 6 ns is needed for the AOL system, this dictates an input clock frequency to the shift register of from 100 MHA to 500 MHA. Problems associated with generating pulses in this range of operation are examined and an alternate solution is discussed.

Source record↗

Shuttle Global Positioning System (GPS) system design study

The various integration problems in the Shuttle GPS system were investigated. The analysis of the Shuttle GPS link was studied. A preamplifier was designed since the Shuttle GPS antennas must be located remotely from the receiver. Several GPS receiver architecture trade-offs were discussed. The Shuttle RF harmonics and intermode that fall within the GPS receiver bandwidth were analyzed. The GPS PN code acquisition was examined. Since the receiver clock strongly affects both GPS carrier and code acquisition performance, a clock model was developed.

Nilsen, P. W.↗

Submicrosecond comparisons of time standards via the Navigation Technology Satellites (NTS)

An interim demonstration was performed of the time transfer capability of the NAVSTAR GPS system using a single NTS satellite. Measurements of time difference (pseudo-range) are made from the NTS tracking network and at the participating observatories. The NTS network measurements are used to compute the NTS orbit trajectory. The central NTS tracking station has a time link to the Naval Observatory UTC (USNO,MC1) master clock. Measurements are used with the NTS receiver at the remote observatory, the time transfer value UTC (USNO,MC1)-UTC (REMOTE, VIA NTS) is calculated. Intercomparisons were computed using predicted values of satellite clock offset and ephemeus.

Buisson, J. A.↗

Multiple speed expandable bit synchronizer

A multiple speed bit synchronizer was designed for installation in an inertial navigation system data decoder to extract non-return-to-zero level data and clock signal from biphase level data. The circuit automatically senses one of four pre-determined biphase data rates and synchronizes the proper clock rate to the data. Through a simple expansion of the basic design, synchronization of more than four binarily related data rates can be accomplished. The design provides an easily adaptable, low cost, low power alternative to external bit synchronizers with additional savings in size and weight.

Bundinger, J. M.↗

Critique of a Hughes shuttle Ku-band data sampler/bit synchronizer

An alternative bit synchronizer proposed for shuttle was analyzed in a noise-free environment by considering the basic operation of the loop via timing diagrams and by linearizing the bit synchronizer as an equivalent, continuous, phased-lock loop (PLL). The loop is composed of a high-frequency phase-frequency detector which is capable of detecting both phase and frequency errors and is used to track the clock, and a bit transition detector which attempts to track the transitions of the data bits. It was determined that the basic approach was a good design which, with proper implementation of the accumulator, up/down counter and logic should provide accurate mid-bit sampling with symmetric bits. However, when bit asymmetry occurs, the bit synchronizer can lock up with a large timing error, yet be quasi-stable (timing will not change unless the clock and bit sequence drift). This will result in incorrectly detecting some bits.

Holmes, J. K.↗

Shuttle orbiter Ku-band radar/communications system design evaluation. Ku band bent-pipe channel performance evaluation

Because of difficulties with the bit detector of the SPA mode 1 channel 3 input port, a new bit synchronizer was required. The two prime candidate designs are described and analyzed. The selected design is a modification of one which utilizes a phase frequency detector to track the received data clock frequency and a mid-bit transition point sample detector to generate a bit timing error (phase error) signal to control the relative phase between the local clock and the local data stream. The model used to calculate the effects of cable attenuation and rise time degradation is discussed.

Holmes, J. K.↗

Precise time and Time Interval (PTTI) measurements from the navigation technology satellites and the GPS NAVSTAR-4 satellite

A time domain estimate for the NAVSTAR-4 SV clock offset was obtained for each SV pass over the GPS monitor sites, using a smoothed reference ephemeris, with corrections for ionospheric delay, tropospheric delay, earth rotation and relativistic effects. Conversion from the time domain to the frequency domain was made using the two sample Allan Variance; sigma-tau plots used to identify the noise processes. Estimates of flicker and white frequency noise for the NAVSTAR-4 rubidium frequency standard were obtained. The contribution of the reference ground clocks and other error sources to the frequency stability estimates were also considered.

Buisson, J. A.↗

Geodetic positioning using a global positioning system of satellites

Geodetic positioning using range, integrated Doppler, and interferometric observations from a constellation of twenty-four Global Positioning System satellites is analyzed. A summary of the proposals for geodetic positioning and baseline determination is given which includes a description of measurement techniques and comments on rank deficiency and error sources. An analysis of variance comparison of range, Doppler, and interferometric time delay to determine their relative geometric strength for baseline determination is included. An analytic examination to the effect of a priori constraints on positioning using simultaneous observations from two stations is presented. Dynamic point positioning and baseline determination using range and Doppler is examined in detail. Models for the error sources influencing dynamic positioning are developed. Included is a discussion of atomic clock stability, and range and Doppler observation error statistics based on random correlated atomic clock error are derived.

Fell, P. J.↗

Digital numerically controlled oscillator

The frequency and phase of an output signal from an oscillator circuit are controlled with accuracy by a digital input word. Positive and negative alterations in output frequency are both provided for by translating all values of input words so that they are positive. The oscillator reference frequency is corrected only in one direction, by adding phase to the output frequency of the oscillator. The input control word is translated to a single algebraic sign and the digital 1 is added thereto. The translated input control word is then accumulated. A reference clock signal having a frequency at an integer multiple of the desired frequency of the output signal is generated. The accumulated control word is then compared with a threshold level. The output signal is adjusted in a single direction by dividing the frequency of the reference clock signal by a first integer or by an integer different from the first integer.

Cellier, A.↗

Innovation and reliability of atomic standards for PTTI applications

Innovation and reliability in hyperfine frequency standards and clock systems are discussed. Hyperfine standards are defined as those precision frequency sources and clocks which use a hyperfine atomic transition for frequency control and which have realized significant commercial production and acceptance (cesium, hydrogen, and rubidium atoms). References to other systems such as thallium and ammonia are excluded since these atomic standards have not been commercially exploited in this country.

Kern, R.↗

PTTI applications at Hydro-Quebec

As a power utility, Hydro-Quebec used the PTTI techniques. The time dissemination system in the Hydro-Quebec Network (11th PTTI) is now installed in several points. A portable clock was built using a rubidium standard and associated circuitry which are necessary for the measurements. The apparatus and the experimental results obtained are described. The use of GOES synchronized clocks for making precise voltage angle measurement on the Hydro-Quebec Network is discussed. Some modifications were made on a commercial unit. Applications and results are presented.

Missout, G.↗

The operational performance of hydrogen masers in the deep space network: The performance of laboratory reference frequency standards in an operational environment

Hydrogen masers used as aids in meeting the routine frequency and time operational requirements within the 64 m antenna Deep Space Network. Both the operational syntonation (frequency synchronization) and the the clock (epoch) synchronization requirements were established through the use of specifically calibrated H-P E215061A flying clock. The sync/synt to UTC was maintained using LORAN and TV in simultaneous reception mode. The sync/synt within the 64 m net was maintained through the use of very long base interferometry. Results indicate that the hydrogen masers perform well within the required specifications.

Ward, S. C.↗

Time delay and integration detectors using charge transfer devices

An imaging system comprises a multi-channel matrix array of CCD devices wherein a number of sensor cells (pixels) in each channel are subdivided and operated in discrete intercoupled groups of subarrays with a readout CCD shift register terminating each end of the channels. Clock voltages, applied to the subarrays, selectively cause charge signal flow in each subarray in either direction independent of the other subarrays. By selective application of four phase clock voltages, either one, two or all three of the sections subarray sections cause charge signal flow in one direction, while the remainder cause charge signal flow in the opposite direction. This creates a form of selective electronic exposure control which provides an effective variable time delay and integration of three, six or nine sensor cells or integration stages. The device is constructed on a semiconductor sustrate with a buried channel and is adapted for front surface imaging through transparent doped tin oxide gates.

Mccann, D. H.↗

Transport Control for High-Density Digital Recorder

Tape capstan drive motor speed controlled by phase-locked loop to keep data rate off of tape compatible with demand clock rate preventing deskewbuffer overflow or underflow. Immunity to speed perturbations caused by data dropouts is obtained by switching to different data-channel reference signal whenever dropout is detected by frame synchronizer in channel currently in use. Desired tape speed is selected by changing frequency of demand rate clock and changing divisor N in programable divider.

Matlin, M. D.↗