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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 847 records · Page 47
All sourcesNASA NTRSDOE OSTI
DOE OSTI2016

Metal-induced crystallization of amorphous zinc tin oxide semiconductors for high mobility thin-film transistors

Transition tantalum induced crystallization of amorphous zinc tin oxide (a-ZTO) was observed at low temperature annealing of 300 °C. Thin-film transistors (TFTs) with an a-ZTO channel layer exhibited a reasonable field-effect mobility of 12.4 cm{sup 2}/V s, subthreshold swing (SS) of 0.39 V/decade, threshold voltage (V{sub TH}) of 1.5 V, and I{sub ON/OFF} ratio of ∼10{sup 7}. A significant improvement in the field-effect mobility (up to ∼33.5 cm{sup 2}/V s) was achieved for crystallized ZTO TFTs: this improvement was accomplished without compromising the SS, V{sub TH}, or I{sub ON/OFF} ratio due to the presence of a highly ordered microstructure.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

High reliable and stable organic field-effect transistor nonvolatile memory with a poly(4-vinyl phenol) charge trapping layer based on a pn-heterojunction active layer

In this letter, we demonstrate a high reliable and stable organic field-effect transistor (OFET) based nonvolatile memory (NVM) with a polymer poly(4-vinyl phenol) (PVP) as the charge trapping layer. In the unipolar OFETs, the inreversible shifts of the turn-on voltage (V{sub on}) and severe degradation of the memory window (ΔV{sub on}) at programming (P) and erasing (E) voltages, respectively, block their application in NVMs. The obstacle is overcome by using a pn-heterojunction as the active layer in the OFET memory, which supplied a holes and electrons accumulating channel at the supplied P and E voltages, respectively. Both holes and electrons transferring from the channels to PVP layer and overwriting the trapped charges with an opposite polarity result in the reliable bidirectional shifts of V{sub on} at P and E voltages, respectively. The heterojunction OFET exhibits excellent nonvolatile memory characteristics, with a large ΔV{sub on} of 8.5 V, desired reading (R) voltage at 0 V, reliable P/R/E/R dynamic endurance over 100 cycles and a long retention time over 10 years.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Influence of the charge trap density distribution in a gate insulator on the positive-bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors

We investigated the positive-bias stress (PBS) instability of thin film transistors (TFTs) composed of different types of first-gate insulators, which serve as a protection layer of the active surface. Two different deposition methods, i.e., the thermal atomic layer deposition (THALD) and plasma-enhanced ALD (PEALD) of Al{sub 2}O{sub 3}, were applied for the deposition of the first GI. When THALD was used to deposit the GI, amorphous indium-gallium-zinc oxide (a-IGZO) TFTs showed superior stability characteristics under PBS. For example, the threshold voltage shift (ΔV{sub th}) was 0 V even after a PBS time (t{sub stress}) of 3000 s under a gate voltage (V{sub G}) condition of 5 V (with an electrical field of 1.25 MV/cm). On the other hand, when the first GI was deposited by PEALD, the ΔV{sub th} value of a-IGZO TFTs was 0.82 V after undergoing an identical amount of PBS. In order to interpret the disparate ΔV{sub th} values resulting from PBS quantitatively, the average oxide charge trap density (N{sub T}) in the GI and its spatial distribution were investigated through low-frequency noise characterizations. A higher N{sub T} resulted during in the PEALD type GI than in the THALD case. Specifically, the PEALD process on a-IGZO layer surface led to an increasing trend of N{sub T} near the GI/a-IGZO interface compared to bulk GI owing to oxygen plasma damage on the a-IGZO surface.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Large electron concentration modulation using capacitance enhancement in SrTiO{sub 3}/SmTiO{sub 3} Fin-field effect transistors

Solid-state modulation of 2-dimensional electron gases (2DEGs) with extreme (∼3.3 × 10{sup 14 }cm{sup −2}) densities corresponding to 1/2 electron per interface unit cell at complex oxide heterointerfaces (such as SrTiO{sub 3}/GdTiO{sub 3} or SrTiO{sub 3}/SmTiO{sub 3}) is challenging because it requires enormous gate capacitances. One way to achieve large gate capacitances is by geometrical capacitance enhancement in fin structures. In this work, we fabricate both Au-gated planar field effect transistors (FETs) and Fin-FETs with varying fin-widths on 60 nm SrTiO{sub 3}/5 nm SmTiO{sub 3} thin films grown by hybrid molecular beam epitaxy. We find that the FinFETs exhibit higher gate capacitance compared to planar FETs. By scaling down the SrTiO{sub 3}/SmTiO{sub 3} fin widths, we demonstrate further gate capacitance enhancement, almost twice compared to the planar FETs. In the FinFETs with narrowest fin-widths, we demonstrate a record 2DEG electron concentration modulation of ∼2.4 × 10{sup 14 }cm{sup −2}.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Exploration of vertical scaling limit in carbon nanotube transistors

Top-gated carbon nanotube field-effect transistors (CNT FETs) were fabricated by using ultra-thin (4.5 nm or thinner) atomic-layer-deposition grown HfO{sub 2} as gate insulator, and shown to exhibit high gate efficiency, i.e., all examined (totally 76) devices present very low room temperature subthreshold swing with an averaged value of 64 mV/Dec, without observable carrier mobility degradation. The gate leakage of the CNT FET under fixed gate voltage is dependent not only on the thickness of HfO{sub 2} insulator, but also on the diameter of the CNT. The vertical scaling limit of CNT FETs is determined by gate leakage standard in ultra large scale integrated circuits. HfO{sub 2} film with effective oxide thickness of 1.2 nm can provide both excellent gate electrostatic controllability and small gate leakage for sub-5 nm FETs based on CNT with small diameter.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Analysis of plasma-modes of a gated bilayer system in high electron mobility transistors

We present rigorous analytical and computational models to study the plasma-waves in a gated-bilayer system present in a double-channel high electron mobility transistor. By analytically deriving the dispersion relations, we have identified the optical and acoustic modes in such systems. We find that the presence of the metal gate selectively modifies the optical plasmons of an ungated-bilayer, while the acoustic plasmons remain largely unchanged. Analysis shows that these modified optical plasmons could be advantageous for resonant and non-resonant plasma-wave devices. The paper further serves to verify our analytical formulae using a full-wave hydrodynamic numerical solver, based on finite difference time domain algorithm. Using the solver, we examine these modes in the gated/ungated bilayers under a plane wave excitation. We observe that, most incident power couples to the optical mode for such an excitation. Nevertheless, acoustic modes can also be excited, if the discontinuity dimensions are optimized accordingly. These observations are also explained using 2D field-plots for the first time, thus providing intuitive understanding of the plasmon excitation in the bilayers.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Enhancement of carrier mobility in MoS{sub 2} field effect transistors by a SiO{sub 2} protective layer

Molybdenum disulfide is a promising channel material for field effect transistors (FETs). In this paper, monolayer MoS{sub 2} grown by chemical vapor deposition (CVD) was used to fabricate top-gate FETs through standard optical lithography. During the fabrication process, charged impurities and interface states are introduced, and the photoresist is not removed cleanly, which both limit the carrier mobility and the source-drain current. We apply a SiO{sub 2} protective layer, which is deposited on the surface of MoS{sub 2}, in order to avoid the MoS{sub 2} directly contacting with the photoresist and the ambient environment. Therefore, the contact property between the MoS{sub 2} and the electrodes is improved, and the Coulomb scattering caused by the charged impurities and the interface states is reduced. Comparing MoS{sub 2} FETs with and without a SiO{sub 2} protective layer, the SiO{sub 2} protective layer is found to enhance the characteristics of the MoS{sub 2} FETs, including transfer and output characteristics. A high mobility of ∼42.3 cm{sup 2}/V s is achieved, which is very large among the top-gate CVD-grown monolayer MoS{sub 2} FETs.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Low-frequency noise in AlTiO/AlGaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors

Using aluminum titanium oxide (AlTiO, an alloy of Al{sub 2}O{sub 3} and TiO{sub 2}) as a high-k gate insulator, we fabricated and investigated AlTiO/AlGaN/GaN metal-insulator-semiconductor heterojunction field-effect transistors. From current low-frequency noise (LFN) characterization, we find Lorentzian spectra near the threshold voltage, in addition to 1/f spectra for the well-above-threshold regime. The Lorentzian spectra are attributed to electron trapping/detrapping with two specific time constants, ∼25 ms and ∼3 ms, which are independent of the gate length and the gate voltage, corresponding to two trap level depths of 0.5–0.7 eV with a 0.06 eV difference in the AlTiO insulator. In addition, gate leakage currents are analyzed and attributed to the Poole-Frenkel mechanism due to traps in the AlTiO insulator, where the extracted trap level depth is consistent with the Lorentzian LFN.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Boost up the electrical performance of InGaZnO thin film transistors by inserting an ultrathin InGaZnO:H layer

This study examined the electrical performance of bilayer channel InGaZnO:H/InGaZnO thin-film transistors (TFTs). The field-effect mobility and bias stress stability of the InGaZnO device were improved by inserting the hydrogenated InGaZnO ultrathin layer compared to the pure InGaZnO single channel layer device. As a consequence, a high field-effect mobility of 55.3 cm{sup 2}/V s, a high on/off current ratio of 10{sup 8}, a threshold voltage of 0.7 V, and a small sub-threshold swing of 0.18 V/decade have been achieved. The X-ray photoelectron spectroscopy and low-frequency noise analysis suggest that these desirable properties should be attributed to the ultrathin InGaZnO:H layer, which could provide suitable carrier concentration and reduce the average trap density near the channel and insulator layer interface. Meanwhile, the channel conductance of the bilayer device is controlled by thick InGaZnO layer through formation barrier energy for electron transport at the interface of InGaZnO:H and InGaZnO layer. These improved electrical properties have represented a great step towards the achievement of transparent, high performances, and low-cost metal oxide TFTs.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Dynamical heat transport amplification in a far-field thermal transistor of VO{sub 2} excited with a laser of modulated intensity

Far-field radiative heat transport in a thermal transistor made up of a vanadium dioxide base excited with a laser of modulated intensity is analytically studied and optimized. This is done by solving the equation of energy conservation for the steady-state and modulated components of the temperature and heat fluxes that the base exchanges with the collector and emitter. The thermal bistability of VO{sub 2} is used to find an explicit condition on the laser intensity required to maximize these heat fluxes to values higher than the incident flux. For a 1 μm-thick base heated with a modulation frequency of 0.5 Hz, it is shown that both the DC and AC components of the heat fluxes are about 4 times the laser intensity, while the AC temperature remains an order of magnitude smaller than the DC one at around 343 K. Higher AC heat fluxes are obtained for thinner bases and/or lower frequencies. Furthermore, we find that out of the bistability temperatures associated with the dielectric-to-metal and metal-to-dielectric transitions of VO{sub 2}, the amplification of the collector-to-base and base-to-emitter heat fluxes is still possible, but at modulation frequencies lower than 0.1 Hz.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Metal oxide semiconductor thin-film transistors for flexible electronics

The field of flexible electronics has rapidly expanded over the last decades, pioneering novel applications, such as wearable and textile integrated devices, seamless and embedded patch-like systems, soft electronic skins, as well as imperceptible and transient implants. The possibility to revolutionize our daily life with such disruptive appliances has fueled the quest for electronic devices which yield good electrical and mechanical performance and are at the same time light-weight, transparent, conformable, stretchable, and even biodegradable. Flexible metal oxide semiconductor thin-film transistors (TFTs) can fulfill all these requirements and are therefore considered the most promising technology for tomorrow's electronics. This review reflects the establishment of flexible metal oxide semiconductor TFTs, from the development of single devices, large-area circuits, up to entirely integrated systems. First, an introduction on metal oxide semiconductor TFTs is given, where the history of the field is revisited, the TFT configurations and operating principles are presented, and the main issues and technological challenges faced in the area are analyzed. Then, the recent advances achieved for flexible n-type metal oxide semiconductor TFTs manufactured by physical vapor deposition methods and solution-processing techniques are summarized. In particular, the ability of flexible metal oxide semiconductor TFTs to combine low temperature fabrication, high carrier mobility, large frequency operation, extreme mechanical bendability, together with transparency, conformability, stretchability, and water dissolubility is shown. Afterward, a detailed analysis of the most promising metal oxide semiconducting materials developed to realize the state-of-the-art flexible p-type TFTs is given. Next, the recent progresses obtained for flexible metal oxide semiconductor-based electronic circuits, realized with both unipolar and complementary technology, are reported. In particular, the realization of large-area digital circuitry like flexible near field communication tags and analog integrated circuits such as bendable operational amplifiers is presented. The last topic of this review is devoted for emerging flexible electronic systems, from foldable displays, power transmission elements to integrated systems for large-area sensing and data storage and transmission. Finally, the conclusions are drawn and an outlook over the field with a prediction for the future is provided.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

High performance and transparent multilayer MoS{sub 2} transistors: Tuning Schottky barrier characteristics

Various strategies and mechanisms have been suggested for investigating a Schottky contact behavior in molybdenum disulfide (MoS{sub 2}) thin-film transistor (TFT), which are still in much debate and controversy. As one of promising breakthrough for transparent electronics with a high device performance, we have realized MoS{sub 2} TFTs with source/drain electrodes consisting of transparent bi-layers of a conducting oxide over a thin film of low work function metal. Intercalation of a low work function metal layer, such as aluminum, between MoS{sub 2} and transparent source/drain electrodes makes it possible to optimize the Schottky contact characteristics, resulting in about 24-fold and 3 orders of magnitude enhancement of the field-effect mobility and on-off current ratio, respectively, as well as transmittance of 87.4 % in the visible wavelength range.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2016

Simulation of a spiking neuron circuit using carbon nanotube transistors

Neuromorphic engineering is related to the existing analogies between the physical semiconductor VLSI (Very Large Scale Integration) and biophysics. Neuromorphic systems propose to reproduce the structure and function of biological neural systems for transferring their calculation capacity on silicon. Since the innovative research of Carver Mead, the neuromorphic engineering continues to emerge remarkable implementation of biological system. This work presents a simulation of an elementary neuron cell with a carbon nanotube transistor (CNTFET) based technology. The model of the cell neuron which was simulated is called integrate and fire (I&F) model firstly introduced by G. Indiveri in 2009. This circuit has been simulated with CNTFET technology using ADS environment to verify the neuromorphic activities in terms of membrane potential. This work has demonstrated the efficiency of this emergent device; i.e CNTFET on the design of such architecture in terms of power consumption and technology integration density.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2016

High performance p-type NiO{sub x} thin-film transistor by Sn doping

Major obstacles towards power efficient complementary electronics employing oxide thin-film transistors (TFTs) lie in the lack of equivalent well performing p-channel devices. Here, we report a significant performance enhancement of solution-processed p-type nickel oxide (NiO{sub x}) TFTs by introducing Sn dopant. The Sn-doped NiO{sub x} (Sn-NiO{sub x}) TFTs annealed at 280 °C demonstrate substantially improved electrical performances with the increase in the on/off current ratio (I{sub on}/I{sub off}) by ∼100 times, field-effect mobility (μ{sub lin}) by ∼3 times, and the decrease in subthreshold swing by half, comparing with those of pristine NiO{sub x} TFTs. X-ray photoelectron spectroscopy and X-ray diffraction results confirm that Sn atoms tend to substitute Ni sites and induce more amorphous phase. A decrease in density of states in the gap of NiO{sub x} by Sn doping and the shift of Fermi level (E{sub F}) into the midgap lead to the improvements of TFT performances. As a result, Sn-NiO{sub x} can be a promising material for the next-generation, oxide-based electronics.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

H-terminated diamond field effect transistor with ferroelectric gate insulator

An H-terminated diamond field-effect-transistor (FET) with a ferroelectric vinylidene fluoride (VDF)-trifluoroethylene (TrFE) copolymer gate insulator was fabricated. The VDF-TrFE film was deposited on the H-terminated diamond by the spin-coating method and low-temperature annealing was performed to suppress processing damage to the H-terminated diamond surface channel layer. The fabricated FET structure showed the typical properties of depletion-type p-channel FET and showed clear saturation of the drain current with a maximum value of 50 mA/mm. The drain current versus gate voltage curves of the proposed FET showed clockwise hysteresis loops due to the ferroelectricity of the VDF-TrFE gate insulator, and the memory window width was 19 V, when the gate voltage was swept from 20 to −20 V. The maximum on/off current ratio and the linear mobility were 10{sup 8} and 398 cm{sup 2}/V s, respectively. In addition, we modulated the drain current of the fabricated FET structure via the remnant polarization of the VDF-TrFE gate and obtained an on/off current ratio of 10{sup 3} without applying a DC gate voltage.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Nano-crystallization in ZnO-doped In{sub 2}O{sub 3} thin films via excimer laser annealing for thin-film transistors

In a previous work, we reported the high field effect mobility of ZnO-doped In{sub 2}O{sub 3} (IZO) thin film transistors (TFTs) irradiated by excimer laser annealing (ELA) [M. Fujii et al., Appl. Phys. Lett. 102, 122107 (2013)]. However, a deeper understanding of the effect of ELA on the IZO film characteristics based on crystallinity, carrier concentrations, and optical properties is needed to control localized carrier concentrations for fabricating self-aligned structures in the same oxide film and to adequately explain the physical characteristics. In the case of as-deposited IZO film used as the channel, a high carrier concentration due to a high density of oxygen vacancies was observed; such a film does not show the required TFT characteristics but can act as a conductive film. We achieved a decrease in the carrier concentration of IZO films by crystallization using ELA. This means that ELA can form localized conductive or semi-conductive areas on the IZO film. We confirmed that the reason for the carrier concentration decrease was the decrease of oxygen-deficient regions and film crystallization. The annealed IZO films showed nano-crystalline phase, and the temperature at the substrate was substantially less than the temperature limit for flexible films such as plastic, which is 50°C. This paves the way for the formation of self-aligned structures and separately formed conductive and semi-conductive regions in the same oxide film.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2016

Nanogranular SiO{sub 2} proton gated silicon layer transistor mimicking biological synapses

Silicon on insulator (SOI)-based transistors gated by nanogranular SiO{sub 2} proton conducting electrolytes were fabricated to mimic synapse behaviors. This SOI-based device has both top proton gate and bottom buried oxide gate. Electrical transfer properties of top proton gate show hysteresis curves different from those of bottom gate, and therefore, excitatory post-synaptic current and paired pulse facilitation (PPF) behavior of biological synapses are mimicked. Moreover, we noticed that PPF index can be effectively tuned by the spike interval applied on the top proton gate. Synaptic behaviors and functions, like short-term memory, and its properties are also experimentally demonstrated in our device. Such SOI-based electronic synapses are promising for building neuromorphic systems.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Suppression of photo-bias induced instability for amorphous indium tungsten oxide thin film transistors with bi-layer structure

This study investigates the instability induced by bias temperature illumination stress (NBTIS) for an amorphous indium-tungsten-oxide thin film transistor (a-IWO TFT) with SiO{sub 2} backchannel passivation layer (BPL). It is found that this electrical degradation phenomenon can be attributed to the generation of defect states during the BPL process, which deteriorates the photo-bias stability of a-IWO TFTs. A method proposed by adding an oxygen-rich a-IWO thin film upon the a-IWO active channel layer could effectively suppress the plasma damage to channel layer during BPL deposition process. The bi-layer a-IWO TFT structure with an oxygen-rich back channel exhibits superior electrical reliability of device under NBTIS.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗