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Silicon controlled rectifier opens circuit with currents flowing up to values of 30 amperes. Switching concept halves both current and voltage in middle of commutating cycle thereby lowering size and weight requirements. Commutating circuit can be turned on or off by command and will remain on in absence of load due to continuous gate.
Unlimited channel capacity multiplexing circuit is hierarchially structured to achieve priority encoding. Circuit could be used for automatic patient monitoring systems and diagnostic test systems in automotive and communications industry.
Cavity-dumped lasers employ electrooptic-effect cell to alternately block and release laser pulse. Cell requires high-speed switching circuit that can apply and remove high voltage. Solid-state circuit employs complementary transistor switches which can switch at rates greater than 5 kHz, eliminate warmup time, provide variable voltage wave-form, and allow polarity reversal.
Circuit was developed to prevent accidental shock through electrodes used to test subjects as part of Skylab program. This circuit is placed between electrical apparatus and electrode that is attached to patient's body. Thus, patient is effectively protected from dangerous electrical shock that might be caused by failure in electrical apparatus.
Circuit was developed which can stretch pulses in 50- to 3200-ns range to make them acceptable for pulse-height analyzers. Circuit uses high-speed wide-band amplifier, does not need excessive frequency compensation, and can handle pulses one-tenth of width normally required by pulse analyzers.
Low-cost, inductorless, high Q active-tuning circuit can be made by coupling pair of transistors and their supporting circuitry to take advantage of frequency dependent energy storage effects. Circuit may be manufactured by standard micro-electronic techniques; has very low noise factor; and input-output matching networks are not necessary.
Hybrid circuitry can be installed into standard round bayonet connectors, to eliminate wiring from connector to circuit. Circuits can be connected directly into either section of connector pair, eliminating need for hard wiring to that section.
High-speed switching circuit protects detectors from sudden, extremely-intense backscattered radiation that results from short-range atmospheric dust layers, or low-level clouds, entering laser/radar field of view. Function of circuit is to provide computer-controlled switching of photodiode detector, preamplifier power-supply voltages, in approximately 10 nanoseconds.
When a medium- or large-scale integrated circuit is designed, efforts are usually made to avoid the use of resistor-capacitor time constant generators. The capacitor needed for this circuit usually takes up more surface area on the chip than several resistors and transistors. When the use of this network is unavoidable, the designer usually makes an effort to see that the choice of resistor and capacitor combinations is such that a minimum amount of surface area is consumed. The optimum ratio of resistance to capacitance that will result in this minimum area is equal to the ratio of resistance to capacitance which may be obtained from a unit of surface area for the particular process being used. The minimum area required is a function of the square root of the reciprocal of the products of the resistance and capacitance per unit area. This minimum occurs when the area required by the resistor is equal to the area required by the capacitor.
A signal-to-noise ratio (SNR) determination of an input is described, having signal components within a given frequency range and noise components, without actual measurement of the noise components. Bandpass limiter having a constant signal plus noise output level is connected to the output of the first filter, the signal-to-noise ratio of the input to the bandpass limiter being linearly related to the dbm level of signal components at the output. Calibration is connected to the bandpass limiter and is responsive to the signal components at the output to derive the SNR of the input to the determination circuit. The SNR determination circuit is disclosed for use in a diversity receiver having a plurality of input channels.
A circuit for suppressing parasitic oscillations across an inductor operating in a resonant mode is described. The circuit includes a switch means and resistive means connected serially across the inductor. A unidirectional resistive-capacitive network is also connected across the inductor and to the switch means to automatically render the switch means conducting when inductive current through the inductor ceases to flow.
A mathematical framework is presented for designing logic to accept motion-dependent parameters from a simulation, attenuating them ('washing them out'), and generating appropriately limited drive signals. This framework is sufficiently general to encompass six-degree-of-freedom simulators with large motion capability. Emphasis is placed on preserving certain motion cue relations (such as those that would be observed in coordinated flight). Strategies for simulating side forces via tilts are shown. Finally, several specific circuits are shown. These circuits have proven to be readily adaptable to a variety of moving-base simulators.
Standardized control and interface circuits were applied to the three most commonly used dc to dc converters: the buck-boost converter, the series-switching buck regulator, and the pulse-modulated parallel inverter. The two-loop ASDTIC regulation control concept was implemented by using a common analog control signal processor and a novel digital control signal processor. This resulted in control circuit standardization and superior static and dynamic performance of the three dc-to-dc converters. Power components stress control, through active peak current limiting and recovery of switching losses, was applied to enhance reliability and converter efficiency.
A beam-lead integrated circuit package assembly including a beam-lead integrated circuit chip, a lead frame array bonded to projecting fingers of the chip, a rubber potting compound disposed around the chip, and an encapsulating molded plastic is described. The lead frame array is prepared by photographically printing a lead pattern on a base metal sheet, selectively etching to remove metal between leads, and plating with gold. Joining of the chip to the lead frame array is carried out by thermocompression bonding of mating goldplated surfaces. A small amount of silicone rubber is then applied to cover the chip and bonded joints, and the package is encapsulated with epoxy resin, applied by molding.
The fabrication yield of an on-chip modifiable redundant circuit design for a 100M bit serial shift register is evaluated. The yield model is a redundancy design in which there is a primary loop and a set of secondary loops which can be enabled/disabled without introducing blanks to the data stream. This function has a finite yield, the loop-modification yield factor, which must be greater than 0.9 to make the system more economical than the simple nonredundant design. It is further established that small loop capacities greatly degrade the yield because of the effect of the modification yield factor, while large loop capacities degrade the yield because of defects in the operating area. As the modification yield increases the optimum loop capacity decreases. An optimum value for the number of redundant loops exists for each loop capacity. Other factors that affect the yield are the garnet film and the processed circuit.
A transducer and frequency discriminator circuit is described including a four-terminal circulating diode bridge, a first pair of capacitors connected in series across two terminals of the bridge, and a second pair of capacitors, or other impedance elements, connected in series across the other two terminals of the bridge. A source of balanced alternating electrical energy for energizing the circuit is coupled between the commonly connected plates of the first pair of capacitors and the commonly connected plates of the second pair of capacitors. Due to the operation of the diode bridge, the sum of the resultant charges developed on the first pair of capacitors is proportional to the relationship between the respective capacitors of the second pair, and consequently, an output voltage taken across the first pair of capacitors will be proportional to that relationship.
Testing of large scale integrated (LSI) logic circuits was considered from the point of view of automatic test pattern generation. A system for automatic test pattern generation is described. A test generation algorithm is presented that can be applied to both combinational and sequential logic circuits. Also included is a programmed implementation of the algorithm and sample results from the program.
An electron emission control circuit of the switching regulator type operating at 100 kHz has been developed which maintains a constant emission current within 0.1% for a cathode power demand variation of approximately 100%. The power output stage has an efficiency of 67%, and the overall efficiency is 45% when driving a thoria-coated iridium cathode having a nominal resistance at operating temperature of 2.5 ohms. Under optimum conditions, the bus power demand is 1.75 W. The circuit is useful in controlling the electron emission current of ion sources in applications which involve a substantial variation of the cathode work function, such as oxygen partial pressure measurements over a large dynamic range.