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At least 811 records · Page 45
All sourcesNASA NTRSDOE OSTI
NASA NTRS1985

SS focused technology: Gateways and NOS's

The extensions and enhancements of the fiber optic data bus technology supported by the Space Station Focused Technology Program are discussed. This includes the operating software for the network called the Network Operating System (NOS); gateways and bridges for multiple network topologies; and very large scale topology implimentations to shrink the size and power of the Bus Interface Unit (BIU) down to more manageable dimensions. CMOS is being investigated for the lower speed (parallel) logic. Gallium arsendide is being studied for the high speed (serial) logic.

Hartenstein, R.↗
NASA NTRS1988

VLSI Architecture Of A Binary Up/Down Counter

Identical stages contain relatively-few logic gates. New algorithm simplifies design of binary up/down counter. Design suitable for very-large-scale integrated circuits. Contains simple "pipeline" array of identical cells. Programmable logic unit converts increment and decrement input signals to "U" and "D" signals required by algorithm of counter.

Hsu, In-Shek↗
NASA NTRS1988

Programmable Pulser

User controls number of clock pulses to prevent burnout. New digital programmable pulser circuit in three formats; freely running, counted, and single pulse. Operates at frequencies up to 5 MHz, with no special consideration given to layout of components or to terminations. Pulser based on sequential circuit with four states and binary counter with appropriate decoding logic. Number of programmable pulses increased beyond 127 by addition of another counter and decoding logic. For very large pulse counts and/or very high frequencies, use synchronous counters to avoid errors caused by propagation delays. Invaluable tool for initial verification or diagnosis of digital or digitally controlled circuity.

Baumann, Eric↗
NASA NTRS1988

Estimating Rates Of Single-Event Upsets

Mathematical model yields estimates of upper and lower bounds on rates of single-event upsets (SEU's) in logic circuits. SEU's are reversible changes in logic states, caused by single high-energy ions. Energetic ions passed through device along tracks perpendicular to surface, to determine parameters of model. Used to estimate rates caused by ions of various energies incident at arbitrary angles. Useful in design of integrated circuits as high-density memories for minimal susceptibility to bit errors.

Zoutendyk, John A.↗
NASA NTRS1988

Response Of A MOSFET To A Cosmic Ray

Theoretical paper discusses response of enhancement-mode metal oxide/semiconductor field-effect transistor to cosmic-ray ion that passes perpendicularly through gate-oxide layers. Even if ion causes no permanent damage, temporary increase of electrical conductivity along track of ion large enough and long enough to cause change in logic state in logic circuit containing MOSFET.

Benumof, Reuben↗
NASA NTRS1987

An inference engine for embedded diagnostic systems

The implementation of an inference engine for embedded diagnostic systems is described. The system consists of two distinct parts. The first is an off-line compiler which accepts a propositional logical statement of the relationship between facts and conclusions and produces data structures required by the on-line inference engine. The second part consists of the inference engine and interface routines which accept assertions of fact and return the conclusions which necessarily follow. Given a set of assertions, it will generate exactly the conclusions which logically follow. At the same time, it will detect any inconsistencies which may propagate from an inconsistent set of assertions or a poorly formulated set of rules. The memory requirements are fixed and the worst case execution times are bounded at compile time. The data structures and inference algorithms are very simple and well understood. The data structures and algorithms are described in detail. The system has been implemented on Lisp, Pascal, and Modula-2.

Fox, Barry R.↗
NASA NTRS1987

Building validation tools for knowledge-based systems

The Expert Systems Validation Associate (EVA), a validation system under development at the Lockheed Artificial Intelligence Center for more than a year, provides a wide range of validation tools to check the correctness, consistency and completeness of a knowledge-based system. A declarative meta-language (higher-order language), is used to create a generic version of EVA to validate applications written in arbitrary expert system shells. The architecture and functionality of EVA are presented. The functionality includes Structure Check, Logic Check, Extended Structure Check (using semantic information), Extended Logic Check, Semantic Check, Omission Check, Rule Refinement, Control Check, Test Case Generation, Error Localization, and Behavior Verification.

Stachowitz, R. A.↗
NASA NTRS1988

Experimental studies of active members in control of large space structures

Intelligent structures for precision spacecraft applications are structural systems incorporating sensors, actuators, and built-in electronic logic that facilitate self-monitoring of structure responses to disturbances. Attention is presently given to adaptive structures, in which the electronic logic need not be integral to the structure. Active members are used to replace selected passive members of truss-type structures; the sensors employed allow measurement of the elastic strain and deformation experienced by the structure. Two struss-type testbed structures are described.

Fanson, J. L.↗
NASA NTRS1988

Noise-margin limitations on gallium-arsenide VLSI

Two factors which limit the complexity of GaAs MESFET VLSI circuits are considered. Power dissipation sets an upper complexity limit for a given logic circuit implementation and thermal design. Uniformity of device characteristics and the circuit configuration determines the electrical functional yield. Projection of VLSI complexity based on these factors indicates that logic chips of 15,000 gates are feasible with the most promising static circuits if a maximum power dissipation of 5 W per chip is assumed. While lower power per gate and therefore more gates per chip can be obtained by using a popular E/D FET circuit, yields are shown to be small when practical device parameter tolerances are applied. Further improvements in materials, devices, and circuits wil be needed to extend circuit complexity to the range currently dominated by silicon.

Long, Stephen I.↗
NASA NTRS1989

Timing Sampler For Delay Measurements

Integrated circuit called timing sampler used to measure delays in complementary metal oxide/silicon logic gates. Circuit chip contains chains of inverters and metal traces having minimum parasitic delays (delay chains), circuits to compare pulse timings, and output multiplexer. Timing sampler enables delay measurements for both positive and negative logic-level transitions by use of variety of circuit geometries representing tentative practical designs.

Blaes, Brent R.↗
NASA NTRS1989

Asymmetrical SRAM Cells For Radiation Tests

Features of circuits altered to increase or decrease sensitivity to radiation. State-space analysis used to analyze single-event-upset behavior of memory cell. When voltage on node a is set at one of indicated initial values Vao and then released, voltages on nodes a and b then follow indicated trajectory to final logic "one" or logic "zero" state. Ability to do this important for design of radiation-detecting integrated circuits (deliberately made more sensitive to ionizing radiation) and "radiation-hardened" integrated circuits - those intended to be relatively invulnerable to intense radiation.

Buehler, Martin G.↗
NASA NTRS1989

Correction And Use Of Jitter In Television Images

Proposed system stabilizes jittering television image and/or measures jitter to extract information on motions of objects in image. Alternative version, system controls lateral motion on camera to generate stereoscopic views to measure distances to objects. In another version, motion of camera controlled to keep object in view. Heart of system is digital image-data processor called "jitter-miser", which includes frame buffer and logic circuits to correct for jitter in image. Signals from motion sensors on camera sent to logic circuits and processed into corrections for motion along and across line of sight.

Diner, Daniel B.↗
NASA NTRS1988

Computerized monitoring and control of experiments in space

The computer subsystem of the Villanova University GAS (Get Away Special) experiment apparatus is discussed. The function of the computer subsystem is to provide data acquisition and control system support to the experiments. The computer subsystem will provide high availability, low power consumption and highly reliable data retention. The general layout of the subsystem provides for redundant processing units, control modules, and multiple data acquisition modules. Each of the two redundant processing units will be composed of a microprocessor, control logic, PROM, RAM, non-volitile memory, timers, self-check logic and data ports to the data acquisition and control modules. One unit will control the experiment while the other shadows the primary unit operation. The data acquisition module gathers data from the experiment. The data is transfered to the processing unit in digital form. The control module validates the data, decodes it and executes the command.

Janisch, Thomas V.↗
NASA NTRS1986

Rdesign: A data dictionary with relational database design capabilities in Ada

Data Dictionary is defined to be the set of all data attributes, which describe data objects in terms of their intrinsic attributes, such as name, type, size, format and definition. It is recognized as the data base for the Information Resource Management, to facilitate understanding and communication about the relationship between systems applications and systems data usage and to help assist in achieving data independence by permitting systems applications to access data knowledge of the location or storage characteristics of the data in the system. A research and development effort to use Ada has produced a data dictionary with data base design capabilities. This project supports data specification and analysis and offers a choice of the relational, network, and hierarchical model for logical data based design. It provides a highly integrated set of analysis and design transformation tools which range from templates for data element definition, spreadsheet for defining functional dependencies, normalization, to logical design generator.

Lekkos, Anthony A.↗
NASA NTRS1988

Transformational derivation of programs using the Focus system

A program derivation support system called Focus is being constructed. It will formally derive programs using the paradigm of program transformation. The following issues are discussed: (1) the integration of validation and program derivation activities in the Focus system; (2) its tree-based user interface; (3) the control of search spaces in program derivation; and (4) the structure and organization of program derivation records. The inference procedures of the system are based on the integration of functional and logic programming principles. This brings about a synthesis of paradigms that were heretofore considered far apart, such as logical and executable specifications and constructive and transformational approaches to program derivation. A great emphasis has been placed, in the design of Focus, on achieving small search spaces during program derivation. The program manipulation operations such as expansion, simplification and rewriting were designed with this objective. The role of operations that are expensive in search spaces, such as folding, has been reduced. Program derivations are documented in Focus in a way that the high level descriptions of derivations are expressed only using program level information. All the meta-level information, together with dependencies between derivations of program components, is automatically recorded by the system at a lower level of description for its own use in replay.

Reddy, Uday S.↗
NASA NTRS1987

SOLON: An autonomous vehicle mission planner

The State-Operator Logic Machine (SOLON) Planner provides an architecture for effective real-time planning and replanning for an autonomous vehicle. The highlights of the system, which distinguish it from other AI-based planners that have been designed previously, are its hybrid application of state-driven control architecture and the use of both schematic representations and logic programming for the management of its knowledge base. SOLON is designed to provide multiple levels of planning for a single autonomous vehicle which is supplied with a skeletal, partially-specified mission plan at the outset of the vehicle's operations. This mission plan consists of a set of objectives, each of which will be decomposable by the planner into tasks. These tasks are themselves comparatively complex sets of actions which are executable by a conventional real-time control system which does not perform planning but which is capable of making adjustments or modifications to the provided tasks according to constraints and tolerances provided by the Planner. The current implementation of the SOLON is in the form of a real-time simulation of the Planner module of an Intelligent Vehicle Controller (IVC) on-board an autonomous underwater vehicle (AUV). The simulation is embedded within a larger simulator environment known as ICDS (Intelligent Controller Development System) operating on a Symbolics 3645/75 computer.

Dudziak, M. J.↗
NASA NTRS1987

A framework for qualitative reasoning about solid objects

Predicting the behavior of a qualitatively described system of solid objects requires a combination of geometrical, temporal, and physical reasoning. Methods based upon formulating and solving differential equations are not adequate for robust prediction, since the behavior of a system over extended time may be much simpler than its behavior over local time. A first-order logic, in which one can state simple physical problems and derive their solution deductively, without recourse to solving the differential equations, is discussed. This logic is substantially more expressive and powerful than any previous AI representational system in this domain.

Davis, E.↗
NASA NTRS1988

A simulation-based fault injection experiment to evaluate self-test diagnostics for a fault-tolerant computer

The design and results of a fault injection experiment conducted in the Airlab facility at NASA-Langley using a logic network simulator are described. An attempt was made to determine the effectiveness of the diagnostic self-test sequences used to detect failures in the communicator/interstage (C/I) of a fault-tolerant processor (FTP). Identification of the undetected faults in the C/I Status Register logic resulted in changes in the diagnostic test sequences implemented for the FTP.

Baker, Robert L.↗