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At least 811 records · Page 45

New Generation Power System for Space Applications

The Deep Space Avionics (DSA) Project is developing a new generation of power system building blocks. Using application specific integrated circuits (ASICs) and power switching modules a scalable power system can be constructed for use on multiple deep space missions including future missions to Mars, comets, Jupiter and its moons. The key developments of the DSA power system effort are five power ASICs and a mod ule for power switching. These components enable a modular and scalab le design approach, which can result in a wide variety of power syste m architectures to meet diverse mission requirements and environments . Each component is radiation hardened to one megarad) total dose. The power switching module can be used for power distribution to regular spacecraft loads, to propulsion valves and actuation of pyrotechnic devices. The number of switching elements per load, pyrotechnic firin gs and valve drivers can be scaled depending on mission needs. Teleme try data is available from the switch module via an I2C data bus. The DSA power system components enable power management and distribution for a variety of power buses and power system architectures employing different types of energy storage and power sources. This paper will describe each power ASIC#s key performance characteristics as well a s recent prototype test results. The power switching module test results will be discussed and will demonstrate its versatility as a multip urpose switch. Finally, the combination of these components will illu strate some of the possible power system architectures achievable fro m small single string systems to large fully redundant systems.

power switching↗

The Pulse Width Modulator ASIC for Deep Space Missions

The Jet Propulsion Laboratory has started the development of a Pulse Width Modulator Application Specific Integrated Circuit (PWMA). This development is leveraging the previous development of the Switch Control ASIC (SCA). The purpose of the development is to provide the control for a selected range of power converter topologies and to meet the stringent environmental requirements of deep space missions. The PWMA will include several power control functions that are not normally included on the off-the-shelf components available today. One key functional requirement is the ability to implement an N + K redundant power converter with the ability to control the charging of a battery. Other applications will be the typical point of load isolated and non-isolated power converters. The purpose the development is not only to provide a much needed flight part, but also to accelerate the engineering process by using a standard cell library from previous ASIC developments. Under previous developments with Boeing and Lockheed Martin, JPL has produced three ASICs. Each ASIC has been implemented by using an analog standard cell library. One such development was the SCA, which is design to provide a floating power switch control. The functional verification of this ASIC has been completed and the cells used have been targeted for the new development of the PWMA. The primary function of the PWMA is to provide the control function of a point of load power converter. The design is an isolated 60 W converter with a 33 V output. In architecting the design, several functions were left up to the power converter design in order to make the ASIC more generic. The ASIC can be used for several power converter topologies and power levels. Some additional features have been added to the ASIC to provide the interfaces for multi-phase topologies and battery control functions. An N+K fault tolerant strategy has been implemented in order to provide the battery control functions. The PWMA has been developed to provide an ASIC with several functions not normally available in the off the shelf controllers. These functions have been added to enable the power converter designers to achieve fault tolerant designs and battery control functions.

Pulse Width Modulator Application Specific Integra↗

SODA Synthesizer: an Open-source, Multi-level, Modular, Extensible Compiler from High-level Frameworks to Silicon

The SODA Synthesizer is an open-source modular, end-to-end hardware compiler framework. The SODA frontend, developed in MLIR, performs system-level design, code partitioning, and high-level optimizations to prepare the specifications for the hardware synthesis. The backend is based on a state-of-the-art high-level synthesis tool, and generates the final hardware design. The backend can interface with logic synthesis tools for field programmable gate arrays or with commercial and open-source logic synthesis tools for application-specific integrated circuits. We discuss the opportunities and challenges in integrating with commercial and open-source tools both at the frontend and backend, and the unique opportunities that an open-source hardware design ecosystem provides.

Bohm Agostini, Nicolas↗

Waveshaping electronic circuit

Circuit provides output signal with sinusoidal function in response to bipolar transition of input signal. Instantaneous transition shapes into linear rate of change and linear rate of change shapes into sinusoidal rate of change. Circuit contains only active components; therefore, compatibility with integrated circuit techniques is assured.

Harper, T. P.↗

NASA Communications Division (NASCOM) Tracking and Data Relay Satellite System (TDRSS) shuttle multiplexer-demultiplexer data system (MDM) and supporting items

The multiplexer-demultiplexer (MDM) project included the design, documentation, manufacture, and testing of three MDM Data Systems. The equipment is contained in 59 racks, and includes more than 3,000 circuit boards and 600 microprocessors. Spares, circuit card testers, a master set of programmable integrated circuits, and a program development system were included as deliverables. All three MDM's were installed, and were operationally tested. The systems performed well with no major problems. The progress and problems analysis, addresses schedule conformance, new technology, items awaiting government approval, and project conclusions are summarized. All contract modifications are described.

New, S. R.↗

Test Pattern for IC's

Random-fault densities measured in array of standard structures. Test pattern is array of standard circuit elements built into circuit chip along with, or in lieu of, integrated circuit objective process. Measurements on ray made and interpreted so fabrication process can be corrected as necessary.

Griswold, T. W.↗

Space Power Amplification with Active Linearly Tapered Slot Antenna Array

A space power amplifier composed of active linearly tapered slot antennas (LTSA's) has been demonstrated and shown to have a gain of 30 dB at 20 GHz. In each of the antenna elements, a GaAs monolithic microwave integrated circuit (MMIC) three-stage power amplifier is integrated with two LTSA's. The LTSA and the MMIC power amplifier has a gain of 11 dB and power added efficiency of 14 percent respectively. The design is suitable for constructing a large array using monolithic integration techniques.

Simons, Rainee N.↗

Recent activities in printed Antennas at LeRC

This paper will report two recent R&D efforts in printed antennas at NASA Lewis Research Center. These efforts are: (1) to enhance the current antenna performance in gain, bandwidth and pattern characteristics, and (2) to develop coplanar waveguide/aperture coupled feeding technique for dual excitation of a patch antenna. Research in area (1) has led to the development of a nonplanar linearly tapered slot antenna (LTSA) which has exhibited over 10 dB gain with broad bandwidth and excellent radiation patterns. This endfire antenna element is most suitable for use in MMIC arrays of 'brick' construction. A space power amplifier composed of active LTSA has been demonstrated and shown to have a gain of 30 dB at 20 GHz. In each of the antenna elements, a GaAs monolithic microwave integrated circuit (MMIC) three-stage power amplifier is integrated with two LTSA's. A single active LTSA has also been demonstrated and exhibited a power gain of 6.7 dB with the MMIC amplifier turned on. The aperture coupled feeding technique with coplanar waveguide feeds has demonstrated high coupling efficiency on both LTSA and patch antennas. Recent efforts have been focused on applying this technique for dual excitation (dual frequency and/or dual polarization) of a patch antenna. Preliminary results confirm the feasibility of this approach. Further development is required to improve the coupling efficiency and antenna radiation characteristics.

Lee, Richard Q.↗

Software-Reconfigurable Processors for Spacecraft

A report presents an overview of an architecture for a software-reconfigurable network data processor for a spacecraft engaged in scientific exploration. When executed on suitable electronic hardware, the software performs the functions of a physical layer (in effect, acts as a software radio in that it performs modulation, demodulation, pulse-shaping, error correction, coding, and decoding), a data-link layer, a network layer, a transport layer, and application-layer processing of scientific data. The software-reconfigurable network processor is undergoing development to enable rapid prototyping and rapid implementation of communication, navigation, and scientific signal-processing functions; to provide a long-lived communication infrastructure; and to provide greatly improved scientific-instrumentation and scientific-data-processing functions by enabling science-driven in-flight reconfiguration of computing resources devoted to these functions. This development is an extension of terrestrial radio and network developments (e.g., in the cellular-telephone industry) implemented in software running on such hardware as field-programmable gate arrays, digital signal processors, traditional digital circuits, and mixed-signal application-specific integrated circuits (ASICs).

Farrington, Allen↗

On-chip probabilistic inference for charged-particle tracking at the sensor edge

Modern scientific instruments operate under increasingly extreme constraints on bandwidth, latency, and power. Inference at the sensor edge determines experimental data collection efficiency by deciding which information to save for further analysis. Particle tracking detectors at the Large Hadron Collider exemplify this challenge: pixelated silicon sensors generate rich spatiotemporal ionization patterns, yet most of this information is discarded due to data-rate limitations. Concurrently, advancements in co-design tools provide rapid turn-around for incorporating machine learning into application-specific integrated circuits, motivating designs for particle detectors with new integrated technologies. We demonstrate that neural networks embedded in the front-end electronics can infer charged-particle kinematic parameters from a single silicon layer. We regress hit positions and incident angles with calibrated uncertainties, while satisfying stringent constraints on numerical precision, latency, and silicon area. Our results establish a path toward probabilistic inference directly at the edge, opening new opportunities for intelligent sensing in high-rate scientific instruments.

Das, Arghya Ranjan [Purdue U.] (ORCID:000000018451↗

Strong Photon‐Magnon Coupling Using a Lithographically Defined Organic Ferrimagnet

Abstract A cavity‐magnonic system composed of a superconducting microwave resonator coupled to a magnon mode hosted by the organic‐based ferrimagnet vanadium tetracyanoethylene (V[TCNE] x ) is demonstrated. This work is motivated by the challenge of scalably integrating a low‐damping magnetic system with planar superconducting circuits. V[TCNE] x has ultra‐low intrinsic damping, can be grown at low processing temperatures on arbitrary substrates, and can be patterned via electron beam lithography. The devices operate in the strong coupling regime, with a cooperativity exceeding 1000 for coupling between the Kittel mode and the resonator mode at T≈0.4 K, suitable for scalable quantum circuit integration. Higher‐order magnon modes are also observed with much narrower linewidths than the Kittel mode. This work paves the way for high‐cooperativity hybrid quantum devices in which magnonic circuits can be designed and fabricated as easily as electrical wires.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Selective and Scalable Control of Spin Quantum Memories in a Photonic Circuit

A central goal in many quantum information processing applications is a network of quantum memories that can be entangled with each other while being individually controlled and measured with high fidelity. This goal has motivated the development of programmable photonic integrated circuits (PICs) with integrated spin quantum memories using diamond color center spin-photon interfaces. However, this approach introduces a challenge into the microwave control of individual spins within closely packed registers. Here, we present a quantum memory-integrated photonics platform capable of (i) the integration of multiple diamond color center spins into a cryogenically compatible, high-speed programmable PIC platform, (ii) selective manipulation of individual spin qubits addressed via tunable magnetic field gradients, and (iii) simultaneous control of qubits using numerically optimized microwave pulse shaping. The combination of localized optical control, enabled by the PIC platform, together with selective spin manipulation opens the path to scalable quantum networks on intrachip and interchip platforms.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Analysis and synthesis of distributed-lumped-active networks by digital computer

The use of digital computational techniques in the analysis and synthesis of DLA (distributed lumped active) networks is considered. This class of networks consists of three distinct types of elements, namely, distributed elements (modeled by partial differential equations), lumped elements (modeled by algebraic relations and ordinary differential equations), and active elements (modeled by algebraic relations). Such a characterization is applicable to a broad class of circuits, especially including those usually referred to as linear integrated circuits, since the fabrication techniques for such circuits readily produce elements which may be modeled as distributed, as well as the more conventional lumped and active ones.

Source record↗

A general logic structure for custom LSI'S

Structure composed of standardized-circuit arrays reduces cost and complexity of fabricating special integrated circuits. Desired circuits are formed from basic mask, custom cuts, and contact points. Interactive computer program speeds design.

Sievers, M. W.↗

Development of 20 GHz monolithic transmit modules

The history of the development of a transmit module for the band 17.7 to 20.2 GHz is presented. The module was to monolithically combine, on one chip, five bits of phase shift, a buffer amplifier and a power amplifier to produce 200 mW to the antenna element. The approach taken was MESFET ion implanted device technology. A common pinch-off voltage was decided upon for each application. The beginning of the total integration phases revealed hitherto unencountered hazards of large microwave circuit integration which were successfully overcome. Yield and customer considerations finally led to two separate chips, one containing the power amplifiers and the other containing the complete five bit phase shifter.

Higgins, J. A.↗

X-Band, 17-Watt Solid-State Power Amplifier

An advanced solid-state power amplifier that can generate an output power of as much as 17 W at a design operating frequency of 8.4 GHz has been designed and constructed as a smaller, lighter, less expensive alternative to traveling-wave-tube X-band amplifiers and to prior solid-state X-band power amplifiers of equivalent output power. This amplifier comprises a monolithic microwave integrated circuit (MMIC) amplifier module and a power-converter module integrated into a compact package (see Figure 1). The amplifier module contains an input variable-gain amplifier (VGA), an intermediate driver stage, a final power stage, and input and output power monitors (see Figure 2). The VGA and the driver amplifier are 0.5-m GaAs-based metal semiconductor field-effect transistors (MESFETs). The final power stage contains four parallel high-efficiency, GaAs-based pseudomorphic high-electron-mobility transistors (PHEMTs). The gain of the VGA is voltage-variable over a range of 10 to 24 dB. To provide for temperature compensation of the overall amplifier gain, the gain-control voltage is generated by an operational-amplifier circuit that includes a resistor/thermistor temperature-sensing network. The driver amplifier provides a gain of 14 dB to an output power of 27 dBm to drive the four parallel output PHEMTs, each of which is nominally capable of putting out as much as 5 W. The driver output is sent to the input terminals of the four parallel PHEMTs through microstrip power dividers; the outputs of these PHEMTs are combined by microstrip power combiners (which are similar to the microstrip power dividers) to obtain the final output power of 17 W.

Mittskus, Anthony↗