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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 811 records · Page 45

Parallelized convolutional interleaver implementation for efficient DDR memory access

Convolutional interleavers are used in many different communications systems to correct for burst errors due to atmospheric fades and scintillation. The interleaver size is related to the channel coherence time and the data rate. Small convolutional interleavers can be implemented in a field programmable gate array (FPGA) block random access memory (BRAM). However, large interleavers exceeding the size of the BRAM on the FPGA are necessary for channels with longer fades and higher data rates. Therefore, an implementation utilizing double data rate (DDR) memory external to the FPGA is necessary. Wide DDR memory data buses can make the use of DDR memory for convolutional interleavers inefficient when individual symbols are written to and read from the memory. DDR memory operational speeds can also limit the data rate of the interleaver. The Consultative Committee for Space Data Systems (CCSDS) Optical Communications High Photon Efficiency (HPE) standard utilizes a convolutional channel symbol interleaver. A previous implementation of the HPE standard utilized BRAM for the convolutional interleaver, but mission requirements for the upcoming Optical Artemis-2 Orion (O2O) communications demonstration dictate the use of an interleaver exceeding the size of the BRAM. An algorithm and method for implementing the convolutional interleaver in the FPGA with DDR memory is described in this paper.

Optical communications↗

A comparison of the Cray-2 performance before and after the installation of memory pseudo-banking

A suite of 13 large Fortran benchmark codes were run on a Cray-2 configured with memory pseudo-banking circuits, and floating point operation rates were measured for each under a variety of system load configurations. These were compared with similar flop measurements taken on the same system before installation of the pseudo-banking. A useful memory access efficiency parameter was defined and calculated for both sets of performance rates, allowing a crude quantitative measure of the improvement in efficiency due to pseudo-banking. Programs were categorized as either highly scalar (S) or highly vectorized (V) and either memory-intensive or register-intensive, giving 4 categories: S-memory, S-register, V-memory, and V-register. Using flop rates as a simple quantifier of these 4 categories, a scatter plot of efficiency gain vs Mflops roughly illustrates the improvement in floating point processing speed due to pseudo-banking. On the Cray-2 system tested this improvement ranged from 1 percent for S-memory codes to about 12 percent for V-memory codes. No significant gains were made for V-register codes, which was to be expected.

Schmickley, Ronald D.↗

Exploring Architectural-Aware Affinity Policies in Modern HPC Runtimes

Modern commodity and High-Performance Computing (HPC) systems are evolving with complex CPU architectures. These architectures now feature higher core and NUMA domain counts and implement features such as hyperthreading. When considering significant differences in hardware configurations, library availability, and hardware-tailored system/software stacks, which could substantially vary from one system to another, performance portability is hard to achieve. Throughout the years, this trend resulted in an increasingly high burden on application developers to fine-tune their workloads for each architecture. This work explores how hardware-dependent aspects such as locality/process/thread affinity affect performance in modern CPU architectures. We focus our study on the Global Memory and Threading (GMT) distributed runtime system as a representative of Partitioned Global Address Space (PGAS) software stacks commonly adopted for productivity. In particular, to appreciate performance implications, we evaluate GMT’s thread affinity policies, and, introduce two new ones which exploit architectural awareness. Finally, we explore alternative NUMA configurations via different process bindings and perform a scalability study on three HPC clusters with varying CPU architectures and NUMA layouts. Our analysis indicates that more complex architectures are more affected by affinity and binding policies and highlights the importance of setting proper runtime configurations to achieve superior performance.

Di Dio Lavore, Ian↗

A multicomputer simulation of the Galileo spacecraft command and data subsystem

A detailed simulation of the command and data subsystem of the Galileo spacecraft on a distributed memory multicomputer is described. The simulation is based on an ensemble of Inmos Transputers for simulating, to the bit level, the execution of instruction sequences for the six RCA 1802 microcomputers and the intricate bus traffic between them and other components of the spacecraft. Expressions were developed to estimate the performance of the simulator on a distributed system given the processor clock speed, memory access time, and communication characteristics.

Zipse, John E.↗

Experimental Characterization of OpenMP Offloading Memory Operations and Unified Shared Memory Support

The OpenMP specification recently introduced support for unified shared memory, allowing implementation to leverage underlying system software to provide a simpler GPU offloading model where explicit mapping of variables is optional. Support for this feature is becoming more available in different OpenMP implementations on several hardware platforms. A deeper understanding of the different implementation’s execution profile and performance is crucial for applications as they consider the performance portability implications of adopting a unified memory offloading programming style. This work introduces a benchmark tool to characterize unified memory support in several OepnMP compilers and runtimes, with emphasis on identifying discrepancies between different OpenMP implementations as to how they various memory allocation strategies interact with unified shared memory. The benchmark tool is used to characterize OpenMP compilers on three leading High Performance Computing platforms supporting different CPU and device architectures. The benchmark tool is used to assess the impact of enabling unified shared memory on the performance of memory-bound code, highlighting implementation differences that should be accounted for when applications consider performance portability across platforms and compilers.

Elwasif, Wael↗

IMAGES: A digital computer program for interactive modal analysis and gain estimation for eigensystem synthesis

An interactive digital computer program for modal analysis and gain estimation for eigensystem synthesis was written. Both mathematical and operation considerations are described; however, the mathematical presentation is limited to those concepts essential to the operational capability of the program. The program is capable of both modal and spectral synthesis of multi-input control systems. It is user friendly, has scratchpad capability and dynamic memory, and can be used to design either state or output feedback systems.

Jones, R. L.↗

Hierarchical modeling for reliability analysis using Markov models

Markov models represent an extremely attractive tool for the reliability analysis of many systems. However, Markov model state space grows exponentially with the number of components in a given system. Thus, for very large systems Markov modeling techniques alone become intractable in both memory and CPU time. Often a particular subsystem can be found within some larger system where the dependence of the larger system on the subsystem is of a particularly simple form. This simple dependence can be used to decompose such a system into one or more subsystems. A hierarchical technique is presented which can be used to evaluate these subsystems in such a way that their reliabilities can be combined to obtain the reliability for the full system. This hierarchical approach is unique in that it allows the subsystem model to pass multiple aggregate state information to the higher level model, allowing more general systems to be evaluated. Guidelines are developed to assist in the system decomposition. An appropriate method for determining subsystem reliability is also developed. This method gives rise to some interesting numerical issues. Numerical error due to roundoff and integration are discussed at length. Once a decomposition is chosen, the remaining analysis is straightforward but tedious. However, an approach is developed for simplifying the recombination of subsystem reliabilities. Finally, a real world system is used to illustrate the use of this technique in a more practical context.

Fagundo, Arturo↗

Design and Development of CubeSat Solar Array Deployment Mechanisms Using Shape Memory Alloys

The Advanced eLectrical Bus (ALBus) project is a technology demonstration mission of a 3-U CubeSat with an advanced, digitally controlled electrical power system capability and the novel use of Shape Memory Alloy (SMA) technology for reliable solar array deployable mechanisms. The ALBus cubesat has a need to deploy four solar arrays in addition to the body-mounted arrays on each side of the cubesat. A goal of the mission is to utilize the SMAs being developed at the NASA Glenn Research Center to deploy these solar arrays. The use of SMAs allows for the ability to test and reset the flight deployment mechanism prior to flight which reduces the risk of on orbit deployment failures common on cubesats. As a result, an SMA driven Retention and Release mechanism and an SMA driven hinge was designed, developed, and being prepared for flight. This paper summarized the development of these mechanisms, types and functionalities of SMAs used, and lessons learned throughout the process.

solar array deployment↗

A multiarchitecture parallel-processing development environment

A description is given of the hardware and software of a multiprocessor test bed - the second generation Hypercluster system. The Hypercluster architecture consists of a standard hypercube distributed-memory topology, with multiprocessor shared-memory nodes. By using standard, off-the-shelf hardware, the system can be upgraded to use rapidly improving computer technology. The Hypercluster's multiarchitecture nature makes it suitable for researching parallel algorithms in computational field simulation applications (e.g., computational fluid dynamics). The dedicated test-bed environment of the Hypercluster and its custom-built software allows experiments with various parallel-processing concepts such as message passing algorithms, debugging tools, and computational 'steering'. Such research would be difficult, if not impossible, to achieve on shared, commercial systems.

Townsend, Scott↗

Comprehensive assessment of deep reinforcement learning approaches for economic dispatch in nuclear-driven microgrids

As the electrical grid integrates more variable renewable energy sources such as wind and solar, the demand for distributed and flexible systems to address this increased variability becomes critical. Nuclear-driven microgrids provide a promising solution by offering stable generation to complement intermittent renewables, ensuring grid reliability and operating efficiency. This paper proposes a recurrent deep reinforcement learning framework for optimal economic dispatch in a nuclear-powered microgrid integrating renewable energy sources, small modular reactors, battery storage systems, and balance-of-plant dynamics. A three-agent control architecture is developed, where demand and renewable energy agents act as forecasters, and a reinforcement learning-based dispatch agent performs real-time energy allocation. A nonlinear programming formulation is first used to generate an optimal baseline for benchmarking. The proposed dispatch controller, based on Proximal Policy Optimization enhanced with Long Short-Term Memory networks, exploits temporal correlations in system dynamics by taking advantage of the time series used as inputs to improve policy robustness under uncertainty. Comparative analysis against established deep reinforcement learning methods, including Proximal Policy Optimization with a feedforward architecture, Soft Actor-Critic, and Twin Delayed Deep Deterministic Policy Gradient, demonstrates superior performance. Numerical results indicate that the proposed controller achieves a 0.39% cost reduction relative to the nonlinear programming benchmark and outperforms other learning-based methods by generating additional revenue of up to 0.35%. All reinforcement learning controllers compute dispatch actions in less than 0.3 s, resulting in a computational speedup of more than three orders of magnitude over the nonlinear programming baseline. The findings of this paper highlight their applicability for real-time operation and control in nuclear-integrated microgrids under volatile operating conditions.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Digital Image Display Control System, DIDCS

DIDCS is an interactive image display and manipulation system that is used for a variety of astronomical image reduction and analysis operations. The hardware system consists of a PDP 11/40 main frame with 32K of 16-bit core memory; 96K of 16-bit MOS memory; two 9 track 800 BPI tape drives; eight 2.5 million byte RKO5 type disk packs, three user terminals, and a COMTAL 8000-S display system which has sufficient memory to store and display three 512 x 512 x 8 bit images along with an overlay plane and function table for each image, a pseudo color table and the capability for displaying true color. The software system is based around the language FORTH, which will permit an open ended dictionary of user level words for image analyses and display. A description of the hardware and software systems will be presented along with examples of the types of astronomical research that are being performed. Also a short discussion of the commonality and exchange of this type of image analysis system will be given.

Fischel, D.↗

Design of functional materials based on new principles of disorder. Final Report

Disorder is present to some extent in every material. The disorder can be sparse and localized – individual defects – or globally such as in a glass. Normally disorder is considered to be detrimental to function. However, this is not necessarily always the case. This project addressed the question: How does disorder provide new potentialities for the behavior of a material that would be absent in a crystalline material of the same composition? We have discovered a new principle for disordered matter: Independence of bond-level response. This work has introduced the possibility of creating new classes of mechanical meta-materials with applications everywhere from microscopic biological molecules (allostery) to large scale architectural disordered networks. During the course of this grant, we have subsequently elaborated on these novel ideas about bond-level independence of properties in disordered materials. In particular, this study has required that we understand the limits of disorder. That is, if crystals are perfect order, is there another diametrically opposed pole which is the most disordered state? We have shown that, in a well-defined way, jamming is one extreme disordered pole of rigid matter. Jamming is a far-from-equilibrium way of creating a rigid solid by rapidly quenching a random distribution of particles to a mechanically stable system at zero temperature. To understand the jammed state of matter, we have elucidated the low-frequency excitation of these systems. This has allowed a new way of understanding materials that cannot be easily classified as crystals or glasses. These ideas can be extended to address the mechanical properties of polycrystalline matter. Memory formation in matter can take inspiration from memory that occurs in a biological context. The issue of memory formation raises another set of questions at the heart of how the energy landscape is organized and how it can be manipulated to store information in a solid. This project has explored how to understand the degree to which multiple memories can be stored in a single system and has created a holistic understanding of how inputs can be used to create a desired response.

36 MATERIALS SCIENCE↗

A general non-Fourier Stefan problem formulation that accounts for memory effects

The Stefan problem is the classical model of a melting phase change. In heterogeneous systems, such phase changes can exhibit non-Fourier (anomalous) behaviors, where the advance of the melt interface does not follow the expected time scaling. These situations can be modeled by replacing the derivatives, in the governing partial differential equations, with fractional order derivatives. In particular, replacing the time derivatives leads to non-Fourier models that account for memory effects in the system. In this work, by using appropriate time convolution integrals, a general thermodynamic balance statement for melting phase problems, explicitly accounting for memory effects, is developed. From this balance, a general model formulation applicable to problems involving melting over a temperature range (i.e., a mushy region) is derived. A key component in this model is the representation of memory effects through the use of fractional derivative based constitutive models of the enthalpy and heat flux. Further, on shrinking the mushy region to a single isotherm, a general sharp interface melting model is obtained. Here, in contrast to the classic Stefan problem, the fractional derivatives induce a natural regularization, such that the constitutive models for enthalpy and heat flux are continuous at the melt interface; a result confirmed through numerical simulation. To further support the theoretical findings, a physical example of a non-Fourier Stefan problem is presented. Overall the development and results in this paper underscore the importance of explicitly relating the development of fractional calculus models to the appropriate thermodynamic balance statements.

42 ENGINEERING↗

Ground Software Maintenance Facility (GSMF) user's manual. Appendices NASA-CR-178806 NAS 1.26:178806 Rept-41849-G159-026-App HC A05/MF A01

Procedures are presented that allow the user to assemble tasks, link, compile, backup the system, generate/establish/print display pages, cancel tasks in memory, and to TET an assembly task without having to enter the commands every time. A list of acronyms is provided. Software identification, payload checkout unit operating system services, data base generation, and MITRA operating procedures are also discussed.

Aquila, V.↗

Retransmission error control with memory

In this paper, an error control technique that is a basic improvement over automatic-repeat-request ARQ is presented. Erroneously received blocks in an ARQ system are used for error control. The technique is termed ARQ-with-memory (MRQ). The general MRQ system is described, and simple upper and lower bounds are derived on the throughput achievable by MRQ. The performance of MRQ with respect to throughput, message delay and probability of error is compared to that of ARQ by simulating both systems using error data from a VHF satellite channel being operated in the ALOHA packet broadcasting mode.

Sindhu, P. S.↗

Asynchronous Message Service for Deep Space Mission Operations

While the CCSDS (Consultative Committee for Space Data Systems) File Delivery Protocol (CFDP) provides internationally standardized file transfer functionality that can offer significant benefits for deep space mission operations, not all spacecraft communication requirements are necessarily best met by file transfer. In particular, continuous event-driven asynchronous message exchange may also be useful for communications with, among, and aboard spacecraft. CCSDS has therefore undertaken the development of a new Asynchronous Message Service (AMS) standard, designed to provide common functionality over a wide variety of underlying transport services, ranging from shared memory message queues to CCSDS telemetry systems. The present paper discusses the design concepts of AMS, their applicability to deep space mission operations problems, and the results of preliminary performance testing obtained from exercise of a prototype implementation.

asynchronous message exchanges↗

An interface between a datametrics 1085A manometer and a Hewlett-Packard 2100S computer

A hardware/software interface designed to mate a Datametrics models 1085A electronic manometer to a Hewlett-Packard (HP) model 2100S computer is described. The software driver operates in the basic control system (BCS) and requires 173 words of memory; the hardware interface uses an HP data source interface (DSI) card which requires one computer input/output channel. Results obtained by incorporating this interface into a data acquisition system indicate that the interface operates successfully.

Hillard, M. E., Jr.↗