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At least 793 records · Page 44

Embedding Neural Thermal Scattering (NeTS) Modules in SERPENT for Higher Fidelity Advanced Reactor Analysis

When a neutron born in fission thermalizes to the order of $k$ $B$ $T$, it’s de-Broglie wavelength and energy approach the order of inter-atomic spacing and elementary lattice oscillations, respectively. $S$($a,β,t$) or the scattering law, uuantify these temperature-dependent crystallographic contributions to total cross section (or reaction rate). In a Monte Carlo analysis, cumulative distribution functions (CDFs) of $S$($a,β,t$) are loaded to memory from “A Compact ENDF” (ACE) files for stochastically selecting thermal scattered neutron trajectories. In this work, novel neural thermal scattering (NeTS) modules for $S$($a,β,t$) CDFs are designed, trained, serialized and embedded within SERPENT using Python’s limited C-API for on-the-fly deployment of crystalline graphite $S$($a,β,t$) sampling. Torchscript tracing and Numba just-in-time (JIT) compilation streamline neural inference on NVIDIA GPUs with CUDA libraries. Demonstrations of bare sphere thermalization of fast and thermal sources show excellent agreement between embedded NeTS in SERPENT and MCNP. With an explicit model of the reactor, NeTS can predict on-the-fly changes in TREAT neutron spectra as a function of local temperature, which can serve to improve transient and accident predictions in a multiphysics analysis framework. This framework can be further extended to account on-the-fly for changes in local graphitic microstructure to scattering cross sections, and outlines a novel coupling of modern machine learning with state-of-the-art reactor physics methods.

97 MATHEMATICS AND COMPUTING↗

BRAINSTACK – A Platform for Artificial Intelligence & Machine Learning Collaborative Experiments on a Nano-Satellite

As space missions continue to become more ambitious, complex, and distant to Earth, the need for advanced on-board intelligent decision making to guide everything from mission operations to fault detection and recovery has become a major front of space research. While the prevalence of research on such Artificial Intelligence / Machine Learning (AI/ML) modules has exploded, the capacity to experimentally validate such modules in space in a rapid and inexpensive format has not. To this end, the Nano Orbital Workshop (NOW) group at NASA Ames Research Center has been at the forefront of performing initial flight evaluation tests of ‘commercially’ available AI/ML computational platforms via the TechEdSat (TES-n) flight series as part of what is programmatically referred to as the BRAINSTACK. BRAINSTACK will provide an orbital AI/ML evaluation laboratory where computational experiments are pre-loaded into memory prior to launch, and then executed as desired during the mission, with results reported back and program tweaks or new data sets uploaded as needed. Processors selected as part of the BRAINSTACK are of ideal size, packaging, and power consumption for easy integration into a cube satellite structure. These experiments have included the evaluation of small, high-performance GPUs and more recently, neuromorphic processors in LEO operations. Neuromorphic processors are of particular interest due to their superior computational power efficiency over GPUs. The first TES-n flight test of an Intel first-generation Loihi neuromorphic processor launched on January 13, 2022 and continues to operate in orbit despite almost no space environment modifications. The Intel Loihi Gen-1 is characterized by a 14nm 128-core Spiking Neural Network (SNN) able to support on-chip training. This experiment utilized a Loihi packaged in the ‘Kapoho Bay’ USB module, providing a relatively straight-forward interface to the bus avionics system. The Kapoho Bay was in turn managed by a host Intel Pentium single-board computer to handle scheduling of the AI/ML application payloads, and communications with the satellite vehicle manager. The recently released Intel Loihi Gen-2, able to support integer-valued spike payloads and produced using 7nm process, will form part of the basis of the evolving BRAINSTACK in the upcoming three TES-n/NOW flights. Additionally, it is planned to measure the radiation environment these processors experience to understand any degradation or computational artifacts caused by long term space radiation exposure on these novel architectures. This evolving flexible and collaborative environment involving various research teams across NASA and other organizations is intended to be a convenient orbital test platform from which many anticipated future space AI/ML applications may be initially tested.

Artificial Intelligence↗

BRAINSTACK – A Platform for Artificial Intelligence & Machine Learning Collaborative Experiments on a Nano-Satellite

As space missions continue to become more ambitious, complex, and distant to Earth, the need for advanced on-board intelligent decision making to guide everything from mission operations to fault detection and recovery has become a major front of space research. While the prevalence of research on such Artificial Intelligence / Machine Learning (AI/ML) modules has exploded, the capacity to experimentally validate such modules in space in a rapid and inexpensive format has not. To this end, the Nano Orbital Workshop (NOW) group at NASA Ames Research Center has been at the forefront of performing initial flight evaluation tests of ‘commercially’ available AI/ML computational platforms via the TechEdSat (TES-n) flight series as part of what is programmatically referred to as the BRAINSTACK. BRAINSTACK will provide an orbital AI/ML evaluation laboratory where computational experiments are pre-loaded into memory prior to launch, and then executed as desired during the mission, with results reported back and program tweaks or new data sets uploaded as needed. Processors selected as part of the BRAINSTACK are of ideal size, packaging, and power consumption for easy integration into a cube satellite structure. These experiments have included the evaluation of small, high-performance GPUs and more recently, neuromorphic processors in LEO operations. Neuromorphic processors are of particular interest due to their superior computational power efficiency over GPUs. The first TES-n flight test of an Intel first-generation Loihi neuromorphic processor launched on January 13, 2022 and continues to operate in orbit despite almost no space environment modifications. The Intel Loihi Gen-1 is characterized by a 14nm 128-core Spiking Neural Network (SNN) able to support on-chip training. This experiment utilized a Loihi packaged in the ‘Kapoho Bay’ USB module, providing a relatively straight-forward interface to the bus avionics system. The Kapoho Bay was in turn managed by a host Intel Pentium single-board computer to handle scheduling of the AI/ML application payloads, and communications with the satellite vehicle manager. The recently released Intel Loihi Gen-2, able to support integer-valued spike payloads and produced using 7nm process, will form part of the basis of the evolving BRAINSTACK in the upcoming three TES-n/NOW flights. Additionally, it is planned to measure the radiation environment these processors experience to understand any degradation or computational artifacts caused by long term space radiation exposure on these novel architectures. This evolving flexible and collaborative environment involving various research teams across NASA and other organizations is intended to be a convenient orbital test platform from which many anticipated future space AI/ML applications may be initially tested.

Artificial Intelligence↗

Scalable Al 2 O 3 –TiO 2 Conductive Oxide Interfaces as Defect Reservoirs for Resistive Switching Devices

Abstract Resistive switching devices herald a transformative technology for memory and computation, offering considerable advantages in performance and energy efficiency. Here, a simple and scalable material system of conductive oxide interfaces is employed, and their unique properties are leveraged for a new type of resistive switching device. An Al 2 O 3 –TiO 2 ‐based valence‐change resistive switching device, where the conductive oxide interface serves both as the bottom electrode and as a reservoir of defects for switching, is demonstrated. The amorphous–polycrystalline Al 2 O 3 –TiO 2 conductive interface is obtained following the technological path of simplifying the fabrication of the 2D electron gases (2DEGs), making them scalable for practical mass integration. Physical analysis of the device chemistry and microstructure with comprehensive electrical analysis of its switching behavior and performance is combined. The origin of the resistive switching is pinpointed to the conductive oxide interface, which serves both as the bottom electrode and as a reservoir of oxygen vacancies. The latter plays a key role in valence‐change resistive switching devices. The new device, based on scalable and complementary metal–oxide–semiconductor (CMOS)‐technology‐compatible fabrication processes, opens new design spaces toward increased tunability and simplification of the device selection challenge.

36 MATERIALS SCIENCE↗

The role of lattice dynamics in ferroelectric switching

Reducing the switching energy of ferroelectric thin films remains an important goal in the pursuit of ultralow-power ferroelectric memory and logic devices. Here, we elucidate the fundamental role of lattice dynamics in ferroelectric switching by studying both freestanding bismuth ferrite (BiFeO 3 ) membranes and films clamped to a substrate. We observe a distinct evolution of the ferroelectric domain pattern, from striped, 71° ferroelastic domains (spacing of ~100 nm) in clamped BiFeO 3 films, to large (10’s of micrometers) 180° domains in freestanding films. By removing the constraints imposed by mechanical clamping from the substrate, we can realize a ~40% reduction of the switching voltage and a consequent ~60% improvement in the switching speed. Our findings highlight the importance of a dynamic clamping process occurring during switching, which impacts strain, ferroelectric, and ferrodistortive order parameters and plays a critical role in setting the energetics and dynamics of ferroelectric switching.

36 MATERIALS SCIENCE↗

A Subspace-Inclusive Sampling Method for the Computational Design of Compositionally Graded Alloys

Abstract Compositionally graded alloys, a subclass of functionally graded materials (FGMs), utilize localized variations in composition with a single metal part to achieve higher performance than traditional single material parts. In previous work [Kirk, T., Galvan, E., Malak, R., and Arroyave, R., 2018, “Computational Design of Gradient Paths in Additively Manufactured Functionally Graded Materials,” J. Mech. Des., 140, p. 111410. 10.1115/1.4040816], the authors presented a computational design methodology that avoids common issues which limit a gradient alloy’s feasibility, such as deleterious phases, and optimizes for performance objectives. However, the previous methodology only samples the interior of a composition space, meaning designed gradients must include all elements in the space throughout the gradient. Because even small amounts of additional alloying elements can introduce new deleterious phases, this characteristic often neglects potentially simpler solutions to otherwise unsolvable problems and, consequently, discourages the addition of new elements to the state space. The present work improves upon the previous methodology by introducing a sampling method that includes subspaces with fewer elements in the design search. The new method samples within an artificially expanded form of the state space and projects samples outside the true region to the nearest true subspace. This method is evaluated first by observing the sample distribution in each subspace of a 3D, 4D, and 5D state space. Next, a parametric study in a synthetic 3D problem compares the performance of the new sampling scheme to the previous methodology. Lastly, the updated methodology is applied to design a gradient from stainless steel to equiatomic NiTi that has practical uses such as embedded shape memory actuation and for which the previous methodology fails to find a feasible path.

Engineering↗

Digital Twin Empowered PV Power Prediction

The accurate prediction of photovoltaic (PV) power generation is significant to ensure the economic and safe operation of power systems. To this end, the paper proposes a new digital twin (DT) empowered PV power prediction framework that is capable of ensuring reliable data transmission and employing the DT to achieve high accuracy of power prediction. With this framework, considering potential data contamination in the collected PV data, a generative adversarial network is employed to restore the historical data set, which offers a prerequisite to ensure accurate mapping from the physical space to the digital space. Further, a new DT empowered PV power prediction method is proposed. Therein, we model a DT that encompasses a digital physical model for reflecting the physical operation mechanism and a neural network model (i.e., a parallel network of convolution and bidirectional long-short-term memory model) for capturing the hidden spatial-temporal features. The proposed method enables the use of the DT to take advantages of the digital physical model and the neural network model, resulting in enhanced prediction accuracy. Finally, a real data set is conducted to access the effectiveness of the proposed method.

14 SOLAR ENERGY↗

Titan probe technology assessment and technology development plan study

The need for technology advances to accomplish the Titan probe mission was determined by defining mission conditions and requirements and evaluating the technology impact on the baseline probe configuration. Mission characteristics found to be technology drivers include (1) ten years dormant life in space vacuum; (2) unknown surface conditions, various sample materials, and a surface temperature; and (3) mission constraints of the Saturn Orbiter Dual Probe mission regarding weight allocation. The following areas were identified for further development: surface sample acquisition system; battery powered system; nonmetallic materials; magnetic bubble memory devices, and the landing system. Preentry science, reliability, and weight reduction and redundancy must also be considered.

Castro, A. J.↗

Vortices, stability, and turbulence

The transition process between laminar flow to turbulent flow is discussed in terms of a third state of fluid motion, vortical motion that is approximately periodic in space and/or time and displays symmetrical properties. The possibility that the transition from laminar to turbulent flow is accompanied by intermediate vortical states, with turbulence being an instability of the vortical states, is examined, with consideration given to the hypothesis that the turbulent state retains a memory of the vortex structures. Solutions are sought for the Navier-Stokes equations for a viscous liquid in a channel. Instances of inviscid vortical states and the presence of a three-dimensional instability are studied, demonstrating that transition phenomena can be explained qualitatively in terms of vortical state characteristics.

Saffman, P. G.↗

Holographic optical interconnects for VLSI

This paper introduces new applications and design trade-offs anticipated for free-space optical interconnections of VLSI chips. New implementation s of VLSI functions are described that use the capability of making optical inputs at any point on a chip and take advantage of greater flexibility in on-chip signal routing. These include n-port addressable memories, CPU clock phase distribution, hardware multipliers, and dynamic memory refresh, as well as enhanced testability. Fault tolerance and production yields may be improved by reprogramming the optical imaging system to circumvent defective elements. These attributes, as well as those related to performance alone, will affect the design methodology of future VLSI ICs. This paper focuses on identifying the design issues, their possible solutions, and their impact on VLSI design techniques and, finally, presents some preliminary measurements on various system components.

Bergman, L. A.↗

Acoustic charge transport technology investigation for advanced development transponder

Acoustic charge transport (ACT) technology has provided a basis for a new family of analog signal processors, including a programmable transversal filter (PTF). Through monolithic integration of ACT delay lines with GaAs metal semiconductor field effect transistor (MESFET) digital memory and controllers, these devices significantly extend the performance of PTF's. This article introduces the basic operation of these devices and summarizes their present and future specifications. The production and testing of these devices indicate that this new technology is a promising one for future space applications.

Kayalar, S.↗

A quick uplink, expandable executable for the NSSC-1 of the Hubble Space Telescope

The Hubble Space Telescope, launched in April 1990, contains two primary on-board computers. In the past, modifications to the flight software have been accomplished via patches to the on-board executable image (performed while software is executing) or via halt and reload of the computer memory with a new flight software version. This paper describes a method of reloading flight software with a new software version while continuing the onboard execution of a reduced set of spacecraft payload functions.

Foley, Glenn T.↗

Coarse-Grain Bandwidth Estimation Scheme for Large-Scale Network

A large-scale network that supports a large number of users can have an aggregate data rate of hundreds of Mbps at any time. High-fidelity simulation of a large-scale network might be too complicated and memory-intensive for typical commercial-off-the-shelf (COTS) tools. Unlike a large commercial wide-area-network (WAN) that shares diverse network resources among diverse users and has a complex topology that requires routing mechanism and flow control, the ground communication links of a space network operate under the assumption of a guaranteed dedicated bandwidth allocation between specific sparse endpoints in a star-like topology. This work solved the network design problem of estimating the bandwidths of a ground network architecture option that offer different service classes to meet the latency requirements of different user data types. In this work, a top-down analysis and simulation approach was created to size the bandwidths of a store-and-forward network for a given network topology, a mission traffic scenario, and a set of data types with different latency requirements. These techniques were used to estimate the WAN bandwidths of the ground links for different architecture options of the proposed Integrated Space Communication and Navigation (SCaN) Network. A new analytical approach, called the "leveling scheme," was developed to model the store-and-forward mechanism of the network data flow. The term "leveling" refers to the spreading of data across a longer time horizon without violating the corresponding latency requirement of the data type. Two versions of the leveling scheme were developed: 1. A straightforward version that simply spreads the data of each data type across the time horizon and doesn't take into account the interactions among data types within a pass, or between data types across overlapping passes at a network node, and is inherently sub-optimal. 2. Two-state Markov leveling scheme that takes into account the second order behavior of the store-and-forward mechanism, and the interactions among data types within a pass. The novelty of this approach lies in the modeling of the store-and-forward mechanism of each network node. The term store-and-forward refers to the data traffic regulation technique in which data is sent to an intermediate network node where they are temporarily stored and sent at a later time to the destination node or to another intermediate node. Store-and-forward can be applied to both space-based networks that have intermittent connectivity, and ground-based networks with deterministic connectivity. For groundbased networks, the store-and-forward mechanism is used to regulate the network data flow and link resource utilization such that the user data types can be delivered to their destination nodes without violating their respective latency requirements.

Cheung, Kar-Ming↗

Multiprocessor architectural study

An architectural design study was made of a multiprocessor computing system intended to meet functional and performance specifications appropriate to a manned space station application. Intermetrics, previous experience, and accumulated knowledge of the multiprocessor field is used to generate a baseline philosophy for the design of a future SUMC* multiprocessor. Interrupts are defined and the crucial questions of interrupt structure, such as processor selection and response time, are discussed. Memory hierarchy and performance is discussed extensively with particular attention to the design approach which utilizes a cache memory associated with each processor. The ability of an individual processor to approach its theoretical maximum performance is then analyzed in terms of a hit ratio. Memory management is envisioned as a virtual memory system implemented either through segmentation or paging. Addressing is discussed in terms of various register design adopted by current computers and those of advanced design.

Kosmala, A. L.↗

Self-structured, current aperture approach for bubble memory

An approach to magnetic bubble memory which incorporates dual conductor current access drive with a self-structured (strongly interacting) bubble lattice is described. This is expected to provide higher operating speeds, defect tolerance, and higher bit density for a given bubble size as compared to present field access bubble devices. Bubble spacings of 2.5 bubble diameters are projected for a prototype device. Experimental work on device components including detectors, major/minor loops, and gates is described. Defect tolerance has also been demonstrated.

Nelson, G. L.↗

Computation and parallel implementation for early vision

The problem of early vision is to transform one or more retinal illuminance images-pixel arrays-to image representations built out of such primitive visual features such as edges, regions, disparities, and clusters. These transformed representations form the input to later vision stages that perform higher level vision tasks including matching and recognition. Researchers developed algorithms for: (1) edge finding in the scale space formulation; (2) correlation methods for computing matches between pairs of images; and (3) clustering of data by neural networks. These algorithms are formulated for parallel implementation of SIMD machines, such as the Massively Parallel Processor, a 128 x 128 array processor with 1024 bits of local memory per processor. For some cases, researchers can show speedups of three orders of magnitude over serial implementations.

Gualtieri, J. Anthony↗

Ambient temperature recorder

A temperature data recorder, designated the Ambient Temperature Recorder (ATR-4), was developed at NASA Ames Research Center to meet particular requirements for space life sciences experiments. The small, self-contained, four-channel, battery-powered device records 32 kilobytes of temperature data over a range of -40 to +60 C at four sampling intervals ranging from 1.875 to 15 minutes. Data is stored in its internal electronic memory for later readout by a personal computer.

Russell, Larry D.↗

Constructing Space-Time Views from Fixed Size Statistical Data: Getting the Best of Both Worlds

Many performance monitoring tools are currently available to the super-computing community. The performance data gathered and analyzed by these tools fall under two categories: statistics and event traces. Statistical data is much more compact but lacks the probative power event traces offer. Event traces, on the other hand, can easily fill up the entire file system during execution such that the instrumented execution may have to be terminated half way through. In this paper, we propose an innovative methodology for performance data gathering and representation that offers a middle ground. The user can trade-off tracing overhead, trace data size vs. data quality incrementally. In other words, the user will be able to limit the amount of trace collected and, at the same time, carry out some of the analysis event traces offer using spacetime views for the entire execution. Two basic ideas are employed: the use of averages to replace recording data for each instance and "formulae" to represent sequences associated with communication and control flow. With the help of a few simple examples, we illustrate the use of these techniques in performance tuning and compare the quality of the traces we collected vs. event traces. We found that the trace files thus obtained are, in deed, small, bounded and predictable before program execution and that the quality of the space time views generated from these statistical data are excellent. Furthermore, experimental results showed that the formulae proposed were able to capture 100% of all the sequences associated with 11 of the 15 applications tested. The performance of the formulae can be incrementally improved by allocating more memory at run-time to learn longer sequences.

Schmidt, Melisa↗