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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 793 records · Page 44
All sourcesNASA NTRSDOE OSTI
NASA NTRS2004

Advanced Power Electronics Components

This paper will give a description and status of the Advanced Power Electronics Materials and Components Technology program being conducted by the NASA Glenn Research Center for future aerospace power applications. The focus of this research program is on the following: 1) New and/or significantly improved dielectric materials for the development of power capacitors with increased volumetric efficiency, energy density, and operating temperature. Materials being investigated include nanocrystalline and composite ceramic dielectrics and diamond-like carbon films; 2) New and/or significantly improved high frequency, high temperature, low loss soft magnetic materials for the development of transformers/inductors with increased power/energy density, electrical efficiency, and operating temperature. Materials being investigated include nanocrystalline and nanocomposite soft magnetic materials; 3) Packaged high temperature, high power density, high voltage, and low loss SiC diodes and switches. Development of high quality 4H- and 6H- SiC atomically smooth substrates to significantly improve device performance is a major emphasis of the SiC materials program; 4) Demonstration of high temperature (> 200 C) circuits using the components developed above.

Schwarze, Gene E.↗
DOE OSTI2023

Ionomer-free nanoporous iridium nanosheet electrodes with boosted performance and catalyst utilization for high-efficiency water electrolyzers

Increasing the catalyst utilization efficiency and simplifying electrode fabrication processes are crucial to accelerate development of low-cost proton exchange membrane electrolyzer cells (PEMECs). Here, we develop a facile route to fabricate ionomer-free iridium nanosheet integrated electrodes, in which nanoporous iridium nanosheets (IrNS) with abundant exposed edges and nanopores are deposited on thin titanium liquid/gas diffusion layers (TT-LGDLs) via a low-temperature chemical synthesis strategy. Further, benefiting from high catalytic activity, good electrode conductivity and excellent liquid/gas transport properties, such nanoporous IrNS electrodes with low catalyst loadings require low cell voltages of 1.65 V and 1.78 V at 3000 and 6000 mA/cm 2 , respectively. More impressively, a stable performance can be well maintained under extremely high current density tests of 5000 mA/cm 2 , demonstrating the potential of low-loading nanoporous IrNS electrodes in solid-electrolyte based electrochemical conversion cells that require high current density operation.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
NASA NTRS1975

Effects of high doping levels on silicon solar cell performance

Open-circuit voltages measured in silicon solar cells made from 0.01 ohm-cm material are 150 mV lower than voltages calculated from simple diffusion theory and cannot be explained by poor diffusion lengths or surface leakage currents. An analytical study was made to determine whether high doping effects, which increase the intrinsic carrier concentration, could account for the low observed voltages and to determine the limits on voltage and efficiency imposed by high doping effects. The results indicate that the observed variation of voltage with base resistivity is predicted by these effects. A maximum efficiency of 19% (AMO) and a voltage of 0.7 volts were calculated for 0.1 ohm-cm cells assuming an optimum diffused layer impurity profile.

Godlewski, M. P.↗
DOE OSTI2019

Reduced Common-Mode Voltage PWM Scheme for Full-SiC Three-Level Uninterruptible Power Supply With Small DC-Link Capacitors

In this article, a pulsewidth modulation (PWM) scheme for three-level full-SiC uninterruptible power supplies is developed to achieve a high power density. Two key passive components are selected for size reduction of the ac-ac stage: common-mode (CM) EMI filter, and dc-link capacitors. To reduce the CM noise, a new vector combination is proposed based on synchronous switching among three-phases. The proposed combinations align CM voltage (CMV) to be a single pulse per switching period. Owing to the simple shape, CMV cancellation between a three-level rectifier and inverter can be maximally utilized. A transition between the three combinations can control the drift of neutral point voltage. An equivalent carrier-based implementation is developed. Second, a simple algorithm to compensate neutral point voltage fluctuation is proposed both for differential mode (DM) and CM output voltage. Low-order harmonics on three-phase currents and an additional high-frequency CM noise by misaligned switching instant can be eliminated. The proposed compensation can be implemented by a simple correction on carrier slopes and injected zero-sequence voltage. The proposed PWM scheme is verified with 20-kW full-SiC UPS switching at 60 kHz with 140 μF dc-link capacitors.

42 ENGINEERING↗
DOE OSTI2022

Low-power anisotropic molecular electronic memristors

A molecular electronic memristor, programmable resistive memory device, promises to revolutionize next-generation flexible data storage units, offering fast, dense and ultralow power solutions. Here we report anisotropic resistive switching in molecular κ-(BEDT-TTF) 2 Cu[N(CN) 2 ]Cl memristors, consisting of alternatively segregated bis(ethylenedithio)tetrathiafulvalene (BEDT-TTF) and Cu[N(CN) 2 ]Cl layers. Electron resistance switching behavior controlled by charge tunneling in molecular memristors show a low set voltage of 0.5 V (10 V/cm) with the ON/OFF ratio of 2.3×10 3 along a-axis and a high-level endurance of 1.25×10 4 cycles along all axes. Finally, the findings of such molecular electronic crystals promise for low-power data storage memristors.

36 MATERIALS SCIENCE↗
NASA NTRS2008

Characterizing ISS Charging Environments with On-Board Ionospheric Plasma Measurements

Charging of the International Space Station (ISS) is dominated by interactions of the biased United States (US) 160 volt solar arrays with the relatively high density, low temperature plasma environment in low Earth orbit. Conducting surfaces on the vehicle structure charge negative relative to the ambient plasma environment because ISS structure is grounded to the negative end of the US solar arrays. Transient charging peaks reaching potentials of some tens of volts negative controlled by photovoltaic array current collection typically occur at orbital sunrise and sunset as well as near orbital noon. In addition, surface potentials across the vehicle structure vary due to an induced v x B (dot) L voltage generated by the high speed motion of the conducting structure across the Earth's magnetic field. Induced voltages in low Earth orbit are typically only approx.0.4 volts/meter but the approx.100 meter scale dimensions of the ISS yield maximum induced potential variations ofapprox.40 volts across the vehicle. Induced voltages are variable due to the orientation of the vehicle structure and orbital velocity vector with respect to the orientation of the Earth's magnetic field along the ISS orbit. In order to address the need to better understand the ISS spacecraft potential and plasma environments, NASA funded development and construction of the Floating Potential Measurement Unit (FPMU) which was deployed on an ISS starboard truss arm in August 2006. The suite of FPMU instruments includes two Langmuir probes, a plasma impedance probe, and a potential probe for use in in-situ monitoring of electron temperatures and densities and the vehicle potential relative to the plasma environment. This presentation will describe the use of the FPMU to better characterize interactions of the ISS with the space environment, changes in ISS charging as the vehicle configuration is modified during ISS construction, and contributions of FPMU vehicle potential and plasma environment measurements to investigations of on-orbit anomalies in ISS systems.

Minow, Jospeh I.↗
DOE OSTI2020

A Sensorless Coil Detection Scheme based on Dead-Time Effect in Dynamic Wireless Power Transfer Systems

The detection of electric vehicles in dynamic wireless power transfer (DWPT) systems is important to reduce the standby losses and comply with the electromagnetic-field emission guidelines recommended by the International Commission for Non-Ionizing Radiation Protection. This paper discusses a novel sensorless coil detection scheme, which exploits the phenomenon of voltage-polarity reversal/notches caused by the dead-time effect in the full-bridge inverter. The variations in the system impedance and dead-time effects are collectively exploited to detect the receiver coil in the DWPT system. The proposed coil detection scheme is accomplished at low excitation voltage, which reduces the inverter standby losses. The theoretical analysis of the notch occurrence and open-loop simulation results are presented using a DWPT model developed in the piecewise linear electrical circuit simulation software.

Kavimandan, Utkarsh↗
DOE OSTI2020

Negligible voltage hysteresis with strong anionic redox in conventional battery electrode

Lattice anionic (oxygen) redox reactions (ARR) offers opportunities for developing high-capacity batteries, however, often suffers the notoriously high hysteresis in voltages and low initial coulombic efficiency. Particularly, ARR was widely considered inherent to these kinetic issues. Here, unambiguous evidences of strong and reversible ARR is found in Na 2/3 Ni 1/3 Mn 2/3 O 2 through mapping of resonant inelastic X-ray scattering (mRIXS). Strikingly, the material displays negligible voltage hysteresis (0.1 V) and high initial coulombic efficiency with a highly stable electrochemical profile. Our independent analysis of the Ni, Mn and O states consistently interpret the redox mechanism of Na 2/3 Ni 1/3 Mn 2/3 O 2 , which reveals a strong ARR system with facile kinetics and highly stable electrochemical profile that previously found only in cationic redox systems of conventional non-Alkali-rich materials.

25 ENERGY STORAGE↗
NASA NTRS1985

Computer simulation of plasma electron collection by PIX-II

A wake model was defined for the NASCAP/LEO finite element model for the plasma interaction experiment (PIX-II) launched to study the interaction between high-voltage large solar arrays with the space plasma environment. The cell surface model considers the individual cells, distances between interconnects, and the fraction of surface covered by interconnects. Account is taken of the electrostatic potential around the spacecraft, which travels at 7500 mps, over five times the speed of thermal ions. Ram ions are produced ahead of the array and the wake ion density is described with a geometric shadowing model. The model correctly predicted the currents in high and low bias voltages when compared to orbital data. The panel snapover, however, was projected to occur at 100 V and instead occurred at 300 V, which indicates that the snapover state is bistable. Finally, a low potential was both predicted and measured in the wake.

Mandell, M. J.↗
NASA NTRS1989

The application of Dow Chemical's perfluorinated membranes in proton-exchange membrane fuel cells

Dow Chemical's research activities in fuel cells revolve around the development of perfluorosulfonic acid membranes useful as the proton transport medium and separator. Some of the performance characteristics which are typical for such membranes are outlined. The results of tests utilizing a new experimental membrane useful in proton-exchange membrane fuel cells are presented. The high voltage at low current densities can lead to higher system efficiencies while, at the same time, not sacrificing other critical properties pertinent to membrane fuel cell operation. A series of tests to determine response times indicated that on-off cycles are on the order of 80 milliseconds to reach 90 percent of full power. The IR free voltage at 100 amps/sq ft was determined and the results indicating a membrane/electrode package resistance to be .15 ohm-sq cm at 100 amps/sq ft.

Eisman, G. A.↗
DOE OSTI2023

Reversible Electrochemical Lithium Cycling in a Vanadium(IV)- and Niobium(V)-Based Wadsley–Roth Phase

Fast charging remains one of the greatest safety challenges in Li-ion batteries due to Li-dendrite growth occurring on graphite anodes if they are lithiated too quickly. The search for high-rate anodes has highlighted materials in the Wadsley–Roth (WR) shear phase family. The relative abundance of V compared with traditional WR compositions of Nb and W makes V-based phases attractive. However, the high voltage and poor reversibility typically associated with V redox have made V-rich WR phases less studied than Nb- and W-rich phases. Here, we show that a new V-rich Wadsley–Roth phase, V 7 Nb 6 O 29 , achieves excellent rate capability and 80% capacity retention after 228 cycles with a relatively low average voltage of 1.76 V vs Li/Li + compared with other V-rich WR phases. Single-crystal X-ray diffraction reveals a P4/m space group with repeating 2 × 2 × ∞ and 3 × 3 × ∞ blocks of V 4+ and Nb 5+ octahedra. Finally, combined neutron pair distribution function analysis, X-ray absorption spectroscopy, and density functional theory calculations show that V redox is the primary source of capacity and that cycling stability is provided by the stable octahedral coordination adopted by V 4+ in the material.

25 ENERGY STORAGE↗
DOE OSTI2024

Lattice engineering of high-entropy olivine-type lithium metal phosphate as high-voltage cathodes

Engineering of high-entropy cathode materials for lithium-ion batteries has been actively pursued owing to the outstanding conductivity of high-entropy materials benefited from the maximum entropy and unique antisite disordering structure. Olivine lithium metal phosphates such as LiMnPO 4 and LiNiPO 4 feature high working voltages but low capacities due to their insulation nature. Here in this work, the synthesis of the high-entropy lithium metal phosphate materials (HELMPs) is realized by combining mechanochemistry with a calcination method. By regulating lattice of HELMPs, the high-entropy Li(Mn 0.35 Fe 0.35 Co0.1Mg 0.1 Ca 0.1 )PO 4 reveals three typical high-voltage plateaus in charge–discharge curves corresponding to the redox of Fe, Mn, and Co in the voltage range of 2.0–4.9 V vs Li + /Li, and a much higher initial capacity than LiMnPO 4 (104 vs 15 mAh g -1 ).

25 ENERGY STORAGE↗
DOE OSTI2026

Electrostatic Gating of Ionic Conductance through Heterogeneous van der Waals Nanopores

Nanofluidic ionic transistors typically require gate voltages above 1 V and operate only at submillimolar ionic strengths, limiting their biocompatible applications. We demonstrate ionic transistors consisting of single sub-10 nm nanopores drilled in van der Waals (vdW) heterostructures with internal gate electrodes made of few-layer graphene. These devices deliver up to 10-fold current modulation at gate voltages as low as 0.3 V in 10 mM KCl, and ∼2-fold modulation at near-physiological 100 mM KCl. Baseline conductance with no gate shows surface-charge-dominated transport below 100 mM KCl, consistent with negatively charged hBN walls and ∼5 nm opening of the pores. The surface charge and the electrochemical asymmetry introduced by the three-electrode configuration govern the device’s behavior: negative gate voltage (V G ) enriches ionic concentrations and enhances current, whereas positive V G induces a local depletion zone that suppresses transport. The current modulation by V G is dependent on the polarity of the transmembrane potential and leads to ion current rectification. Molecular dynamics simulations of a nanopore in a hBN–graphene–hBN stack reveal confinement and surface charge-dependent suppression of the relative permittivity of interfacial water. Continuum modeling with radially varying interfacial water permittivity reproduces the asymmetric I–V characteristics and explains how the embedded gate sculpts local potential and ion concentrations. By enabling sub-0.5 V control of ionic transport at up to 100 mM salt concentrations, these devices address a key need in nanofluidics to create low-power ionic circuits and biosensing.

Materials science↗
NASA NTRS2000

Hierarchical Statistical 3D ' Atomistic' Simulation of Decanano MOSFETs: Drift-Diffusion, Hydrodynamic and Quantum Mechanical Approaches

When MOSFETs are scaled to deep submicron dimensions the discreteness and randomness of the dopant charges in the channel region introduces significant fluctuations in the device characteristics. This effect, predicted 20 year ago, has been confirmed experimentally and in simulation studies. The impact of the fluctuations on the functionality, yield, and reliability of the corresponding systems shifts the paradigm of the numerical device simulation. It becomes insufficient to simulate only one device representing one macroscopical design in a continuous charge approximation. An ensemble of macroscopically identical but microscopically different devices has to be characterized by simulation of statistically significant samples. The aims of the numerical simulations shift from predicting the characteristics of a single device with continuous doping towards estimating the mean values and the standard deviations of basic design parameters such as threshold voltage, subthreshold slope, transconductance, drive current, etc. for the whole ensemble of 'atomistically' different devices in the system. It has to be pointed out that even the mean values obtained from 'atomistic' simulations are not identical to the values obtained from continuous doping simulations. In this paper we present a hierarchical approach to the 'atomistic' simulation of aggressively scaled decanano MOSFETs. A full scale 3D drift-diffusion'atomostic' simulation approach is first described and used for verification of the more economical, but also more restricted, options. To reduce the processor time and memory requirements at high drain voltage we have developed a self-consistent option based on a thin slab solution of the current continuity equation only in the channel region. This is coupled to the Poisson's equation solution in the whole simulation domain in the Gummel iteration cycles. The accuracy of this approach is investigated in comparison with the full self-consistent solution. At low drain voltage only single solution of the nonlinear Poisson equation is sufficient to extract the current with satisfactory accuracy. A pilot version of a hydrodynamic 'atomistic' simulator has been developed in order to study the effect of the nonequilibrium, non local transport in decanano MOSFETs on the random dopant induced current fluctuations. For the first time we have also applied the density gradient approach in 3D to investigate the effect of the quantum confinement on the threshold voltage fluctuations. The developed 'atomistic' simulation techniques have been applied to study various fluctuation resistant MOSFET architectures including epitaxial and delta doped devices.

Asenov, Asen↗
NASA NTRS1999

Hierarchical Approach to 'Atomistic' 3-D MOSFET Simulation

We present a hierarchical approach to the 'atomistic' simulation of aggressively scaled sub-0.1 micron MOSFET's. These devices are so small that their characteristics depend on the precise location of dopant atoms within them, not just on their average density. A full-scale three-dimensional drift-diffusion atomistic simulation approach is first described and used to verify more economical, but restricted, options. To reduce processor time and memory requirements at high drain voltage, we have developed a self-consistent option based on a solution of the current continuity equation restricted to a thin slab of the channel. This is coupled to the solution of the Poisson equation in the whole simulation domain in the Gummel iteration cycles. The accuracy of this approach is investigated in comparison to the full self-consistent solution. At low drain voltage, a single solution of the nonlinear Poisson equation is sufficient to extract the current with satisfactory accuracy. In this case, the current is calculated by solving the current continuity equation in a drift approximation only, also in a thin slab containing the MOSFET channel. The regions of applicability for the different components of this hierarchical approach are illustrated in example simulations covering the random dopant-induced threshold voltage fluctuations, threshold voltage lowering, threshold voltage asymmetry, and drain current fluctuations.

Asenov, Asen↗
DOE OSTI2021

A High-Frequency Planar Transformer with Medium-Voltage Isolation: Preprint

This paper presents the design of a low-loss, high-frequency planar transformer having medium-voltage (10's of kV) isolation capability while transformer primary and secondary windings are interleaved to reduce losses. Medium-voltage isolation between adjacent printed circuit board (PCB) layers is extremely challenging using traditional PCB dielectrics. The isolation requirement is met using PCB with $7$\,kV/mil polyimide (Panasonic Felios RF775) as the dielectric, and by an appropriate layout of the windings and the inter-winding vias. The transformer is used to implement a dual active bridge (DAB) converter in a stackable dc-ac architecture where the dc port is connected to a photovoltaic (PV) string and ac outputs are connected in series to achieve direct PV string-to-medium voltage conversion without the need for low-voltage collection or a bulky line frequency transformer. Since each DAB transformer processes time-varying power, a design methodology is developed to minimize line-cycle-averaged losses. Experimental results are presented for a 1:1 planar transformer in a 7.5\,kW SiC-based dc-to-ac module operating at 200 kHz. Isolation of 26 kV between the primary and secondary layers and between the windings and the core is verified using a hipot tester.

41 EE - Solar Energy Technologies Office (EE-4S)↗
NASA NTRS2020

Testing

Testing is conducted to verify that the connectors will properly perform over time (reliability) per the application requirements. Testing by the manufacturer usually involves performance testing per the datasheet requirements. However, the customer may have applications that require performance under unique operational and environmental conditions. In general, electrical tests for connectors include dielectric withstanding voltage, low-signal-level contact resistance, insulation resistance, contact resistance, and standing wave ratio. Environmental tests include humidity, temperature, and contaminating conditions, as well as mechanical stress environments including vibration, mechanical shock, and durability cycling exposures.

Connectors, testing, Dielectric Withstanding Volta↗
NASA NTRS2006

Single-Event Upset and Scaling Trends in New Generation of the Commercial SOI PowerPC Microprocessors

SEU from heavy-ions is measured for SOI PowerPC microprocessors. Results for 0.13 micron PowerPC with 1.1V core voltages increases over 1.3V versions. This suggests that improvement in SEU for scaled devices may be reversed. In recent years there has been interest in the possible use of unhardened commercial microprocessors in space because of their superior performance compared to hardened processors. However, unhardened devices are susceptible to upset from radiation space. More information is needed on how they respond to radiation before they can be used in space. Only a limited number of advanced microprocessors have been subjected to radiation tests, which are designed with lower clock frequencies and higher internal core voltage voltages than recent devices [1-6]. However the trend for commercial Silicon-on-insulator (SOI) microprocessors is to reduce feature size and internal core voltage and increase the clock frequency. Commercial microprocessors with the PowerPC architecture are now available that use partially depleted SOI processes with feature size of 90 nm and internal core voltage as low as 1.0 V and clock frequency in the GHz range. Previously, we reported SEU measurements for SOI commercial PowerPCs with feature size of 0.18 and 0.13 m [7, 8]. The results showed an order of magnitude reduction in saturated cross section compared to CMOS bulk counterparts. This paper examines SEUs in advanced commercial SOI microprocessors, focusing on SEU sensitivity of D-Cache and hangs with feature size and internal core voltage. Results are presented for the Motorola SOI processor with feature sizes of 0.13 microns and internal core voltages of 1.3 and 1.1 V. These results are compared with results for the Motorola SOI processors with feature size of 0.18 microns and internal core voltage of 1.6 and 1.3 V.

Irom, Farokh↗