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At least 793 records · Page 44

Experimentally Observed Electrical Durability of 4H-SiC JFET ICs Operating from 500 C to 700 C

Prolonged 500 degrees Celsius to 700 degrees Celsius electrical testing data from 4H-SiC junction field effect transistor (JFET) integrated circuits (ICs) are combined with post-testing microscopic studies in order to gain more comprehensive understanding of the durability limits of the present version of NASA Glenn's extreme temperature microelectronics technology. The results of this study support the hypothesis that T ≥ 500 degrees Celsius durability-limiting IC failure initiates with thermal-stress-related crack formation where dielectric passivation layers overcoat micron-scale vertical features including patterned metal traces.

high temperature↗

Multi-Gbps Fiber-Optic Wavefront Sensing Coherent Optical Receiver

We report recent progress on technology developments at the NASA Glenn Research Center using photonic lanterns for coherent optical communications applications. In particular, the development of a spatial mode-diversity optical receiver using a photonic lantern combined with a photonic integrated circuit (PIC). The PIC is designed for compatibility with the NASA Laser Communication Relay Demonstration’s (LCRD) differential phase-shift keying signaling format. We report on the PIC design and future characterization and packaging efforts. Additionally, we report on the development of a 19-channel photonic lantern and provide updates on efforts to use the photonic lantern as a wavefront sensing device. The photonic lantern insertion loss, and spatial-mode transfer characteristics are detailed, as well as the development of a predictive framework in which the intensities in the 19 single-mode output channels are used to reconstruct the wavefront of the light entering the multi-moded input side of the lantern. Finally, we discuss concepts for potential future systems using photonic lanterns and PICs that combine both wavefront sensing and coherent communications onto a single integrated platform.

Optical Communications↗

Beyond G-band : a 235 GHz InP MMIC amplifier

We present results on an InP monolithic millimeter- wave integrated circuit (MMIC) amplifier having 10-dB gain at 235 GHz. We designed this circuit and fabricated the chip in Northrop Grumman Space Technology's (NGST) 0.07- m InP high electron mobility transistor (HEMT) process. Using a WR3 (220-325 GHz) waveguide vector network analyzer system interfaced to waveguide wafer probes, we measured this chip on-wafer for -parameters. To our knowledge, this is the first time a WR3 waveguide on-wafer measurement system has been used to measure gain in a MMIC amplifier above 230 GHz.

high electron mobility transistors (HEMTs)↗

A 75-116-Ghz LNA with 23-K Noise Temperature at 108 Ghz

In this paper we present the design and measurement results, both on-wafer and in package, of an ultra-low-noise and wideband monolithic microwave integrated circuit (MMIC) amplifier in the frequency range of 75 to 116 GHz. The three-stage amplifier packaged in a WR10 waveguide housing and fabricated using a 35-nm InP HEMT technology achieves a record noise temperature of 23 K at 108 GHz when cryogenically cooled to 27 K. The measured gain is 22 to 27 dB for frequency range of 75 to 116 GHz. Furthermore, the amplifier utilizes four finger devices with total gate width of 60 um resulting for improved linearity.

monolithic microwave integrated circuit (MMIC)↗

Toward an integrated multi-gigahertz ionizing particle diagnostic

Needs arising at both current and future accelerator facilities call for the development of radiation-hardened position-sensing diagnostics that can operate with multi-GHz repetition rates. Such instruments are likely to also have applications in the diagnosis of rapid plasma behavior. Here, building on the recent work of our Advanced Accelerator Diagnostics Collaboration, we are exploring the development of integrated multi-GHz ionizing particle detection systems based on chemical-vapor deposition diamond sensors, with the initial goal of producing a quadrant detector that can determine the intensity and centroid position of a particle beam at a repetition rate between 5 and 10 GHz. Results from our initial high-speed characterization work are presented, including those from a single-channel sensor with a GHz response. Approaches to achieving multi-GHz (5–10 GHz) rate capability, including the design of a dedicated Application Specific Integrated Circuit and the use of 3D RF-solver computer aided design software, are presented and discussed in more detail. 3D RF simulations suggest clean pulses of duration less than 250 ps (FWHM less than 125 ps) can be achieved with the approaches developed by this work.

43 PARTICLE ACCELERATORS↗

Operational Testing of 4H-SiC JFET ICs for 60 Days Directly Exposed to Venus Surface Atmospheric Conditions

Prolonged Venus surface missions (lasting months instead of hours) have proven infeasible to date in the absence of a complete suite of electronics able to function for such durations without protection from the planet’s extreme conditions of ~460 °C, ~9.3 MPa (~ 92 Earth atmospheres) chemically reactive environment. Here we report testing data from a successful two-month (60-day) operational demonstration of two 175-transistor 4H-SiC junction field effect transistor (JFET) semiconductor integrated circuits (ICs) directly exposed (no cooling and no protective chip packaging) to a high-fidelity physical and chemical reproduction of Venus surface atmospheric conditions in a test chamber. These results extend the longest reported duration of electronics operation in Venus surface atmospheric conditions almost 3-fold and were accomplished using prototype SiC JFET chips of more than 7-fold increased complexity. The demonstrated advancement marks a significant step towards realization of electronics with sufficient complexity and durability for implementing robotic landers capable of returning months of scientific data from the surface of Venus.

Integrated Circuit↗

Capturing a failure of an ASIC in-situ, using infrared radiometry and image processing software

Failures in electronic devices can sometimes be tricky to locate-especially if they are buried inside radiation-shielded containers designed to work in outer space. Such was the case with a malfunctioning ASIC (Application Specific Integrated Circuit) that was drawing excessive power at a specific temperature during temperature cycle testing. To analyze the failure, infrared radiometry (thermography) was used in combination with image processing software to locate precisely where the power was being dissipated at the moment the failure took place. The IR imaging software was used to make the image of the target and background, appear as unity. As testing proceeded and the failure mode was reached, temperature changes revealed the precise location of the fault. The results gave the design engineers the information they needed to fix the problem. This paper describes the techniques and equipment used to accomplish this failure analysis.

infrared↗

Finite Ground Coplanar (FGC) Waveguide: A Better Transmission Line for Microwave Circuits

A new version of coplanar waveguide (CPW) with electrically narrow ground strips 14 has been developed for microwave integrated circuits. This transmission line, referred to by Finite Ground Coplanar (FGC) waveguide, has several advantages over conventional coplanar waveguide. Since the ground strips are narrow, parasitic resonances that develop when the CPW is placed on a carrier or in a package are eliminated. In addition, the narrow ground strips permit the integration of lumped and distributed circuit elements in the ground strips as well as in the center strip to reduce the circuit size and improve its performance. Finally, the coupling between adjacent FGC transmission lines is lower than the coupling between CPW lines for the same spacing between the lines. All of these attributes of FGC are presented in this paper.

Ponchak, George E.↗

Amplifier improvement circuit

Stable input stage was designed for the use with a integrated circuit operational amplifier to provide improved performance as an instrumentation-type amplifier. The circuit provides high input impedance, stable gain, good common mode rejection, very low drift, and low output impedance.

Sturman, J.↗

Integrated Power and Attitude Control System (IPACS)

Recent advances in materials, circuit integration and power switching have given the concept of dynamic energy and momentum storage important weight size, and operational advantages over the conventional momentum wheel-battery configuration. Simultaneous momentum and energy storage for a three axes stabilized spacecraft can be accomplished with a topology of at least four wheels where energy (a scalar) is stored or retrieved in such a manner as to keep the momentum vector invariant. This study, instead, considers the case of two counter-rotating wheels in one axis to more effectively portray the principles involved. General scalable system design equations are derived which demonstrate the role of momentum storage when combined with energy storage.

Michaelis, Theodore D.↗

Temperature-Adaptive Circuits on Reconfigurable Analog Arrays

Demonstration of a self-reconfigurable Integrated Circuit (IC) that would operate under extreme temperature (-180 C and 120 C) and radiation (300krad), without the protection of thermal controls and radiation shields. Self-Reconfigurable Electronics platform: a) Evolutionary Processor (EP) to run reconfiguration mechanism; b) Reconfigurable chip (FPGA, FPAA, etc).

self-recovery↗

Plasma-based method for delayering of circuits

The present invention relates to methods of delayering a semiconductor integrated circuit die or wafer. In at least one aspect, the method includes exposing a die or wafer to plasma of an etching gas and detecting exposure of one or more metal layers within the die. In one aspect of the invention, the plasma of the etching gas is non-selective and removes all materials in a layer at about the same rate. In another aspect of the invention, two different plasmas of corresponding etching gases are employed with each plasma of the etching gas being selective, thus necessitating the sequential use of both plasmas of corresponding etching gases to remove all materials in a layer.

Shul, Randy J.↗

In-pixel AI for lossy data compression at source for X-ray detectors

Integrating neural networks for data compression directly in the Read-Out Integrated Circuits (ROICs), i.e. the pixelated front-end, would result in a significant reduction in off-chip data transfer, overcoming the I/O bottleneck. Our ROIC test chip (AI-In-Pixel-65) is designed in a 65 nm Low Power CMOS process for the readout of pixelated X-ray detectors. Each pixel consists of an analog front-end for signal processing and a 10b analog-to-digital converter operating at 100KSPS. Here, we compare two non-reconfigurable techniques, Principal Component Analysis (PCA) and an AutoEncoder (AE) as lossy data compression engines implemented within the pixelated area. The PCA algorithm achieves 50$×$ compression, adds one clock cycle latency, and results in a 21% increase in the pixel area. The AE achieves 70$×$ compression, adds 30 clock cycle latency, and results in a similar area increase.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Power Actuation and Switching Module Development

The Deep Space Avionics (DSA) Project is developing a Power Actuation and Switching Module (PASM). This component enables a modular and scalable design approach for power switching applications, which can result in a wide variety of power switching architectures using this simple building block. The PASM is designed to provide most of the necessary power switching functions of spacecraft for various Deep Space missions including future missions to Mars, comets, Jupiter and its moons. It is fabricated using an A SIC process that is tolerant of high radiation. The development includes two application specific integrated circuits (ASICs) and support circuitry all packaged using High Density Interconnect (HDI) technology. It can be operated in series or parallel with other PASMs, It can be used as a high-side or low-side switch and it can drive thruster valves, pyrotechnic devices such as NASA standard initiators, bus shunt resistors, and regular spacecraft component loads. Each PASM contains two independent switches with internal current limiting and over-current trip-off functions to protect the power subsystem from load faults. During turnon and turnoff each switch can limit the rate of current change (di/dt) to a value determined by the user. Threeway majority-voted On/Off commandability and full switch status telemetry (both analog and digital) are built into the module. This paper describes the development process used to design, model, fabricate, and test these compact and versatile power switches. Preliminary test results from prototype HDI PASM hardware are also discussed.

Power Actuation and Switching Module (PASM)↗

Comparison of Hafnium Dioxide and Zirconium Dioxide Grown by Plasma-Enhanced Atomic Layer Deposition for the Application of Electronic Materials

We report the growth of nanoscale hafnium dioxide (HfO 2 ) and zirconium dioxide (ZrO 2 ) thin films using remote plasma-enhanced atomic layer deposition (PE-ALD), and the fabrication of complementary metal-oxide semiconductor (CMOS) integrated circuits using the HfO 2 and ZrO 2 thin films as the gate oxide. Tetrakis (dimethylamino) hafnium (Hf[N(CH 3 ) 2 ] 4 ) and tetrakis (dimethylamino) zirconium (IV) (Zr[N(CH 3 ) 2 ] 4 ) were used as the precursors, while O 2 gas was used as the reactive gas. The PE-ALD-grown HfO 2 and ZrO 2 thin films were analyzed using X-ray photoelectron spectroscopy (XPS), X-ray diffraction (XRD), and high-resolution transmission electron microscopy (HRTEM). The XPS measurements show that the ZrO 2 film has the atomic concentrations of 34% Zr, 2% C, and 64% O while the HfO 2 film has the atomic concentrations of 29% Hf, 11% C, and 60% O. The HRTEM and XRD measurements show both HfO 2 and ZrO 2 films have polycrystalline structures. n-channel and p-channel metal-oxide semiconductor field-effect transistors (nFETs and pFETs), CMOS inverters, and CMOS ring oscillators were fabricated to test the quality of the HfO 2 and ZrO 2 thin films as the gate oxide. Current-voltage (IV) curves, transfer characteristics, and oscillation waveforms were measured from the fabricated transistors, inverters, and oscillators, respectively. The experimental results measured from the HfO 2 and ZrO 2 thin films were compared.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

System-on-chip approach microwave imaging reflectometer on DIII-D tokamak

System-on-chip millimeter wave integrated circuit technology is used on the two-dimensional millimeter-wave imaging reflectometer (MIR) upgrade for density fluctuation imaging on the DIII-D tokamak fusion plasma. Customized CMOS chips have been successfully developed for the transmitter module and receiver module array, covering the 55–75 GHz working band. The transmitter module has the capability of simultaneously launching eight tunable probe frequencies (>0 dBm output power each). The receiver enclosure contains 12 receiver modules in two vertical lines. The quasi-optical local oscillator coupling of previous MIR systems has been replaced with an internal active frequency multiplier chain for improved local oscillator power delivery and flexible installation in a narrow space together with improved shielding against electromagnetic interference. The 55–75 GHz low noise amplifier, used between the receiver antenna and the first-stage mixer, significantly improves module sensitivity and suppresses electronics noise. The receiver module has a 20 dB gain improvement compared with the mini-lens approach and better than –75 dBm sensitivity, and its electronics noise temperature has been reduced from 55 000 K down to 11 200 K. Further, the V-band MIR system is developed for co-located multi-field investigation of MHD-scale fluctuations in the pedestal region with W-band electron cyclotron emission imaging on DIII-D tokamak.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Progress Towards Prolonged Deployment of SiC JFET-R ICs Into Previously Inaccessible Hostile Environments

This invited presentation describes demonstration of semiconductor integrated circuits (ICs) and ceramic packaging that are arguably the most environmentally durable transistor electronics ever demonstrated. SiC junction field effect transistor-resistor (JFET-R) ICs with two-level interconnect have successfully operated for over 1 year in 500 °C air-ambient [1], 60 days in 460 °C and 9.3 MPa pressure caustic Venus surface environment test chamber [2], and radiation exposure through 7 Mrad(Si) total ionizing dose (TID) and 86 MeV-cm2/mg heavy ion strikes [3]. Furthermore, these ICs have also demonstrated operation from -190 °C to +812 °C (over 1000 °C T-span) without significant change in signal (input /output) or power supply voltages [4]. With modest adjustments, the SiC JFET-R fabrication process is compatible with semiconductor mass-production tools and materials. As an initial step towards this end, the processing that forms the SiC JFETs and resistors (without interconnect) for the NASA Glenn “Generation 12” design prototype JFET-R ICs was conducted at GE Research. Once the COVID-delayed IC interconnect and bond pad fabrication processing on these wafers is completed at NASA Glenn, the resulting chips will be packaged and oven-tested [5]. It is expected that further technology transfer to complete commercial production will lower investment and risk barriers to useful application deployment. For NASA, an initial high-value deployment is opening the Venus surface to extended missions for robotic scientific exploration.

Silicon Carbide↗

A Reconfigurable Neural Network ASIC for Detector Front-End Data Compression at the HL-LHC

Despite advances in the programmable logic capabilities of modern trigger systems, a significant bottleneck remains in the amount of data to be transported from the detector to off-detector logic where trigger decisions are made. We demonstrate that a neural network (NN) autoencoder model can be implemented in a radiation-tolerant application-specific integrated circuit (ASIC) to perform lossy data compression alleviating the data transmission problem while preserving critical information of the detector energy profile. For our application, we consider the high-granularity calorimeter from the Compact Muon Solenoid (CMS) experiment at the CERN Large Hadron Collider. The advantage of the machine learning approach is in the flexibility and configurability of the algorithm. By changing the NN weights, a unique data compression algorithm can be deployed for each sensor in different detector regions and changing detector or collider conditions. To meet area, performance, and power constraints, we perform quantization-aware training to create an optimized NN hardware implementation. The design is achieved through the use of high-level synthesis tools and the hls4ml framework and was processed through synthesis and physical layout flows based on a low-power (LP)-CMOS 65-nm technology node. The flow anticipates 200 Mrad of ionizing radiation to select gates and reports a total area of 3.6 mm 2 and consumes 95 mW of power. The simulated energy consumption per inference is 2.4 nJ. Furthermore, this is the first radiation-tolerant on-detector ASIC implementation of an NN that has been designed for particle physics applications.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗