Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “hardware efficiency”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 793 records · Page 44

Streaming readout for next generation electron scattering experiments

Current and future experiments at the high-intensity frontier are expected to produce an enormous amount of data that needs to be collected and stored for offline analysis. Thanks to the continuous progress in computing and networking technology, it is now possible to replace the standard ‘triggered’ data acquisition systems with a new, simplified and outperforming scheme. ‘Streaming readout’ (SRO) DAQ aims to replace the hardware-based trigger with a much more powerful and flexible software-based one, that considers the whole detector information for efficient real-time data tagging and selection. Considering the crucial role of DAQ in an experiment, validation with on-field tests is required to demonstrate SRO performance. In this paper, we report results of the on-beam validation of the Jefferson Lab SRO framework. In this work, we exposed different detectors (PbWO-based electromagnetic calorimeters and a plastic scintillator hodoscope) to the Hall-D electron-positron secondary beam and to the Hall-B production electron beam, with increasingly complex experimental conditions. By comparing the data collected with the SRO system against the traditional DAQ, we demonstrate that the SRO performs as expected. Furthermore, we provide evidence of its superiority in implementing sophisticated AI-supported algorithms for real-time data analysis and reconstruction.

47 OTHER INSTRUMENTATION↗

Neuromorphic scaling advantages for energy-efficient random walk computations

Computing stands to be radically improved by neuromorphic computing (NMC) approaches inspired by the brain's incredible efficiency and capabilities. Most NMC research, which aims to replicate the brain's computational structure and architecture in man-made hardware, has focused on artificial intelligence; however, less explored is whether this brain-inspired hardware can provide value beyond cognitive tasks. We demonstrate that high-degree parallelism and configurability of spiking neuromorphic architectures makes them well-suited to implement random walks via discrete time Markov chains. Such random walks are useful in Monte Carlo methods, which represent a fundamental computational tool for solving a wide range of numerical computing tasks. Additionally, we show how the mathematical basis for a probabilistic solution involving a class of stochastic differential equations can leverage those simulations to provide solutions for a range of broadly applicable computational tasks. Despite being in an early development stage, we find that NMC platforms, at a sufficient scale, can drastically reduce the energy demands of high-performance computing platforms.

59 BASIC BIOLOGICAL SCIENCES↗

A Cryogenic Muon Tagging System Integrated with a Superconducting Qubit Device for Radiation-Induced Error Mitigation

Superconducting qubits are highly sensitive to ionizing radiation, which can induce correlated errors and limit scalable fault-tolerant quantum computing. In particular, cosmic-ray muons can deposit energy in the substrate, generating phonon bursts that break Cooper pairs and produce quasiparticles, leading to correlated decoherence events across multiple qubits. We present the development of a cryogenic muon tagging system based on Kinetic Inductance Detectors (KIDs) and its integration with superconducting quantum hardware. Originally developed within the ACE-SuperQ project and validated as a standalone detector, the system demonstrated a muon tagging efficiency of approximately 90% and excellent agreement with Monte Carlo simulations. Building on this validation, the tagging system has been integrated with a multi-qubit superconducting chip operated in a dilution refrigerator. The detector configuration consists of a multi-layer KID stack arranged above and below the quantum device, enabling time-coincident identification of muon-induced events within the same cryogenic environment. The integrated setup has been successfully commissioned, enabling simultaneous operation of the qubit chip and the muon tagging system. A first measurement campaign has been carried out, and preliminary data show time-correlated events between the muon tagging detectors and the qubit readout. A quantitative analysis of radiation-induced effects on qubit performance is currently ongoing. This work represents a step toward the implementation of event-level radiation tagging as a tool for characterizing and potentially mitigating correlated errors in superconducting quantum processors, while establishing a modular platform for future studies at the interface between particle physics and quantum information science.

Roy, Tanay [Fermilab] (ORCID:000000019442862X)↗

Design package for instrumentation of the Decade 80 house in Tucson, Arizona

A design package covering instrumentation and system design for the Decade 80 House in Tucson, Arizona is presented. The solar house is instrumented for the purpose of gathering data to determine the solar heating and cooling system performance. The use of copper in the construction of the house is a first choice construction material because it conducts heat and resists corrosion better than other materials and therefore provides a more efficient and economical system. Equipment and site specifications are reported, along with floor plans showing the location of the site instrumentation hardware.

Source record↗

On optimal infinite impulse response edge detection filters

The authors outline the design of an optimal, computationally efficient, infinite impulse response edge detection filter. The optimal filter is computed based on Canny's high signal to noise ratio, good localization criteria, and a criterion on the spurious response of the filter to noise. An expression for the width of the filter, which is appropriate for infinite-length filters, is incorporated directly in the expression for spurious responses. The three criteria are maximized using the variational method and nonlinear constrained optimization. The optimal filter parameters are tabulated for various values of the filter performance criteria. A complete methodology for implementing the optimal filter using approximating recursive digital filtering is presented. The approximating recursive digital filter is separable into two linear filters operating in two orthogonal directions. The implementation is very simple and computationally efficient, has a constant time of execution for different sizes of the operator, and is readily amenable to real-time hardware implementation.

Sarkar, Sudeep↗

Active Control of Fan Noise: Feasibility Study: Theoretical Analysis for Coupling of Active Noise Control Actuator Ring Sources to an Annular Duct with Flow - Volume 6

The objective of this effort is to develop an analytical model for the coupling of active noise control (ANC) piston-type actuators that are mounted flush to the inner and outer walls of an annular duct to the modes in the duct generated by the actuator motion. The analysis will be used to couple the ANC actuators to the modal analysis propagation computer program for the annular duct, to predict the effects of active suppression of fan-generated engine noise sources. This combined program will then be available to assist in the design or evaluation of ANC systems in fan engine annular exhaust ducts. An analysis has been developed to predict the modes generated in an annular duct due to the coupling of flush-mounted ring actuators on the inner and outer walls of the duct. The analysis has been combined with a previous analysis for the coupling of modes to a cylindrical duct in a FORTRAN computer program to perform the computations. The method includes the effects of uniform mean flow in the duct. The program can be used for design or evaluation purposes for active noise control hardware for turbofan engines. Predictions for some sample cases modeled after the geometry of the NASA Lewis ANC Fan indicate very efficient coupling in both the inlet and exhaust ducts for the m = 6 spinning mode at frequencies where only a single radial mode is cut-on. Radial mode content in higher order cut-off modes at the source plane and the required actuator displacement amplitude to achieve 110 dB SPL levels in the desired mode were predicted. Equivalent cases with and without flow were examined for the cylindrical and annular geometry, and little difference was found for a duct flow Mach number of 0.1. The actuator ring coupling program will be adapted as a subroutine to the cylindrical duct modal analysis and the exhaust duct modal analysis. This will allow the fan source to be defined in terms of characteristic modes at the fan source plane and predict the propagation to the arbitrarily-located ANC source plane. The actuator velocities can then be determined to generate the anti-phase mode. The resulting combined fan source/ANC pressure can then be calculated at any desired wall sensor position. The actuator velocities can be determined manually or using a simulation of a control system feedback loop. This will provide a very useful ANC system design and evaluation tool.

Kraft, R. E.↗

Athena: High-Performance Sparse Tensor Contraction Sequence on Heterogeneous Memory

Sparse tensor contraction sequence has been widely employed in many fields, such as chemistry and physics. However, how to efficiently implement the sequence faces multiple challenges, such as redundant computations and memory operations, massive memory consumption, and inefficient utilization of hardware. To address the above challenges, we introduce Athena, a high-performance framework for SpTC sequences. Athena introduces new data structures, leverages emerging Optane-based heterogeneous memory (HM) architecture, and stage parallelism. In particular, Athena introduces shared hash table-represented sparse accumulator to eliminate unnecessary input processing and data migration; Athena uses a novel data-semantic guided dynamic migration solution to make the best use of the Optane-based HM for high performance; Athena also co-runs execution phases with different characteristics to enable high hardware utilization. Evaluating with 12 datasets, we show that Athena brings 327-7362× speedup over the state-of-the-art SpTC algorithm. With the dynamic data placement guided by data semantics, Athena brings performance improvement on Optane-based HM over a state-of-the-art software-based data management solution, a hardware-based data management solution, and PMM-only by 1.58×, 1.82×, and 2.34× respectively.

Liu, Jiawen↗

autoGEMM: Pushing the Limits of Irregular Matrix Multiplication on Arm Architectures

This paper presents an open-source library that pushes the limits of performance portability for irregular General Matrix Multiplication (GEMM) on the widely-used Arm architectures. Our library, autoGEMM, is designed to support a wide range of Arm processors: from edge devices to HPC-grade CPUs. autoGEMM generates optimized kernels for various hardware configurations by auto-combining fragments of autogenerated micro-kernels that employ hand-written optimizations to maximize computational efficiency. We optimize the kernel pipeline by tuning the register reuse and the data load/store overlapping. In addition, we use a dynamic tiling scheme to generate balanced tile shapes. Finally, we position autoGEMM on top of the TVM framework where our dynamic tiling scheme prunes the search space for TVM to identify the optimal combination of parameters for code optimization. Evaluations on five different classes of Arm chips demonstrate the advantages of autoGEMM. For small matrices, autoGEMM achieves 98% of peak and up to 2.0x speedup over state-of-the-art libraries such as LIBXSMM and LibShalom. For irregular matrices (i.e. tall skinny and long rectangles), autoGEMM is 1.3-2.0x faster than widely-used libraries such as OpenBLAS and Eigen. autoGEMM is publicly available at: https://github.com/wudu98/autoGEMM.

Wu, Du↗

Changes in Exercise Data Management

The suite of exercise hardware aboard the International Space Station (ISS) generates an immense amount of data. The data collected, treadmill, cycle ergometer, and resistance strength training hardware, are basic exercise parameters (time, heart rate, speed, load, etc.). The raw data are processed in the laboratory and more detailed parameters are calculated from each exercise data file. Updates recently have been made to how these valuable data are stored, adding an additional level of security, increasing accessibility, and resulting in overall increased efficiency of medical report delivery. Questions regarding exercise performance or how exercise may influence other variables of crew health frequently arise within the crew health care community. Inquiries regarding the health of the exercise hardware often need quick analysis and response to ensure the exercise system is operable on a continuous basis. Consolidating all of the exercise system data in a single repository enables a quick response to both the medical and engineering communities. A SQL server database is currently in use, and provides a secure location for all of the exercise data starting at ISS Expedition 1 to current date. The database has been structured to update derived metrics automatically, making analysis and reporting available within minutes of dropping the in-flight data into the database. Commercial tools were evaluated to help aggregate and visualize data from the SQL database. The Tableau software provides manageable interface, which has improved the laboratory’s output time of crew reports by 67%. Expansion of the SQL database, to be inclusive of additional medical requirement metrics, addition of ‘app-like’ tools for mobile visualization, and collaborative use (e.g., operational support teams, research groups, and International Partners) of the data system, is currently being explored.

Buxton, R. E.↗

Non-Intrusive Parallel-in-Time Solvers for Partial Differential Equations (Final Report)

Many time-dependent problems and simulations are often modeled using Partial Differential Equations. Traditional modeling approaches that use sequential time-stepping are reaching a bottleneck in optimizing efficiency. The Center of Applied Science and Computing at Lawrence Livermore National Laboratory extensively works on parallelizing these algorithms to leverage the increasing computational power from the growing number of processors in computer hardware. In particular, they aim to design non-intrusive algorithms that can generalize to a variety of problems and sizes without requiring additional information from or modifications on the original problems. Multigrid Reduction in Time (MGRIT) is a parallel-in-time algorithm that is designed to be non-intrusive. This project focuses on increasing the efficiency of MGRIT by approximating the coarse-grid operator using machine learning approaches as a means to find the most non-intrusive, or general, solution.

97 MATHEMATICS AND COMPUTING↗

Formal development of a clock synchronization circuit

This talk presents the latest stage in formal development of a fault-tolerant clock synchronization circuit. The development spans from a high level specification of the required properties to a circuit realizing the core function of the system. An abstract description of an algorithm has been verified to satisfy the high-level properties using the mechanical verification system EHDM. This abstract description is recast as a behavioral specification input to the Digital Design Derivation system (DDD) developed at Indiana University. DDD provides a formal design algebra for developing correct digital hardware. Using DDD as the principle design environment, a core circuit implementing the clock synchronization algorithm was developed. The design process consisted of standard DDD transformations augmented with an ad hoc refinement justified using the Prototype Verification System (PVS) from SRI International. Subsequent to the above development, Wilfredo Torres-Pomales discovered an area-efficient realization of the same function. Establishing correctness of this optimization requires reasoning in arithmetic, so a general verification is outside the domain of both DDD transformations and model-checking techniques. DDD represents digital hardware by systems of mutually recursive stream equations. A collection of PVS theories was developed to aid in reasoning about DDD-style streams. These theories include a combinator for defining streams that satisfy stream equations, and a means for proving stream equivalence by exhibiting a stream bisimulation. DDD was used to isolate the sub-system involved in Torres-Pomales' optimization. The equivalence between the original design and the optimized verified was verified in PVS by exhibiting a suitable bisimulation. The verification depended upon type constraints on the input streams and made extensive use of the PVS type system. The dependent types in PVS provided a useful mechanism for defining an appropriate bisimulation.

Miner, Paul S.↗

Changes in Exercise Data Management

The suite of exercise hardware aboard the International Space Station (ISS) generates an immense amount of data. The data collected from the treadmill, cycle ergometer, and resistance strength training hardware are basic exercise parameters (time, heart rate, speed, load, etc.). The raw data are post processed in the laboratory and more detailed parameters are calculated from each exercise data file. Updates have recently been made to how this valuable data are stored, adding an additional level of data security, increasing data accessibility, and resulting in overall increased efficiency of medical report delivery. Questions regarding exercise performance or how exercise may influence other variables of crew health frequently arise within the crew health care community. Inquiries over the health of the exercise hardware often need quick analysis and response to ensure the exercise system is operable on a continuous basis. Consolidating all of the exercise system data in a single repository enables a quick response to both the medical and engineering communities. A SQL server database is currently in use, and provides a secure location for all of the exercise data starting at ISS Expedition 1 - current day. The database has been structured to update derived metrics automatically, making analysis and reporting available within minutes of dropping the inflight data it into the database. Commercial tools were evaluated to help aggregate and visualize data from the SQL database. The Tableau software provides manageable interface, which has improved the laboratory's output time of crew reports by 67%. Expansion of the SQL database to be inclusive of additional medical requirement metrics, addition of 'app-like' tools for mobile visualization, and collaborative use (e.g. operational support teams, research groups, and International Partners) of the data system is currently being explored.

Buxton, R. E.↗

Evaluating Thermostats’ Deadbands Using HVAC Hardware-In-the-Loop Experiment for Advanced Control Strategies

Thermostats play a crucial role in energy consumption, user control, and occupant comfort by serving as the interface between the heating, ventilation, and air conditioning (HVAC) system and the building's occupants. The deadband, also referred to as temperature differential, is defined as the temperature difference between the desired setpoint and upper threshold or lower threshold for the HVAC equipment to turn on or off. It is a key factor influencing energy efficiency and user satisfaction. This paper presents a comparative analysis of the deadbands of five different thermostats, tested with a residential heat pump, aiming to identify variations in their deadband settings and implications for energy usage and management. The experimental study was conducted using a HVAC hardware-in-the-loop (HIL) system that allows thermostats to be connected with physical HVAC equipment, driven by conditions in a simulated residential building. The study explores the trade-offs between energy efficiency and occupant comfort and highlights how different thermostats cycle differently based on their deadband settings. The findings offer valuable insights into how thermostat deadband affects comfort and energy use, as well as the cycling frequency of a heat pump.

Ramaraj, Sugirdhalakshmi [National Renewable Energ↗

FloatGuard: Efficient Whole-Program Detection of Floating-Point Exceptions in AMD GPUs

FloatGuard is a tool that captures floating-point exceptions in AMD HIP kernels. FloatGuard leverages AMD GPU hardware registers to detect floating-point exceptions, overcoming the limitations of AMD's built-in trapping mechanisms through a novel algorithm that combines assembly- and source-level instrumentation with debugger-guided execution.

MIAO, WENJUN [Lawrence Livermore National Laborato↗

Modbus RTU for Embedded Cyber Secure Inverter Controller

The Modbus communication protocol is a widely adopted communication standard in industrial control systems. This communication protocol is known for being reliable and straightforward to implement while being versatile in terms of its operating parameters while supporting multiple formats over various hardware infrastructures and architectures. Many intelligent devices such as Programmable Logic Controllers (PLCs), Human-Machine Interfaces (HMIs), Internet-of-Things (IoT), and various Operational Technologies (OT) utilize Modbus for their communication systems. These types of systems must communicate with each other through a standardized and central communication process. To support the integration of these modular systems, a Field-Programmable Gate Array (FPGA) can act as an embedded central routing fabric for this communication to take place. Embedded systems are versatile enough to interface with various devices and systems to accomplish various goals. Additionally, embedded systems require relatively small physical designs to minimize the required resources to facilitate the intended application by providing low-level system access. This minimization of system resources goes hand in hand with reducing the financial cost of a proposed solution or system. As remotely collaborating researchers often use FPGAs to prototype designs that are required to have a method for data transmission among systems, it is imperative to provide a baseline standard for communications among devices and systems. A typical method of implementing the Modbus RTU communication protocol in an embedded environment is using integrated logic architectures within the FPGA called “Intellectual Property (IP) cores.” IP cores can be designed using integrated logic or circuit designs to function as an embedded processor. These IP cores can then perform the required computational actions to support the Modbus RTU communication protocol by utilizing high-level programming languages such as the C programming language. The hardware description language of Very High-Speed Integrated Circuit Hardware Description Language (VHDL) allows for the control of real hardware at the logic gate and signal level. These logic gates and signals can be designed and controlled to perform desired actions based on the system design. Programming an FPGA using VHDL allows an individual to access the lowest abstraction level of the system during FPGA development. This level of abstraction is referred to as the register-transfer level (RTL), which gives access to manipulating values and variables at the register level. This register-level manipulation provides precision over creating the logical circuit within the FPGA, thus minimizing the required code to perform desired operations. The Modbus RTU communication protocol can be implemented within an FPGA using VHDL programming to establish a standardized and embedded serial communication pathway. This implementation provides a standardized communication protocol to streamline research efforts among researchers, thus increasing the efficiency of research efforts. Additionally, this Modbus RTU implementation requires fewer resources when compared to typical communication protocol implementations that utilize an IP core, reducing the hardware requirement for effective research efforts.

communication↗

Reversionary Control Modes for the Mitigation of Failures in a Partially Turboelectric Aircraft Propulsion System

In support of emission and fuel burn reduction goals, the aviation industry is actively pursuing the advancement of electrified aircraft propulsion (EAP) technology. This includes turboelectric and hybrid electric propulsion designs that combine gas turbine engine and electrical system hardware. Such architectures exhibit a high degree of coupling between subsystems. This drives the need for system-level control strategies to ensure the safe, coordinated, and efficient operation of all subsystems. The design and certification of any aircraft propulsion system requires that all potential subsystem failures are identified, and the hazards posed by these failures are appropriately mitigated. This requirement is particularly challenging for EAP systems due to their integrated nature. One approach to assist in EAP failure mitigation is the inclusion of automated reconfiguration capabilities within the propulsion control system. Such control modes, referred to as reversionary control modes, are designed to automatically detect failures and activate backup control modes upon failure detection. This paper covers the design and evaluation of reversionary control mode logic developed for a partially turboelectric propulsion concept. Test results from a real-time hardware-in-the-loop evaluation of the concept are also presented and discussed. The results show that the developed reversionary control logic can successfully detect and mitigate subsystem failures in a representative environment that includes actual electrical system hardware.

Electrified Aircraft Propulsion↗

Reversionary Control Modes for the Mitigation of Failures in a Partially Turboelectric Aircraft Propulsion System

In support of emission and fuel burn reduction goals, the aviation industry is actively pursuing the advancement of electrified aircraft propulsion (EAP) technology. This includes turboelectric and hybrid electric propulsion designs that combine gas turbine engine and electrical system hardware. Such architectures exhibit a high degree of coupling between subsystems. This drives the need for system-level control strategies to ensure the safe, coordinated, and efficient operation of all subsystems. The design and certification of any aircraft propulsion system requires that all potential subsystem failures are identified, and the hazards posed by these failures are appropriately mitigated. This requirement is particularly challenging for EAP systems due to their integrated nature. One approach to assist in EAP failure mitigation is the inclusion of automated reconfiguration capabilities within the propulsion control system. Such control modes, referred to as reversionary control modes, are designed to automatically detect failures and activate backup control modes upon failure detection. This paper covers the design and evaluation of reversionary control mode logic developed for a partially turboelectric propulsion concept. Test results from a real-time hardware-in-the-loop evaluation of the concept are also presented and discussed. The results show that the developed reversionary control logic can successfully detect and mitigate subsystem failures in a representative environment that includes actual electrical system hardware.

Electrified Aircraft Propulsion↗

Reversionary Control Modes for the Mitigation of Failures in a Partially Turboelectric Aircraft Propulsion System

In support of emission and fuel burn reduction goals, the aviation industry is actively pursuing the advancement of electrified aircraft propulsion (EAP) technology. This includes turboelectric and hybrid electric propulsion designs that combine gas turbine engine and electrical system hardware. Such architectures exhibit a high degree of coupling between subsystems. This drives the need for system-level control strategies to ensure the safe, coordinated, and efficient operation of all subsystems. The design and certification of any aircraft propulsion system requires that all potential subsystem failures are identified, and the hazards posed by these failures are appropriately mitigated. This requirement is particularly challenging for EAP systems due to their integrated nature. One approach to assist in EAP failure mitigation is the inclusion of automated reconfiguration capabilities within the propulsion control system. Such control modes, referred to as reversionary control modes, are designed to automatically detect failures and activate backup control modes upon failure detection. This paper covers the design and evaluation of reversionary control mode logic developed for a partially turboelectric propulsion concept. Test results from a real-time hardware-in-the-loop evaluation of the concept are also presented and discussed. The results show that the developed reversionary control logic can successfully detect and mitigate subsystem failures in a representative environment that includes actual electrical system hardware.

Electrified Aircraft Propulsion↗