Multi-Sensory Opto-Electronic Feature Extraction Neural Associative Retriever
Optical pattern recognition and neural associative memory are important research topics for optical computing.
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Results for “compute in memory”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Self-checking on-line testable static RAM
This is a fault-tolerant random access memory for use in fault-tolerant computers. It comprises a plurality of memory chips each comprising a plurality of on-line testable and correctable memory cells disposed in rows and columns for holding individually addressable binary bits and provision for error detection incorporated into each memory cell for outputting an error signal whenever a transient error occurs therein. In one embodiment, each of the memory cells comprises a pair of static memory sub-cells for simultaneously receiving and holding a common binary data bit written to the memory cell and the error detection provision comprises comparator logic for continuously sensing and comparing the contents of the memory sub-cells to one another and for outputting the error signal whenever the contents do not match. In another embodiment, each of the memory cells comprises a static memory sub-cell and a dynamic memory sub-cell for simultaneously receiving and holding a common binary data bit written to the memory cell and the error detection provision comprises comparator logic for continuously sensing and comparing the contents of the static memory sub-cell to the dynamic memory sub-cell and for outputting the error signal whenever the contents do not match. Capability for correction of errors is also included.
Chau, Savio N.↗
Rollback Hardware For Time Warp Multiprocessor Systems
Rollback Chip (RBC) module is computer circuit board containing special-purpose memory circuits for use in multiprocessor computer system. Designed to help realize speedup potential of parallel processing for simulation of discrete events by use of Time Warp operating system.
Robb, Michael J.↗
Wing-Body Aeroelasticity Using Finite-Difference Fluid/Finite-Element Structural Equations on Parallel Computers
In recent years significant advances have been made for parallel computers in both hardware and software. Now parallel computers have become viable tools in computational mechanics. Many application codes developed on conventional computers have been modified to benefit from parallel computers. Significant speedups in some areas have been achieved by parallel computations. For single-discipline use of both fluid dynamics and structural dynamics, computations have been made on wing-body configurations using parallel computers. However, only a limited amount of work has been completed in combining these two disciplines for multidisciplinary applications. The prime reason is the increased level of complication associated with a multidisciplinary approach. In this work, procedures to compute aeroelasticity on parallel computers using direct coupling of fluid and structural equations will be investigated for wing-body configurations. The parallel computer selected for computations is an Intel iPSC/860 computer which is a distributed-memory, multiple-instruction, multiple data (MIMD) computer with 128 processors. In this study, the computational efficiency issues of parallel integration of both fluid and structural equations will be investigated in detail. The fluid and structural domains will be modeled using finite-difference and finite-element approaches, respectively. Results from the parallel computer will be compared with those from the conventional computers using a single processor. This study will provide an efficient computational tool for the aeroelastic analysis of wing-body structures on MIMD type parallel computers.
Byun, Chansup↗
Analysis of GPU Data Access Patterns on Complex Geometries for the D3Q19 Lattice Boltzmann Algorithm
GPU performance of the lattice Boltzmann method (LBM) depends heavily on memory access patterns. When implemented with GPUs on complex domains, typically, geometric data is accessed indirectly and lattice data is accessed lexicographically. Although there are a variety of other options, no study has examined the relative efficacy between them. Here, we examine a suite of memory access schemes via empirical testing and performance modeling. We find strong evidence that semi-direct is often better suited than the more common indirect addressing, providing increased computational speed and reducing memory consumption. For the layout, we find that the Collected Structure of Arrays (CSoA) and bundling layouts outperform the common Structure of Array layout; on V100 and P100 devices, CSoA consistently outperforms bundling, however the relationship is more complicated on K40 devices. When compared to state-of-the-art practices, our recommendations lead to speedups of 10–40 percent and reduce memory consumption up to 17 percent. Using performance modeling and computational experimentation, we determine the mechanisms behind the accelerations. We demonstrate that our results hold across multiple GPUs on two leadership class systems, and present the first near-optimal strong results for LBM with arterial geometries run on GPUs.
42 ENGINEERING↗
Numerical image manipulation and display in solar astronomy
The paper describes the system configuration and data manipulation capabilities of a solar image display system which allows interactive analysis of visual images and on-line manipulation of digital data. Image processing features include smoothing or filtering of images stored in the display, contrast enhancement, and blinking or flickering images. A computer with a core memory of 28,672 words provides the capacity to perform complex calculations based on stored images, including computing histograms, selecting subsets of images for further analysis, combining portions of images to produce images with physical meaning, and constructing mathematical models of features in an image. Some of the processing modes are illustrated by some image sequences from solar observations.
Levine, R. H.↗
Automated Programmable Logic Controller Memory Forensics Using RGB Image Analysis and Deep Learning
The introduction of Industry 4.0 and Internet-based technologies has enhanced industrial control system operations but have inadvertently increased their vulnerabilities to cyber attacks. When an industrial control system is compromised, security analysts need to identify the root cause quickly to start the recovery process and develop mitigation strategies. Memory forensics is critical in the incident analysis process to ascertain what occurred. Approaches for analyzing the persistent memory in industrial control devices are limited and almost nonexistent for volatile memory. This chapter proposes an automated methodology for programmable logic controller memory dump analysis using computer vision and deep learning techniques. The methodology converts the sequences of bytes in a programmable logic controller memory dump to red-green-blue pixels and employs a deep learning model that learns the underlying patterns and features of pre-labeled forensic artifacts in images and segments them into distinct regions. The trained model is employed to automatically segment new memory images and identify forensic artifacts. Evaluation of the methodology on a Schneider Electric Modicon M221 programmable logic controller under code injection and code modification attacks demonstrates its ability to detect attack artifacts in memory dumps.
Asmar Awad, Rima [ORNL] (ORCID:0000000233407742)↗
Associative memories in space applications.
Associative memory organizational approaches for onboard data processing of spacecraft
COMPUTER METHOD↗
Superconducting Hyperdimensional Associative Memory Circuit for Scalable Machine Learning
Here we propose a generalized architecture for the first rapid-single-flux-quantum (RSFQ) associative memory circuit. The circuit employs hyperdimensional computing (HDC), a machine learning (ML) paradigm utilizing vectors with dimensionality in the thousands to represent information. HDC designs have small memory footprints, simple computations, and simple training algorithms compared to superconducting neural network accelerators (SNNAs), making them a better option for scalable SFQ machine learning (ML) solutions. The proposed superconducting HDC (SHDC) circuit uses entirely on-chip RSFQ memory which is tightly integrated with logic, operates at 33.3 GHz, is applicable to general ML tasks, and is manufacturable at practically useful scales given current SFQ fabrication limits. Tailored to a language recognition task, SHDC consists of ~ 2-20 M Josephson junctions (JJs) and consumes up to three times less power than an analogous CMOS HDC circuit while achieving 78-84% higher throughput. SHDC is capable of outperforming the state of the art RSFQ SNNA, SuperNPU, by 48-99% for all benchmark NN architectures tested while occupying up to 90% less area and consuming up to nine times less power. To the best of the authors' knowledge, SHDC is currently the only superconducting ML approach feasible at practically useful scales for real-world ML tasks and capable of online learning.
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
Nanoporous Dielectric Resistive Memories Using Sequential Infiltration Synthesis
Resistance switching in metal–insulator–metal structures has been extensively studied in recent years for use as synaptic elements for neuromorphic computing and as nonvolatile memory elements. However, high switching power requirements, device variabilities, and considerable trade-offs between low operating voltages, high on/off ratios, and low leakage have limited their utility. Here, we have addressed these issues by demonstrating the use of ultraporous dielectrics as a pathway for high-performance resistive memory devices. Using a modified atomic layer deposition based technique known as sequential infiltration synthesis, which was developed originally for improving polymer properties such as enhanced etch resistance of electron-beam resists and for the creation of films for filtration and oleophilic applications, we are able to create ~15 nm thick ultraporous (pore size ~5 nm) oxide dielectrics with up to 73% porosity as the medium for filament formation. We show, using the Ag/Al 2 O 3 system, that the ultraporous films result in ultrahigh on/off ratio (>10 9 ) at ultralow switching voltages (~±600 mV) that are 10× smaller than those for the bulk case. In addition, the devices demonstrate fast switching, pulsed endurance up to 1 million cycles. and high temperature (125 °C) retention up to 10 4 s, making this approach highly promising for large-scale neuromorphic and memory applications. Additionally, this synthesis methodology provides a compatible, inexpensive route that is scalable and compatible with existing semiconductor nanofabrication methods and materials.
37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
A low-rank power iteration scheme for neutron transport criticality problems
Computing effective eigenvalues for neutron transport often requires a fine numerical resolution. Here, the main challenge of such computations is the high memory effort of classical solvers, which limits the accuracy of chosen discretizations. In this work, we derive a method for the computation of effective eigenvalues when the underlying solution has a low-rank structure. This is accomplished by utilizing dynamical low-rank approximation (DLRA), which is an efficient strategy to derive time evolution equations for low-rank solution representations. The main idea is to interpret the iterates of the classical inverse power iteration as pseudo-time steps and apply the DLRA concepts in this framework. In our numerical experiment, we demonstrate that our method significantly reduces memory requirements while achieving the desired accuracy. Analytic investigations show that the proposed iteration scheme inherits the convergence speed of the inverse power iteration, at least for a simplified setting.
97 MATHEMATICS AND COMPUTING↗
Neuromorphic ionic computing in droplet interface synapses
Ionic devices with memory capabilities can emulate neural functionality, enabling neuromorphic computing and biomedical applications. In this study, we report an ionic spiking synapse based on aqueous droplet interface bilayer assembly. Under stepwise triangular voltages, the device displays coupled memcapacitive-memristive behavior, showing noncrossing pinched hysteretic I-V loops. This hysteretic ion dynamics can be regulated by modifying bilayer components, reconstituting protein channels, or adjusting droplet assembly configuration. Droplet interface synapses (DIS) exhibit fundamental neuromorphic behaviors such as paired-pulse facilitation/depression, spike rate–dependent plasticity, Hebbian learning, and short-term associative learning under classical conditioning. We also used reservoir computing with DIS to implement two learning algorithms: a classification algorithm that recognizes handwritten digits and a reinforcement learning algorithm that learns to play a board game of tic-tac-toe.
Li, Zhongwu [Lawrence Livermore National Laborator↗
A view of Kanerva's sparse distributed memory
Pentti Kanerva is working on a new class of computers, which are called pattern computers. Pattern computers may close the gap between capabilities of biological organisms to recognize and act on patterns (visual, auditory, tactile, or olfactory) and capabilities of modern computers. Combinations of numeric, symbolic, and pattern computers may one day be capable of sustaining robots. The overview of the requirements for a pattern computer, a summary of Kanerva's Sparse Distributed Memory (SDM), and examples of tasks this computer can be expected to perform well are given.
Denning, P. J.↗
Imaging for Hypersonic Experimental Aeroheating Testing (IHEAT) Version 4.0: User Manual
The IHEAT v4.0 software is a data reduction code for global thermography data acquired in the NASA Langley Aerothermodynamics Laboratory (LAL) hypersonic wind tunnels. IHEAT uses red and green color-intensity data from two-dimensional images of wind tunnel models to compute temperatures and heat-transfer rates using a semi-infinite, one-dimensional heat transfer approximation at each image pixel. Multiple automated tools in IHEAT v4.0 decrease the time required to reduce the data from a phosphor thermography wind tunnel run. Data at one or all of the image pixel locations can be exported to computer files for further analysis. The prior version of IHEAT, v3.2, was written in PV-WAVE® (now owned by Rogue Wave® Software) in 1994 and was limited in functionality to fit within the memory constraints of the available computers at the time. IHEAT v4.0 is written in MATLAB® by MathWorks® and contains several new features that leverage the increase in available memory of the current computers. A Piecewise tool permits the user to extract data along a segmented line cut that can follow interesting features in the image better than the single, straight line cuts that were possible with the legacy Length and Profile tools. The new Load Run and Batch tools facilitate batch processing by loading in all of the input files and images for a run at the same time. Load Run permits the user to process the available run images manually, while Batch automatically saves heat transfer data from all of the images based on the analysis previously performed on a single frame. IHEAT v4.0 also can automatically calculate the temporal collapse of reference line cuts from the time history heating data for a run to indicate the appropriate frame to reduce for each run. The IHEAT v4.0 source code was compiled into a standalone executable file that can be accessed remotely from several computers with different operating systems, simultaneously. The software is run through the MATLAB® Compiler Runtime engine, and therefore, IHEAT does not require a software license to run. Any software commands executed in the IHEAT v4.0 code will not affect other similar applications running on the same machine. Similarly, changes to the parent software do not affect a compiled code. These features of IHEAT v4.0 are improvements over the legacy v3.2 code, which required regular maintenance to avoid losing functionality as the PVWAVE ® programming language was upgraded.
Mason, Michelle L.↗
Determining diagnostic coverage for memory using redundant execution
Memory, used by a computer to store data, is generally prone to faults, including permanent faults (i.e. relating to a lifetime of the memory hardware), and also transient faults (i.e. relating to some external cause) which are otherwise known as soft errors. Since soft errors can change the state of the data in the memory and thus cause errors in applications reading and processing the data, there is a desire to characterize the degree of vulnerability of the memory to soft errors. In particular, once the vulnerability for a particular memory to soft errors has been characterized, cost/reliability trade-offs can be determined, or soft error detection mechanisms (e.g. parity) may be selectively employed for the memory. In some cases, memory faults can be diagnosed by redundant execution and a diagnostic coverage may be determined.
Bramley, Richard Gavin↗
Liveness as a factor to evaluate memory vulnerability to soft errors
Memory, used by a computer to store data, is generally prone to faults, including permanent faults (i.e. relating to a lifetime of the memory hardware), and also transient faults (i.e. relating to some external cause) which are otherwise known as soft errors. Since soft errors can change the state of the data in the memory and thus cause errors in applications reading and processing the data, there is a desire to characterize the degree of vulnerability of the memory to soft errors. In particular, once the vulnerability for a particular memory to soft errors has been characterized, cost/reliability trade-offs can be determined, or soft error detection mechanisms (e.g. parity) may be selectively employed for the memory. In some cases, memory faults can be diagnosed by redundant execution and a diagnostic coverage may be determined.
Bramley, Richard Gavin↗
Fixed Depth Hamiltonian Simulation via Cartan Decomposition
Simulating quantum dynamics on classical computers is challenging for large systems due to the significant memory requirements. Simulation on quantum computers is a promising alternative, but fully optimizing quantum circuits to minimize limited quantum resources remains an open problem. In this study, we tackle this problem by presenting a constructive algorithm, based on Cartan decomposition of the Lie algebra generated by the Hamiltonian, which generates quantum circuits with time-independent depth. We highlight our algorithm for special classes of models, including Anderson localization in one-dimensional transverse field $\mathrm{XY}$ model, where $\mathscr{O}$(n 2 )-gate circuits naturally emerge. Compared to product formulas with significantly larger gate counts, our algorithm drastically improves simulation precision. In addition to providing exact circuits for a broad set of spin and fermionic models, our algorithm provides broad analytic and numerical insight into optimal Hamiltonian simulations.
71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
Binder-benchmarking
SAND2025-07593O Binder-benchmarking evaluates the speed and memory impacts of C++, Python, and Matlab code binders. As a repository, it provides a way to locally run computation-based and memory-based benchmark suites on pybind11 and nanobind-based code in a Docker image. The software runs simple-speed and memory benchmarks on primitive navigation and integration exemplar algorithms. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525.
Walker II, Michael [Sandia National Lab. (SNL-CA),↗