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At least 793 records · Page 44

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NASA NTRSDate not supplied

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

This work updates recent progress made by NASA Glenn Research Center on further advancement of its uniquely durable silicon carbide junction field effect transistor and resistor (SiC JFET-R) integrated circuit (IC) technology since HiTEC 2021. Key fabrication process improvements compared to earlier NASA Glenn IC prototype runs have been ascertained via extensive “back end of line” (BEOL) processing experiments conducted on practice wafers over the past two years. The resulting changes to the BEOL process flow employed in the fabrication of “Generation 12” SiC JFET-R wafers are described. The NASA Glenn SiC JFET-R IC prototype “Generation 12” chipset design realizes significantly higher complexity digital and analog integrated ICs aimed at flexibly implementing a broad variety of mission-enabling extreme-environment electronics demonstrations. SPICE simulations have verified circuit designs ranging from simple amplification of analog sensor signals up through long-duration Venus lander operations and microprocessor-based of electric motor drive.

Silicon Carbide↗

NASA NTRS2023

Recent Progress in Extreme Environment Durable SiC JFET-R Integrated Circuit Technology

Silicon Carbide↗

NASA NTRS1969

Simple demodulator for telemetry phase- shift keyed subcarriers

Circuit, suitable for operation at high signal-to-noise ratio environments, recovers pulse-code modulated data from digital telemetry systems which use phase-shift keyed subcarrier techniques. This demodulator is easily constructed from microcircuit elements and may be applied where low-cost, relatively high-level signal systems are used.

Couvillon, L. A.↗

NASA NTRS1997

System-Level Integrated Circuit (SLIC) Technology Development for Phased Array Antenna Applications

This report documents the efforts and progress in developing a 'system-level' integrated circuit, or SLIC, for application in advanced phased array antenna systems. The SLIC combines radio-frequency (RF) microelectronics, digital and analog support circuitry, and photonic interfaces into a single micro-hybrid assembly. Together, these technologies provide not only the amplitude and phase control necessary for electronic beam steering in the phased array, but also add thermally-compensated automatic gain control, health and status feedback, bias regulation, and reduced interconnect complexity. All circuitry is integrated into a compact, multilayer structure configured for use as a two-by-four element phased array module, operating at 20 Gigahertz, using a Microwave High-Density Interconnect (MHDI) process. The resultant hardware is constructed without conventional wirebonds, maintains tight inter-element spacing, and leads toward low-cost mass production. The measured performances and development issues associated with both the two-by-four element module and the constituent elements are presented. Additionally, a section of the report describes alternative architectures and applications supported by the SLIC electronics. Test results show excellent yield and performance of RF circuitry and full automatic gain control for multiple, independent channels. Digital control function, while suffering from lower manufacturing yield, also proved successful.

Windyka, John A.↗

NASA NTRS2003

Low-Power Radio-Frequency SiGe Analog-to-Digital Converter

A low-power, radio-frequency analog-to-digital converter (RF-ADC) for soil moisture remote sensing was designed and fabricated. The RF-ADC is the fundamental component used in a direct-sampling digital radiometer, which is proposed to minimize the power dissipation and system complexity for synthetic thinned array radiometer. The circuit was implemented using 0.8 micron 35-GHz silicon germanium BiCMOS technology. The total power dissipation was 222 mW.

Thompson, Willie L, II↗

NASA NTRS2007

Thin, nearly wireless adaptive optical device

A thin, nearly wireless adaptive optical device capable of dynamically modulating the shape of a mirror in real time to compensate for atmospheric distortions and/or variations along an optical material is provided. The device includes an optical layer, a substrate, at least one electronic circuit layer with nearly wireless architecture, an array of actuators, power electronic switches, a reactive force element, and a digital controller. Actuators are aligned so that each axis of expansion and contraction intersects both substrate and reactive force element. Electronics layer with nearly wireless architecture, power electronic switches, and digital controller are provided within a thin-film substrate. The size and weight of the adaptive optical device is solely dominated by the size of the actuator elements rather than by the power distribution system.

Knowles, Gareth↗

NASA NTRS2008

Thin, nearly wireless adaptive optical device

Knowles, Gareth↗

NASA NTRS2009

Thin nearly wireless adaptive optical device

A thin nearly wireless adaptive optical device capable of dynamically modulating the shape of a mirror in real time to compensate for atmospheric distortions and/or variations along an optical material is provided. The device includes an optical layer, a substrate, at least one electronic circuit layer with nearly wireless architecture, an array of actuators, power electronic switches, a reactive force element, and a digital controller. Actuators are aligned so that each axis of expansion and contraction intersects both substrate and reactive force element. Electronics layer with nearly wireless architecture, power electronic switches, and digital controller are provided within a thin-film substrate. The size and weight of the adaptive optical device is solely dominated by the size of the actuator elements rather than by the power distribution system.

Knowles, Gareth J.↗

DOE OSTI2020

A pixel detector ROIC with a 3-bit, 40 Msps synchronous ADC per pixel for HL LHC

The prototype Fermi Compact Muon Solenoid (CMS) Pixel (FCP130), manufactured in a 130 nm process, is a readout integrated circuit (ROIC) designed for the High Luminosity upgrade of the Large Hadron Collider. It employs a synchronous analog to digital converter (ADC) for the front-end design, with signal processing and data conversion within a single bunch crossing of 25 ns. It is therefore capable of accurately detecting hits occurring in consecutive bunch crossings, without off-time registration of events, making it particularly suitable for the inner most layers of the vertex detector. The ROIC consists of a matrix of 48 × 160 pixels, each 100 × 30 μm2 in size. Each pixel contains a charge sensitive preamplifier with self-biasing leakage current compensation, eight auto-zero comparators and a Gray code encoder for a 3-bit flash-type ADC. The total power consumption is approximately 24 μW per pixel. The measured noise at the output of all the hit comparators across the ROIC is < 80 e- with threshold dispersion < 110 e-RMS, which allows an in-time threshold setting of ~ 1000 e-.

43 PARTICLE ACCELERATORS↗

DOE OSTI2021

Success of digital adiabatic simulation with large Trotter step

The simulation of adiabatic evolution has deep connections with adiabatic quantum computation, the quantum approximate optimization algorithm, and adiabatic state preparation. Here we address the error analysis problem in quantum simulation of adiabatic process using Trotter formulas. Here we show that with additional conditions, the circuit depth can be linear in simulation time T. The improvement comes from the observation that the fidelity error here can't be estimated by the norm distance between evolution operators. This phenomenon is termed the robustness of discretization in digital adiabatic simulation. It can be explained in three steps, from analytical and numerical evidence: (1) The fidelity error should be estimated by applying adiabatic theorem on the effective Hamiltonian instead. (2) Because of the specialty of Riemann-Lebesgue lemma, most adiabatic process is naturally robust against discretization. (3) As the Trotter step gets larger, the spectral gap of effective Hamiltonian tends to close, which results in the failure of digital adiabatic simulation.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

NASA NTRS1991

Testing interconnected VLSI circuits in the Big Viterbi Decoder

The Big Viterbi Decoder (BVD) is a powerful error-correcting hardware device for the Deep Space Network (DSN), in support of the Galileo and Comet Rendezvous Asteroid Flyby (CRAF)/Cassini Missions. Recently, a prototype was completed and run successfully at 400,000 or more decoded bits per second. This prototype is a complex digital system whose core arithmetic unit consists of 256 identical very large scale integration (VLSI) gate-array chips, 16 on each of 16 identical boards which are connected through a 28-layer, printed-circuit backplane using 4416 wires. Special techniques were developed for debugging, testing, and locating faults inside individual chips, on boards, and within the entire decoder. The methods are based upon hierarchical structure in the decoder, and require that chips or boards be wired themselves as Viterbi decoders. The basic procedure consists of sending a small set of known, very noisy channel symbols through a decoder, and matching observables against values computed by a software simulation. Also, tests were devised for finding open and short-circuited wires which connect VLSI chips on the boards and through the backplane.

Onyszchuk, I. M.↗

NASA NTRS1996

Authentication, Time-Stamping and Digital Signatures

Time and frequency data are often transmitted over public packet-switched networks, and the use of this mode of distribution is likely to increase in the near future as high-speed logical circuits transmitted via networks replace point-to-point physical circuits. ALthough these networks have many technical advantages, they are susceptible to evesdropping, spoofing, and the alteration of messages enroute using techniques that are relatively simple to implement and quite difficult to detect. I will discuss a number of solutions to these problems, including the authentication mechanism used in the Network Time Protocol (NTP) and the more general technique of signing time-stamps using public key cryptography. This public key method can also be used to implement the digital analog of a Notary Public, and I will discuss how such a system could be realized on a public network such as the Internet.

Levine, Judah↗

DOE OSTI2022

Digital quantum simulation of Floquet symmetry-protected topological phases

Quantum many-body systems away from equilibrium host a rich variety of exotic phenomena that are forbidden by equilibrium thermodynamics. A prominent example is that of discrete time crystals, in which time-translational symmetry is spontaneously broken in periodically driven systems. Pioneering experiments have observed signatures of time crystalline phases with trapped ions, solid-state spin systems, ultracold atoms and superconducting qubits. Here we report the observation of a distinct type of non-equilibrium state of matter, Floquet symmetry-protected topological phases, which are implemented through digital quantum simulation with an array of programmable superconducting qubits. We observe robust long-lived temporal correlations and subharmonic temporal response for the edge spins over up to 40 driving cycles using a circuit of depth exceeding 240 and acting on 26 qubits. We demonstrate that the subharmonic response is independent of the initial state, and experimentally map out a phase boundary between the Floquet symmetry-protected topological and thermal phases. Our results establish a versatile digital simulation approach to exploring exotic non-equilibrium phases of matter with current noisy intermediate-scale quantum processors.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

NASA NTRS1977

Binary phase digital reflection holograms - Fabrication and potential applications

A novel technique for the fabrication of binary-phase computer-generated reflection holograms is described. By use of integrated circuit technology, the holographic pattern is etched into a silicon wafer and then aluminum coated to make a reflection hologram. Because these holograms reflect virtually all the incident radiation, they may find application in machining with high-power lasers. A number of possible modifications of the hologram fabrication procedure are discussed.

Gallagher, N. C., Jr.↗

NASA NTRS1981

Applications of digital image acquisition in anthropometry

A description is given of a video kinesimeter, a device for the automatic real-time collection of kinematic and dynamic data. Based on the detection of a single bright spot by three TV cameras, the system provides automatic real-time recording of three-dimensional position and force data. It comprises three cameras, two incandescent lights, a voltage comparator circuit, a central control unit, and a mass storage device. The control unit determines the signal threshold for each camera before testing, sequences the lights, synchronizes and analyzes the scan voltages from the three cameras, digitizes force from a dynamometer, and codes the data for transmission to a floppy disk for recording. Two of the three cameras face each other along the 'X' axis; the third camera, which faces the center of the line between the first two, defines the 'Y' axis. An image from the 'Y' camera and either 'X' camera is necessary for determining the three-dimensional coordinates of the point.

Woolford, B.↗

NASA NTRS1973

Binary selectable detector holdoff circuit: Design, testing, and application

A very high speed switching circuit, part of a laser radar data acquisition system, has been designed and tested. The primary function of this circuit was to provide computer controlled switching of photodiode detector preamplifier power supply voltages, typically less than plus or minus 20 volts, in approximately 10 nanoseconds. Thus, in actual use, detector and/or detector preamplifier damage can be avoided as a result of sudden extremely large values of backscattered radiation being detected, such as might be due to short range, very thin atmospheric dust layers. Switching of the power supply voltages was chosen over direct switching the photodiode detector input to the preamplifier, based on system noise considerations. Also, the circuit provides a synchronized trigger pulse output for triggering devices such as the Biomation Model 8100 100 MHz analog to digital converter.

Kadrmas, K. A.↗

NASA NTRS1978

Phase-locked tracking loops for LORAN-C

Portable battery operated LORAN-C receivers were fabricated to evaluate simple envelope detector methods with hybrid analog to digital phase locked loop sensor processors. The receivers are used to evaluate LORAN-C in general aviation applications. Complete circuit details are given for the experimental sensor and readout system.

Burhans, R. W.↗

NASA NTRS1980

A microprocessor application to a strapdown laser gyro navigator

The replacement of analog circuit control loops for laser gyros (path length control, cross axis temperature compensation loops, dither servo and current regulators) with digital filters residing in microcomputers is addressed. In addition to the control loops, a discussion is given on applying the microprocessor hardware to compensation for coning and skulling motion where simple algorithms are processed at high speeds to compensate component output data (digital pulses) for linear and angular vibration motions. Highlights are given on the methodology and system approaches used in replacing differential equations describing the analog system in terms of the mechanized difference equations of the microprocessor. Standard one for one frequency domain techniques are employed in replacing analog transfer functions by their transform counterparts. Direct digital design techniques are also discussed along with their associated benefits. Time and memory loading analyses are also summarized, as well as signal and microprocessor architecture. Trade offs in algorithm, mechanization, time/memory loading, accuracy, and microprocessor architecture are also given.

Giardina, C.↗