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An analysis is presented of the primary factors influencing the performance of a parallel implementation of the UCLA atmospheric general circulation model (AGCM) on distributed-memory, massively parallel computer systems.
The Star Tracker is an essential sensor for precision pointing and tracking in most 3-axis stabilized spacecraft. In the interest (of) improving pointing performance by taking advantage of dramatic increases in flight computer power and memory anticipated over the next decade, this paper investigates the use of a neural net for adaptive in-flight calibration of the Star Tracker.
Pratt & Whitney Rocketdyne, Inc., in cooperation with NASA-Marshall Space Flight Center (MSFC), has developed a new Advanced Health Management System (AHMS) controller for the Space Shuttle Main Engine (SSME) that will increase the probability of successfully placing the shuttle into the intended orbit and increase the safety of the Space Transportation System (STS) launches. The AHMS is an upgrade o the current Block II engine controller whose primary component is an improved vibration monitoring system called the Real-Time Vibration Monitoring System (RTVMS) that can effectively and reliably monitor the state of the high pressure turbomachinery and provide engine protection through a new synchronous vibration redline which enables engine shutdown if the vibration exceeds predetermined thresholds. The introduction of this system required improvements and modification to the Block II controller such as redesigning the Digital Computer Unit (DCU) memory and the Flight Accelerometer Safety Cut-Off System (FASCOS) circuitry, eliminating the existing memory retention batteries, installation of the Digital Signal Processor (DSP) technology, and installation of a High Speed Serial Interface (HSSI) with accompanying outside world connectors. Test stand hot-fire testing along with lab testing have verified successful implementation and is expected to reduce the probability of catastrophic engine failures during the shuttle ascent phase and improve safely by about 23% according to the Quantitative Risk Assessment System (QRAS), leading to a safer and more reliable SSME.
An optically intraconnected computer and a reconfigurable holographic optical element employed therein. The basic computer comprises a memory for holding a sequence of instructions to be executed; logic for accessing the instructions in sequence; logic for determining for each the instruction the function to be performed and the effective address thereof; a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing the instructions; and, element selection logic connected to the logic determining the function to be performed for each the instruction for determining the class of each function and for causing the instruction to be executed by those the elements which perform those associated the logical sequences affecting the instruction execution in an optimum manner. In the optically intraconnected version, the element selection logic is adapted for transmitting and switching signals to the elements optically.
The SARE Earth Observing and Technological Mission is part of the Argentinean Space Agency (CONAE - Comision Nacional de Actividades Espaciales) Small and Technological Payloads Program. The Argentinean National Space Program requires from the SARE program mission to test in a real environment of several units, assemblies and components to reduce the risk of using these equipments in more expensive Space Missions. The objective is to make use those components with an acceptable maturity in design or development, but without any heritage at space. From the application point of view, this mission offers new products in the Earth Observation data market which are listed in the present paper. One of the technological payload on board of the SARE satellite is the sensor Ground Tracker. It computes the satellite attitude and orbit in real time (goal) and/or by ground processing. For the first operating mode a dedicated computer and mass memory are necessary to be part of the mentioned sensor. For the second operational mode the hardware and software are much simpler.
A paper addresses much of the same subject matter as that of Fast Algorithms for Model-Based Diagnosis (NPO-30582), which appears elsewhere in this issue of NASA Tech Briefs. However, in the paper, the emphasis is more on the hitting-set problem (also known as the transversal problem), which is well known among experts in combinatorics. The authors primary interest in the hitting-set problem lies in its connection to the diagnosis problem: it is a theorem of model-based diagnosis that in the set-theory representation of the components of a system, the minimal diagnoses of a system are the minimal hitting sets of the system. In the paper, the hitting-set problem (and, hence, the diagnosis problem) is translated from a combinatorial to a computational problem by mapping it onto the Boolean satisfiability and integer- programming problems. The paper goes on to describe developments nearly identical to those summarized in the cited companion NASA Tech Briefs article, including the utilization of Boolean-satisfiability and integer- programming techniques to reduce the computation time and/or memory needed to solve the hitting-set problem.
Consumer technology, over the last decade, has begun to encompass devices that enable us to figure out where we are, which way we are pointing, observe the world around us, and store and transmit this information to wherever we want. Once separate consumer products such as GPS units, digital cameras and mobile phones are now combined into the modern day Smartphone. Since these capabilities are remarkably similar to those required for the multi-million dollar satellites - so why not use a multihundred dollar Smartphone instead? The PhoneSat project of NASA Ames Research Center is developing technology demonstrations utilizing these extraordinary advances to show just how simple and cheap Space can be. The style of development revolves around the "release early, release often" Silicon Valley mentality. PhoneSat is a series of 1U CubeSat size spacecrafts that use an off-the-shelf Smartphone as their onboard computer. By doing so, PhoneSat takes advantage of the high computational capability, large memory as well as ultra-tiny sensors like high-resolution cameras and navigation devices that Smartphones offer. Along with a Smartphone, PhoneSat is equipped with other commercially available technology products, such as medical brushless motors that are used as reaction wheels. Over the four years that NASA Ames Research Center has been developing the PhoneSat project, different suborbital and orbital flight activities have proven the validity of this revolutionary approach. In early 2013, the PhoneSat project launched the first triage of PhoneSats into LEO. In the five day orbital life time, the nano-satellites flew the first functioning Smartphone based satellites (using the Nexus One and Nexus S phones), the cheapest satellite (a total parts cost below $3,500) and one of the fastest on-board processors (CPU speed of 1GHz). In late 2013, the PhoneSat project launched an improved version of its bus to a higher altitude orbit which provided data about the overall system's tolerance to the space environment. In this paper, an overview of the PhoneSat project as well as a summary of the in-flight experimental results is presented. NASA Ames Research Center is carrying on its effort to bring a paradigm shift in the way we conceive Space exploration, this new approach is certainly incarnated by PhoneSat. A set of eight PhoneSat-based CubeSats is manifested to launch in 2014 with the purpose of demonstrating new technical capabilities and being a pathfinder for future Spacecraft technology missions.
The Scalable Implementation of Finite Elements by NASA (ScIFEN) is a software package developed to solve complex computational materials and structures problems using the finite element method (FEM). In this paper, we describe optimization techniques to speed up the linear solver computation that occurs within the ScIFEN application. We consider GPUs from two different vendors, NVIDIA and AMD as our target platforms for optimization and highlight differences in performance and optimization techniques. The NVIDIA GPU Volta V100 is used in the Summit system deployed at Oak Ridge National Laboratory, and the new exascale system, Frontier, will be using AMD Radeon Instinct GPU. We evaluated the performance of various optimization techniques on test matrices, ranging in size from100K to 4M, that are representative of ScIFEN applications. The linear solver computation is memory-bound on both GPUs. Our experiments show that on the NVIDIA GPU we obtained up to79%of the theoretical peak bandwidth, while the AMD GPU achieved 59%. Overall, the NVIDIA V100 GPU outperforms the AMD MI 25 GPU1. We observed an overall speedup of up to37X on an NVIDIA V100 compared to an Intel Skylake 12-coremachine. The solver for a 4M degree of freedom system took under 2.5 seconds.
A parallel processing scheme for a single chain robot arm is presented for high speed computation on a shared memory multiprocessor. A recursive formulation that is derived from a virtual work form of the d'Alembert equations of motion is utilized for robot arm dynamics. A joint drive system that consists of a motor rotor and gears is included in the arm dynamics model, in order to take into account gyroscopic effects due to the spinning of the rotor. The fine grain parallelism of mechanical and control subsystem models is exploited, based on independent computation associated with bodies, joint drive systems, and controllers. Efficiency and effectiveness of the parallel scheme are demonstrated through simulations of a telerobotic manipulator arm. Two different mechanical subsystem models, i.e., with and without gyroscopic effects, are compared, to show the trade-off between efficiency and accuracy.
The goal of the Integrated Southern Pine Beetle Expert System (ISPBEX) is to provide expert level knowledge concerning treatment advice that is convenient and easy to use for Forest Service personnel. ISPBEX was developed in CLIPS and delivered on an IBM PC AT class micro-computer, operating with an MS/DOS operating system. This restricted the size of the run time system to 640K. In order to provide a robust expert system, with on-line explanation, help, and alternative actions menus, as well as features that allow the user to back up or execute 'what if' scenarios, a memory efficient menuing system was developed to interface with the CLIPS programs. By robust, we mean an expert system that (1) is user friendly, (2) provides reasonable solutions for a wide variety of domain specific problems, (3) explains why some solutions were suggested but others were not, and (4) provides technical information relating to the problem solution. Several advantages were gained by using this type of user interface (UI). First, by storing the menus on the hard disk (instead of main memory) during program execution, a more robust system could be implemented. Second, since the menus were built rapidly, development time was reduced. Third, the user may try a new scenario by backing up to any of the input screens and revising segments of the original input without having to retype all the information. And fourth, asserting facts from the menus provided for a dynamic and flexible fact base. This UI technology has been applied successfully in expert systems applications in forest management, agriculture, and manufacturing. This paper discusses the architecture of the UI system, human factors considerations, and the menu syntax design.
A compiler and runtime support mechanism is described and demonstrated. The methods presented are capable of solving a wide range of sparse and unstructured problems in scientific computing. The compiler takes as input a FORTRAN 77 program enhanced with specifications for distributing data, and the compiler outputs a message passing program that runs on a distributed memory computer. The runtime support for this compiler is a library of primitives designed to efficiently support irregular patterns of distributed array accesses and irregular distributed array partitions. A variety of Intel iPSC/860 performance results obtained through the use of this compiler are presented.
In this paper, operational principles of a cryogenic memory cell that utilizes high-temperature superconductors (high-T c ) are presented. Such a cell consists of three inductively coupled Josephson junctions coupled via inductors. Design and operational logic of this type of cell were recently introduced and demonstrated for low temperature 4 K environment. The basic memory cell operations (read, write, reset) can be implemented on the same simple circuit and both destructive and non-destructive memory cell operations can be realized. Here, we present the design principles and computational validation of basic memory cell operations (write, read, and reset) for the high-T c memory cell. In conclusion, our results for the high-T c memory cell operations show very good resemblance with the previously presented low-temperature 4 K memory cell operations.
merging High-Performance Computing (HPC) workloads, such as graph analytics, machine learning, and big data science, are data-intensive. Data-intensive workloads usually present fine-grained memory accesses with limited or no data locality, and thus incur frequent cache misses and low utilization of memory bandwidth. 3D-stacked memory devices such as Hybrid Memory Cube (HMC) and High Bandwidth Memory (HBM) can provide significantly higher bandwidth than conventional memory modules. However, the traditional interfaces and optimization methods for JEDEC DDR devices do not allow to fully exploit the potential performance of 3D-stacked memory with the massive amount of irregular memory accesses of data-intensive applications. In this paper, we propose a novel Hotspot-Aware Manager (HAM) infrastructure for 3D-stacked memory devices capable of optimizing memory access streams via request aggregation, hotspot detection, and in-memory prefetching. %and an associated hotspot-aware page policy. We present the HAM design and implementation, and simulate it on a system using RISC-V embedded cores with attached HMC devices. We extensively evaluate HAM with over 12 benchmarks and applications representing diverse irregular memory access patterns. The results show that, on average, HAM reduces redundant requests by 37.51\% and increases the prefetch buffer hit rate by 4.2 times, compared to a baseline streaming prefetcher. On the selected benchmark set, HAM provides performance gains of 21.81\% in average (up to 34.28\%) and power savings of 35.07\% over a standard 3D-stacked memory.
The MSL Curiosity rover landed on Mars on August~5, 2012. Over time, one of its two computers experienced critical hardware memory failure. This non-volatile NAND flash memory held file system partitions and tunable parameters needed for running rover flight software. The project assembled a design and development team to re-purpose a NOR flash memory hardware chip, only 1.5\% of the size of the NAND, to hold the file systems and parameters. The usable NOR memory required major software changes to accommodate the new limitations of slower access speeds, vastly different physical layout, and smaller size. This presentation discusses the approach, challenges, and outcomes of restoring function to the computer so it can act as a ``lifeboat'' in event of problems with the primary computer.
The core function of many neural network algorithms is the dot product, or vector matrix multiply (VMM) operation. Crossbar arrays utilizing resistive memory elements can reduce computational energy in neural algorithms by up to five orders of magnitude compared to conventional CPUs. Moving data between a processor, SRAM, and DRAM dominates energy consumption. By utilizing analog operations to reduce data movement, resistive memory crossbars can enable processing of large amounts of data at lower energy than conventional memory architectures.
Nuclear cross sections are basic inputs to any nuclear computation. Campaigns of experiments are fitted with the parametric R-matrix model of quantum nuclear interactions, and the resulting cross sections are documented—both pointwise and as resonance parameters (with uncertainties)—in standard evaluated nuclear data libraries (ENDF, JEFF, BROND, JENDL, CENDL, TENDL): these constitute our common knowledge of fundamental low-energy nuclear cross sections. In the past decade, a collaborative effort has been deployed to establish a new nuclear cross-section library format—the Windowed Multipole Library—with the goal of considerably reducing the computational cost of cross-section calculations in nuclear transport simulations. This work lays the theoretical foundations underpinning these efforts. From general R-matrix scattering theory, we derive the windowed multipole representation of nuclear cross sections. Though physically and mathematically equivalent to R-matrix cross sections, the windowed multipole representation is particularly well suited for subsequent temperature treatment of angle-integrated cross sections, in particular Doppler broadening, which is the averaging of cross sections over the thermal motion of the target atoms. Doppler broadening is of critical importance in neutron transport applications, as it ensures the stability of many nuclear reactors (negative thermal reactivity). Yet, Doppler broadening of nuclear cross sections has been a considerable bottleneck for nuclear transport computations, often requiring memory-costly pretabulations. We show that the windowed multipole representation can perform accurate Doppler broadening analytically (up to the first reaction threshold), from which we derive cross-section temperature derivatives to any order—all computable on the fly (without precalculations stored in memory). Furthermore, we here establish a way of converting the R-matrix resonance parameters uncertainty (covariance matrices) into windowed multipole parameters uncertainty. We show that generating stochastic nuclear cross sections by sampling from the resulting windowed multipole covariance matrix can reproduce the cross-section uncertainty in the original nuclear data file. The windowed multipole representation is therefore a novel nuclear physics formalism able to generate Doppler broadened stochastic nuclear cross sections on the fly, unlocking breakthrough computational gains for nuclear computations. Through this foundational paper, we hope to make the windowed multipole representation accessible, reproducible, and usable for the nuclear physics community, as well as provide the theoretical basis for future research on expanding its capabilities.
The global energy shortage has driven the development of many energy-efficient computational platforms beyond Moore's law, among which brain-inspired neuromorphic computing is one of the promising solutions. Associative memory and pattern recognition are important computations solved by brain-inspired Hopfield networks. Classical Hopfield networks store memories via fixed point attractors of their dynamics. In oscillatory Hopfield networks, these attractors are replaced by periodic orbits. Here, we design an oscillatory Hopfield network based on coupled superconducting oscillators. We first employ a mathematical phase reduction approach to map networks of coupled superconducting rapid single flux quantum (RSFQ) ring oscillators to coupled Kuramoto phase-oscillator networks. We use this theory to numerically optimize the hardware's mutual inductances in order to directly match the phase-reduced superconducting oscillators to a model of phase-oscillator-based Hopfield networks. The resulting network can store multiple oscillatory phase-locked memory patterns and recover the patterns based on the initial phase conditions. As different pattern recognition tasks, or learning, require tunable connectivity strengths between the oscillatory nodes, we further employ a coupler circuit that enables tuning the coupling strength between two oscillators by applying an external flux. We demonstrate the functionality of our design through numerical simulations of a small example network with oscillators operating at 86 GHz and recognizing patterns within 10 ns. Our approach enables the learning and retrieval of dynamical memory patterns with a wide range of applications where rhythmic dynamic output is beneficial.
The introduction of Industry 4.0 and the evolution of industrial control systems (ICS) to adopt Internet-based technologies enhanced productivity, but have inadvertently increased their vulnerability to cyber-based malicious attacks. When an ICS system is compromised, security analysts need to identify the root cause quickly to start the recovery process and develop mitigation strategies to safeguard against future instances. Memory forensics is critical in the analysis process to ascertain what occurred. To date, approaches to analyze the persistent memory in ICS devices are limited, and almost nonexistent for volatile memory. This paper proposes an automated methodology, COMA, for PLC memory dump analysis using computer vision and deep learning techniques. Specifically, COMA converts the sequences of bytes in a PLC memory dump to RGB pixels and creates a deep learning model that learns the underlying patterns and features of pre-labeled forensic artifacts in images and segments them into distinct regions. COMA then uses the trained model to automatically segment new memory images and extract forensic artifacts. We evaluate COMA on a Schneider Electric Modicon M221 PLC involving two cyber-based attack scenarios: (i) code injection and (ii) code modification. The empirical results show that COMA can successfully detect attack artifacts in memory dumps in both scenarios.