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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 775 records · Page 43
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Ferroelectric capacitors and field-effect transistors as in-memory computing elements for machine learning workloads

Abstract This study discusses the feasibility of Ferroelectric Capacitors (FeCaps) and Ferroelectric Field-Effect Transistors (FeFETs) as In-Memory Computing (IMC) elements to accelerate machine learning (ML) workloads. We conducted an exploration of device fabrication and proposed system-algorithm co-design to boost performance. A novel FeCap device, incorporating an interfacial layer (IL) and$$\text {Hf}_{0.5}\text {Zr}_{0.5}\text {O}_2$$ Hf 0.5 Zr 0.5 O 2 (HZO), ensures a reduction in operating voltage and enhances HZO scaling while being compatible with CMOS circuits. The IL also enriches ferroelectricity and retention properties. When integrated into crossbar arrays, FeCaps and FeFETs demonstrate their effectiveness as IMC components, eliminating sneak paths and enabling selector-less operation, leading to notable improvements in energy efficiency and area utilization. However, it is worth noting that limited capacitance ratios in FeCaps introduced errors in multiply-and-accumulate (MAC) computations. The proposed co-design approach helps in mitigating these errors and achieves high accuracy in classifying the CIFAR-10 dataset, elevating it from a baseline of 10% to 81.7%. FeFETs in crossbars, with a higher on-off ratio, outperform FeCaps, and our proposed charge-based sensing scheme achieved at least an order of magnitude reduction in power consumption, compared to prevalent current-based methods.

Science & Technology - Other Topics↗
DOE OSTI2022

Optical bistability in PECVD silicon-rich nitride

We present a study of optical bi-stability in a 3.02 refractive index at 1550nm plasma enhanced chemical vapor deposition (PECVD) silicon-rich nitride (SRN) film, as it pertains to bi-stable switching, memory applications, and thermal sensing applications. In this work we utilize an SRN ring resonator device, which we first characterize at low-power and then compare thermo-optic coefficients, (2.12 ± 0.125) × 10 −4 /°C, obtained from thermal-heating induced resonance shifts to optically induced resonance shifts as well as estimated propagation loss and absorption. We then measure the time response of this nonlinearity demonstrating the relaxation time to be 18.7 us, indicating the mechanism to be thermal in nature. Finally, we demonstrate bi-stable optical switching.

42 ENGINEERING↗
NASA NTRS1972

Investigation of superconducting interactions and amorphous semiconductors

Research papers on superconducting interactions and properties and on amorphous materials are presented. The search for new superconductors with improved properties was largely concentrated on the study of properties of thin films. An experimental investigation of interaction mechanisms revealed no new superconductivity mechanism. The properties of high transition temperature, type 2 materials prepared in thin film form were studied. A pulsed field solenoid capable of providing fields in excess of 300 k0e was developed. Preliminary X-ray measurements were made of V3Si to determine the behavior of cell constant deformation versus pressure up to 98 kilobars. The electrical properties of amorphous semiconducting materials and bulk and thin film devices, and of amorphous magnetic materials were investigated for developing radiation hard, inexpensive switches and memory elements.

Janocko, M. A.↗
NASA NTRS2009

Video System for Viewing From a Remote or Windowless Cockpit

A system of electronic hardware and software synthesizes, in nearly real time, an image of a portion of a scene surveyed by as many as eight video cameras aimed, in different directions, at portions of the scene. This is a prototype of systems that would enable a pilot to view the scene outside a remote or windowless cockpit. The outputs of the cameras are digitized. Direct memory addressing is used to store the data of a few captured images in sequence, and the sequence is repeated in cycles. Cylindrical warping is used in merging adjacent images at their borders to construct a mosaic image of the scene. The mosaic-image data are written to a memory block from which they can be rendered on a head-mounted display (HMD) device. A subsystem in the HMD device tracks the direction of gaze of the wearer, providing data that are used to select, for display, the portion of the mosaic image corresponding to the direction of gaze. The basic functionality of the system has been demonstrated by mounting the cameras on the roof of a van and steering the van by use of the images presented on the HMD device.

Banerjee, Amamath↗
NASA NTRS2018

Range and Intensity Image-Based Terrain and Vehicle Relative Pose Estimation System

A navigation system includes an image acquisition device for acquiring a range image of a target vehicle, at least one processor, a memory including a target vehicle model and computer readable program code, where the processor and the computer readable program code are configured to cause the navigation system to convert the range image to a point cloud having three dimensions, compute a transform from the target vehicle model to the point cloud, and use the transform to estimate the target vehicle's attitude and position for capturing the target vehicle.

Gill, Nathaniel↗
NASA NTRS2009

On Nibbles and Bytes: The Conundrum of Memory for Space Systems - NASA Electronic Parts and Packaging (NEPP) and Efforts in Memories

Radiation requirements and trends. TID: 1) >90% of NASA applications are < 100 krads-Si in piecepart requirements. a) Many commercial devices (NVM and SDRAMs) meet or come close to this. b) Charge pump TID tolerance has improved an order magnitude over the last 10 years. 2) There are always a few programs with higher level needs and, of course, defense needs SEL: 1) Prefer none or rates that are considered low risk. a) Latent damage is a bear to deal with. 2) As we re packing cells tighter and even with lower Vdd, we re seeing SEL on commercial devices regularly (<90nm). a) Often in power conversion, I/O, or control areas. SEU: 1) It s not the bit errors, it s the SEFIs errors that are the biggest issues. a) Scrubbing concerns for risk, power, speed.

LaBel, Kenneth A.↗
NASA NTRS1974

A membrane page composer - Further developments

Membrane page composers were made and were evaluated in a simulated holographic optical memory system. Calculated and experimentally determined electromechanical and optical characteristics of the circular membrane light valves used on the arrays are shown to be in close agreement. Several operating prototypes of 8 x 8 and 16 x 16 elements were produced. Measurements were made of switching time, optical contrast, and dynamic storage time of many cells on the devices. Digital patterns were stored in the arrays. The performance required of the page composer as a component of an optical memory system is considered. The fabrication techniques used can be easily extended to larger arrays.

Cosentino, L. S.↗
NASA NTRS2006

Pattern-Recognition Processor Using Holographic Photopolymer

proposed joint-transform optical correlator (JTOC) would be capable of operating as a real-time pattern-recognition processor. The key correlation-filter reading/writing medium of this JTOC would be an updateable holographic photopolymer. The high-resolution, high-speed characteristics of this photopolymer would enable pattern-recognition processing to occur at a speed three orders of magnitude greater than that of state-of-the-art digital pattern-recognition processors. There are many potential applications in biometric personal identification (e.g., using images of fingerprints and faces) and nondestructive industrial inspection. In order to appreciate the advantages of the proposed JTOC, it is necessary to understand the principle of operation of a conventional JTOC. In a conventional JTOC (shown in the upper part of the figure), a collimated laser beam passes through two side-by-side spatial light modulators (SLMs). One SLM displays a real-time input image to be recognized. The other SLM displays a reference image from a digital memory. A Fourier-transform lens is placed at its focal distance from the SLM plane, and a charge-coupled device (CCD) image detector is placed at the back focal plane of the lens for use as a square-law recorder. Processing takes place in two stages. In the first stage, the CCD records the interference pattern between the Fourier transforms of the input and reference images, and the pattern is then digitized and saved in a buffer memory. In the second stage, the reference SLM is turned off and the interference pattern is fed back to the input SLM. The interference pattern thus becomes Fourier-transformed, yielding at the CCD an image representing the joint-transform correlation between the input and reference images. This image contains a sharp correlation peak when the input and reference images are matched. The drawbacks of a conventional JTOC are the following: The CCD has low spatial resolution and is not an ideal square-law detector for the purpose of holographic recording of interference fringes. A typical state-of-the-art CCD has a pixel-pitch limited resolution of about 100 lines/mm. In contrast, the holographic photopolymer to be used in the proposed JTOC offers a resolution > 2,000 lines/mm. In addition to being disadvantageous in itself, the low resolution of the CCD causes overlap of a DC term and the desired correlation term in the output image. This overlap severely limits the correlation signal-to-noise ratio. The two-stage nature of the process limits the achievable throughput rate. A further limit is imposed by the low frame rate (typical video rates) of low- and medium-cost commercial CCDs.

Chao, Tien-Hsin↗
NASA NTRS2000

Flight Control Using Distributed Shape-Change Effector Arrays

Recent discoveries in material science and fluidics have been used to create a variety of novel effector devices that offer great potential to enable new approaches to aerospace vehicle flight control. Examples include small inflatable blisters, shape-memory alloy diaphragms, and piezoelectric patches that may be used to produce distortions or bumps on the surface of an airfoil to generate control moments. Small jets have also been used to produce a virtual shape-change through fluidic means by creating a recirculation bubble on the surface of an airfoil. An advanced aerospace vehicle might use distributed arrays of hundreds of such devices to generate moments for stabilization and maneuver control, either augmenting or replacing conventional ailerons, flaps or rudders. This research demonstrates the design and use of shape-change device arrays for a tailless aircraft in a low-rate maneuvering application. A methodology for assessing the control authority of the device arrays is described, and a suite of arrays is used in a dynamic simulation to illustrate allocation and deployment methodologies. Although the authority of the preliminary shape-change array designs studied in this paper appeared quite low, the simulation results indicate that the effector suite possessed sufficient authority to stabilize and maneuver the vehicle in mild turbulence.

Raney, David L.↗
NASA NTRS1997

Single-Event Upset in Flash Memories

This paper discusses single-event upset effets in flash memories, using heavy ions at the Texas A&M cyclotron. Initial results are presented for one manufacturer that compare uspet in the individual memory elemts with the more complex funtion failure modes that occur in the internal state machine and its control registers. This device is designed to function with either 5-V or 3.3-V power supply levels for read operations, but requires an additional 5 or 12-V power supply for write and erase operations.

Flash↗
DOE OSTI2024

Incompatibility as a Resource for Programmable Quantum Instruments

Quantum instruments represent the most general type of quantum measurement, as they incorporate processes with both classical and quantum outputs. In many scenarios, it may be desirable to have some “on-demand” device that is capable of implementing one of many possible instruments whenever the experimenter desires. We refer to such objects as programmable instrument devices (PIDs), and this paper studies PIDs from a resource-theoretic perspective. A physically important class of PIDs are those that do not require quantum memories to implement, and these are naturally “free” in this resource theory. Additionally, these free objects correspond precisely to the class of unsteerable channel assemblages in the study of channel steering. The traditional notion of measurement incompatibility emerges as a resource in this theory since any PID controlling an incompatible family of instruments requires a quantum memory to build. We identify an incompatibility preorder between PIDs based on whether one can be transformed into another using processes that do not require additional quantum memories. Necessary and sufficient conditions are derived for when such transformations are possible based on how well certain guessing games can be played using a given PID. Ultimately our results provide an operational characterization of incompatibility, and they offer semi-device-independent tests for incompatibility in the most general types of quantum instruments. Published by the American Physical Society 2024

Physics↗
DOE OSTI2022

GenASiS Basics: Object-oriented utilitarian functionality for large-scale physics simulations (Version 4)

GenASiS Basics provides modern Fortran classes furnishing extensible object-oriented utilitarian functionality for large-scale physics simulations on distributed memory supercomputers. This functionality includes physical units and constants; display to the screen or standard output device; message passing; I/O to disk; and runtime parameter management and usage statistics. Herein, this revision—Version 4 of Basics—includes a name change and additions to functionality, including the facilitation of direct communication between GPUs.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2022

Trajectory prediction dimensionality reduction for low-cost connected automated vehicle systems

Here, to facilitate low-cost connected automated vehicle (CAV) system development, this study proposes two interpretable dimensionality reduction techniques in vehicle trajectory prediction, i.e., the piecewise Taylor series approximation (PTA) and the piecewise Fourier series approximation (PFA), to lower computation complexity, reduce device investment, and decrease computation energy consumption. Two benchmarks are developed, the long short-term memory (LSTM)-based model without dimensionality reduction and the LSTM-based model with encoder-decoder (a widely used dimensionality reduction technique). Results show that the four predictions have similar accuracy, and the training time (proportional to computation energy consumption) of models with dimensionality reduction techniques is greatly reduced. The reduction is even more significant when PTA/PFA is used. Sensitivity analysis advises PFA/PTA parameter selections to reduce computation complexity without significant loss of prediction accuracy. Further, the robustness of the LSTM PTA/PFA is proven by the investigation of data noises.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2025

Probing the Effects of the First Atomic Layer on the Dynamic Behavior of Sub-2 nm MgO/Al 2 O 3 Memristors

As electronic devices continue to scale down from the current sub-5 nm range, atomic-scale control of defects becomes increasingly crucial to suppressing their impact on the physical properties of the devices. Memristors present an excellent example as a nonlinear and dynamic device with high speed and endurance required for electronic applications ranging from neuromorphic computing to nonvolatile memories. Herein we investigate the impact of atomic defects in sub-2 nm thick MgO/Al 2 O 3 atomic layer stack (ALS) memristors that use an M1 (switching layer)/M2 (oxygen vacancy reservoir layer) bilayer structure grown using in vacuo atomic layer deposition (iALD). Intriguingly, we revealed a direct correlation of the atomic defects in the M2 layer with the memristor dynamic behavior using a combined analysis of in situ scanning tunneling spectroscopy (iSTS) on the M2 layer and ex situ characterization on the memristors. Specifically, incomplete coverage of the 1st ALD atomic layer of M2 on the electrode yields defects at the M2/electrode interface. Despite the monotonic increase of ALD coverage, by almost three-fold from ~30% to >90%, at completion of the M2 layer of ~ 0.7 nm in thickness, the impact of the defects on the M2/electrode interface has been found detrimental to both memristor switching speed and endurance. Guided by atomistic simulation, we addressed the issue of interface defects via tuning of the Al surface hydroxylation to increase the first atomic layer ALD coverage to ~75%, leading to improved memristor switching speed and endurance by several orders of magnitude. In conclusion, these findings shed light on the correlation between the atomic defects and the dynamic behavior of sub-2 nm memristors and the importance of minimizing the atomic defects in memristors for future electronic applications.

Atomic Layer Deposition↗
DOE OSTI2025

Experiences with SYCL on AMD GPUs with Kokkos

With the recent diversification of the hardware landscape in the high-performance computing (HPC) community, performance-portability solutions are becoming more and more important. One of the most popular choices is Kokkos, which recently became a Linux Foundation project. Most of its development is supported by the US Department of Energy and the French Alternative Energies and Atomic Energy Commission. Kokkos is implemented as a C++ library with multiple backends to support CPUs as well as various GPU architectures. These backends include OpenMP, CUDA, HIP, and also SCYL. This approach enables users to leverage the preferred vendor toolchain for the respective platform (e.g. CUDA, ROCm, OneAPI). The SYCL backend is used to target Intel GPUs, in particular to support the Aurora exascale supercomputer. However, SYCL itself also offers a large degree of portability, and in fact Kokkos’ CI for SYCL has been running on NVIDIA hardware due to a lack of access to Intel GPUs. In this report, we describe our experience with using Kokkos SYCL backend on AMD GPUs targeting the Frontier supercomputer at Oak Ridge National Laboratory. The two major SYCL implementations are DPC++ and AdaptiveCpp. While the Kokkos SYCL backend has been implemented using the former, the latter was the first implementation to target AMD GPUs. We will discuss the experience with both of these SYCL implementations in terms of functionality and performance. Using Kokkos to evaluate SYCL toolchains has a number of benefits. Kokkos’ use of SYCL is fairly complex, exercising features such as graphs, relocatable device functions, atomics – including for non-arithmetic types, as well as pinned and page migratable memory allocations. Kokkos also needs to implement capabilities such as Kokkos’ hierarchical parallelism that are not a straight-forward mapping to SYCL capabilities. Furthermore, a large number of libraries and applications that represent diverse use cases are implemented in Kokkos, providing readily available test cases for a toolchain evaluation. Preliminary results show that support for AMD GPUs in DPC++ is much less mature than for NVIDIA GPUs or Intel GPUs. While the situation has improved significantly over the last year, we still encounter many runtime failures, dispatching problems, and code generation issues. With AdaptiveCpp the challenges arise even earlier in the evaluation process. Since Kokkos’ SYCL implementation is largely focused on supporting Intel GPUs, we opted to leverage SYCL extensions which are available in DPC++ but not in AdaptiveCpp. Furthermore, AdaptiveCpp appears to be less conformant with the SYCL2020 standard which Kokkos relies on. In some cases, we are able to work around the lack of feature support, in other cases we have to disable certain Kokkos capabilities to evaluate the toolchain. Our evaluation will leverage Kokkos’ unit tests to establish basic functionality and feature completeness. We then use simple benchmarks for components of a CG implementation as a measure of usability and performance of the SYCL toolchains.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1992

Spacecraft optical disk recorder memory buffer control

The goal of this project is to develop an Application Specific Integrated Circuit (ASIC) for use in the control electronics of the Spacecraft Optical Disk Recorder (SODR). Specifically, this project is to design an extendable memory buffer controller ASIC for rate matching between a system Input/Output port and the SODR's device interface. The aforementioned goal can be partitioned into the following sub-goals: (1) completion of ASIC design and simulation (on-going via ASEE fellowship); (2) ASIC Fabrication (at ASIC manufacturer); and (3) ASIC Testing (NASA/LaRC, Christopher Newport University).

Hodson, Robert F.↗
DOE OSTI2022

Memory forensic analysis of a programmable logic controller in industrial control systems

In industrial control systems (ICS), programmable logic controllers (PLCs) are used to automate physical processes such as nuclear plants and power grid stations, and are often subject to cyber attacks. As in conventional IT domain, the memory analysis of the PLCs can help answer important forensic questions about the attack, such as the presence of malicious firmware, injection of modified control logic (the program running on the PLC), and manipulation of I/O devices (e.g., sensors and actuators). Unlike conventional IT domain, PLCs have heterogeneous hardware architecture, proprietary firmware and control software, making it challenging to employ a unified framework for their memory forensics. For merely extracting artifacts of forensic importance, reverse-engineering the firmware is a tedious task, and the effort needs to be repeated for every PLC model. As a community, a step-wise approach to tackle this challenge is to analyze the memory of specific PLCs, and subsequently find a generic framework applicable to all PLCs. Our work is a step forward in this direction. By following a methodology that focuses on the functional layer of PLCs instead of reverse engineering the firmware, we analyze the digital forensic artifacts available in a common PLC, Allen-Bradley ControlLogix 1756-L61. Before diving into the memory dump, we analyze the PLC control software to create a list of important artifacts that are sure to exist in the PLC memory dump. The approach employs a setup where PLC control software RSLogix-5000 is connected to the PLC, and the memory dump can be obtained as and when needed. We create test cases that sequentially highlight each category of artifacts, followed by an examination of the resultant impact on memory. After attaining the listed artifacts, we employ conventional string and known data searches to extract interesting information present in this PLC's memory. The memory analysis profile, presented as a Python library and shared with the community, can help a forensic investigator to readily extract forensic artifacts from the same model's controller. The adopted approach may help researchers in creating memory profile of other PLCs, and ultimately formulating a generic PLC memory analysis framework.

Rais, Muhammad Haris↗
DOE OSTI2023

Magnetic tunnel junctions with voltage tunable interlayer coupling for memory and sensor applications

Various examples are provided for magnetic tunnel junctions and applications thereof. In one example, a magnetic tunnel junction (MTJ) device includes a first ferromagnetic (FM) layer; a gadolinium oxide (GdOX) tunnel barrier disposed on the first ferromagnetic layer; and a second FM layer disposed on the GdOX tunnel barrier. In another example, a perpendicular MTJ (pMTJ) device includes a first layer including a magnetic material; a tunnel barrier disposed on the first layer to form the pMTJ; and a second layer including the magnetic material, the second layer disposed on the tunnel barrier.

Wang, Weigang↗