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At least 757 records · Page 42

Considerations for spacecraft design for MSAT

The paper describes the system design considerations and design activities performed at Spar Aerospace in the last 18 months in support of the development of a Canadian Mobile Communication Satellite (MSAT). Recent evolving international agreements and events of importance to MSAT are the emergence of the U.S. Operator and the Mobile WARC 1987. Their impacts on the system requirements and system design are discussed. Solutions to these new requirements are implemented into the 9 Beam baseline design. The system design and the parallel technology development permit the support of a commercial flight program.

Hing, Kunvana↗

Global Interoperability of High Definition Video Streams Via ACTS and Intelsat

In 1993, a proposal at the Japan.-U.S. Cooperation in Space Program Workshop lead to a subsequent series of satellite communications experiments and demonstrations, under the title of Trans-Pacific High Data Rate Satellite Communications Experiments. The first of which is a joint collaboration between government and industry teams in the United States and Japan that successfully demonstrated distributed high definition video (HDV) post-production on a global scale using a combination of high data rate satellites and terrestrial fiber optic asynchronous transfer mode (ATM) networks. The HDV experiment is the first GIBN experiment to establish a dual-hop broadband satellite link for the transmission of digital HDV over ATM. This paper describes the team's effort in using the NASA Advanced Communications Technology Satellite (ACTS) at rates up to OC-3 (155 Mbps) between Los Angeles and Honolulu, and using Intelsat at rates up to DS-3 (45 Mbps) between Kapolei and Tokyo, with which HDV source material was transmitted between Sony Pictures High Definition Center (SPHDC) in Los Angeles and Sony Visual Communication Center (VCC) in Shinagawa, Tokyo. The global-scale connection also used terrestrial networks in Japan, the States of Hawaii and California. The 1.2 Gbps digital HDV stream was compressed down to 22.5 Mbps using a proprietary Mitsubishi MPEG-2 codec that was ATM AAL-5 compatible. The codec: employed four-way parallel processing. Improved versions of the codec are now commercially available. The successful post-production activity performed in Tokyo with a HDV clip transmitted from Los Angeles was predicated on the seamless interoperation of all the equipment between the sites, and was an exciting example in deploying a global-scale information infrastructure involving a combination of broadband satellites and terrestrial fiber optic networks. Correlation of atmospheric effects with cell loss, codec drop-out, and picture quality were made. Current efforts in the Trans-Pacific series plan to examine the use of Internet Protocol (IP)-related technologies over such an infrastructure. The use of IP allows the general public to be an integral part of the exciting activities, helps to examine issues in constructing the solar-system internet, and affords an opportunity to tap the research results from the (reliable) multicast and distributed systems communities. The current Trans- Pacific projects, including remote astronomy and digital library (visible human) are briefly described.

Hsu, Eddie↗

A New Approach to Parallel Interference Cancellation for CDMA

This paper introduces an improved nonlinear parallel interference cancellation scheme that significantly reduces the degrading effect of user interference with implementation complexity linear in the number of users. The scheme operates on the fact that parallel processing simultaneously removes from each user a part of the interference produced by the remaining users accessing the channel the amount being proportional to their reliability. The parallel processing can be done in multiple stages. Simulation results are given for a multitude of different situations, in particular those cases for which the analysis is too complex.

interference cancellation multiuser communication ↗

Capacity Maximizing Constellations

Some non-traditional signal constellations have been proposed for transmission of data over the Additive White Gaussian Noise (AWGN) channel using such channel-capacity-approaching codes as low-density parity-check (LDPC) or turbo codes. Computational simulations have shown performance gains of more than 1 dB over traditional constellations. These gains could be translated to bandwidth- efficient communications, variously, over longer distances, using less power, or using smaller antennas. The proposed constellations have been used in a bit-interleaved coded modulation system employing state-ofthe-art LDPC codes. In computational simulations, these constellations were shown to afford performance gains over traditional constellations as predicted by the gap between the parallel decoding capacity of the constellations and the Gaussian capacity

Barsoum, Maged↗

Flexible Peripheral Component Interconnect Input/Output Card

The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.

Bigelow, Kirk K.↗

Probing Particle Impingement in Boilers Using High-Performance Computing with Parallel CPUs and GPUs

The major goals of the project are to calculate and analyze particle impingement within boilers, quantify effects of particulates in boilers, and predict damage rates of boilers under different cycling modes. Collectively, these initiatives develop insight into existing coal plant challenges using advanced modeling tools, particularly those leveraging high-performance computing resources. High-performance CFD computing forms a central theme in this project that will employ a high degree of coordination and communication between these initiatives to realize a final, rigorously sound, and validated computational capability upon completion. These results will create a holistic, comprehensive, systems-level assessment of damage rates under different cycling modes. Together, these objectives will develop critical insight into damage mechanisms in existing coal plant challenges for accurately and efficiently assessing operating performance in fossil energy power plants.

20 FOSSIL-FUELED POWER PLANTS↗

A Simple XML Producer-Consumer Protocol

There are many different projects from government, academia, and industry that provide services for delivering events in distributed environments. The problem with these event services is that they are not general enough to support all uses and they speak different protocols so that they cannot interoperate. We require such interoperability when we, for example, wish to analyze the performance of an application in a distributed environment. Such an analysis might require performance information from the application, computer systems, networks, and scientific instruments. In this work we propose and evaluate a standard XML-based protocol for the transmission of events in distributed systems. One recent trend in government and academic research is the development and deployment of computational grids. Computational grids are large-scale distributed systems that typically consist of high-performance compute, storage, and networking resources. Examples of such computational grids are the DOE Science Grid, the NASA Information Power Grid (IPG), and the NSF Partnerships for Advanced Computing Infrastructure (PACIs). The major effort to deploy these grids is in the area of developing the software services to allow users to execute applications on these large and diverse sets of resources. These services include security, execution of remote applications, managing remote data, access to information about resources and services, and so on. There are several toolkits for providing these services such as Globus, Legion, and Condor. As part of these efforts to develop computational grids, the Global Grid Forum is working to standardize the protocols and APIs used by various grid services. This standardization will allow interoperability between the client and server software of the toolkits that are providing the grid services. The goal of the Performance Working Group of the Grid Forum is to standardize protocols and representations related to the storage and distribution of performance data. These standard protocols and representations must support tasks such as profiling parallel applications, monitoring the status of computers and networks, and monitoring the performance of services provided by a computational grid. This paper describes a proposed protocol and data representation for the exchange of events in a distributed system. The protocol exchanges messages formatted in XML and it can be layered atop any low-level communication protocol such as TCP or UDP Further, we describe Java and C++ implementations of this protocol and discuss their performance. The next section will provide some further background information. Section 3 describes the main communication patterns of our protocol. Section 4 describes how we represent events and related information using XML. Section 5 describes our protocol and Section 6 discusses the performance of two implementations of the protocol. Finally, an appendix provides the XML Schema definition of our protocol and event information.

Smith, Warren↗

An implementation of a tree code on a SIMD, parallel computer

We describe a fast tree algorithm for gravitational N-body simulation on SIMD parallel computers. The tree construction uses fast, parallel sorts. The sorted lists are recursively divided along their x, y and z coordinates. This data structure is a completely balanced tree (i.e., each particle is paired with exactly one other particle) and maintains good spatial locality. An implementation of this tree-building algorithm on a 16k processor Maspar MP-1 performs well and constitutes only a small fraction (approximately 15%) of the entire cycle of finding the accelerations. Each node in the tree is treated as a monopole. The tree search and the summation of accelerations also perform well. During the tree search, node data that is needed from another processor is simply fetched. Roughly 55% of the tree search time is spent in communications between processors. We apply the code to two problems of astrophysical interest. The first is a simulation of the close passage of two gravitationally, interacting, disk galaxies using 65,636 particles. We also simulate the formation of structure in an expanding, model universe using 1,048,576 particles. Our code attains speeds comparable to one head of a Cray Y-MP, so single instruction, multiple data (SIMD) type computers can be used for these simulations. The cost/performance ratio for SIMD machines like the Maspar MP-1 make them an extremely attractive alternative to either vector processors or large multiple instruction, multiple data (MIMD) type parallel computers. With further optimizations (e.g., more careful load balancing), speeds in excess of today's vector processing computers should be possible.

Olson, Kevin M.↗

A modular minicomputer based Navier-Stokes solver

The basic module consists of a minicomputer, low cost peripheral storage device (disk) and a modest number (8-12) of microcomputer modules. A simple arrangement, where the microcomputers are connected to a single time multiplexed bus, only communicating to the host minicomputer, will be efficient. By running the machine in a dedicated mode for long periods of time, it will be possible to obtain a large number of solutions. As such, the device should be useful as a research tool. A scheme is outlined to assemble a number of these computing modules in parallel to decrease computing time. The advantages and disadvantages are discussed of using a number of these systems assembled in a loosely coupled configuration, each independently computing a separate flow, to give a very high throughput.

Steinhoff, J.↗

A robust low-rate coding scheme for packet video

Due to the rapidly evolving field of image processing and networking, video information promises to be an important part of telecommunication systems. Although up to now video transmission has been transported mainly over circuit-switched networks, it is likely that packet-switched networks will dominate the communication world in the near future. Asynchronous transfer mode (ATM) techniques in broadband-ISDN can provide a flexible, independent and high performance environment for video communication. For this paper, the network simulator was used only as a channel in this simulation. Mixture blocking coding with progressive transmission (MBCPT) has been investigated for use over packet networks and has been found to provide high compression rate with good visual performance, robustness to packet loss, tractable integration with network mechanics and simplicity in parallel implementation.

Chen, Y. C.↗

Efficiently modeling neural networks on massively parallel computers

Neural networks are a very useful tool for analyzing and modeling complex real world systems. Applying neural network simulations to real world problems generally involves large amounts of data and massive amounts of computation. To efficiently handle the computational requirements of large problems, we have implemented at Los Alamos a highly efficient neural network compiler for serial computers, vector computers, vector parallel computers, and fine grain SIMD computers such as the CM-2 connection machine. This paper describes the mapping used by the compiler to implement feed-forward backpropagation neural networks for a SIMD (Single Instruction Multiple Data) architecture parallel computer. Thinking Machines Corporation has benchmarked our code at 1.3 billion interconnects per second (approximately 3 gigaflops) on a 64,000 processor CM-2 connection machine (Singer 1990). This mapping is applicable to other SIMD computers and can be implemented on MIMD computers such as the CM-5 connection machine. Our mapping has virtually no communications overhead with the exception of the communications required for a global summation across the processors (which has a sub-linear runtime growth on the order of O(log(number of processors)). We can efficiently model very large neural networks which have many neurons and interconnects and our mapping can extend to arbitrarily large networks (within memory limitations) by merging the memory space of separate processors with fast adjacent processor interprocessor communications. This paper will consider the simulation of only feed forward neural network although this method is extendable to recurrent networks.

Farber, Robert M.↗

Parallel Computation of Unsteady Flows on a Network of Workstations

Parallel computation of unsteady flows requires significant computational resources. The utilization of a network of workstations seems an efficient solution to the problem where large problems can be treated at a reasonable cost. This approach requires the solution of several problems: 1) the partitioning and distribution of the problem over a network of workstation, 2) efficient communication tools, 3) managing the system efficiently for a given problem. Of course, there is the question of the efficiency of any given numerical algorithm to such a computing system. NPARC code was chosen as a sample for the application. For the explicit version of the NPARC code both two- and three-dimensional problems were studied. Again both steady and unsteady problems were investigated. The issues studied as a part of the research program were: 1) how to distribute the data between the workstations, 2) how to compute and how to communicate at each node efficiently, 3) how to balance the load distribution. In the following, a summary of these activities is presented. Details of the work have been presented and published as referenced.

Source record↗

System for Processing Coded OFDM Under Doppler and Fading

An advanced communication system has been proposed for transmitting and receiving coded digital data conveyed as a form of quadrature amplitude modulation (QAM) on orthogonal frequency-division multiplexing (OFDM) signals in the presence of such adverse propagation-channel effects as large dynamic Doppler shifts and frequency-selective multipath fading. Such adverse channel effects are typical of data communications between mobile units or between mobile and stationary units (e.g., telemetric transmissions from aircraft to ground stations). The proposed system incorporates novel signal processing techniques intended to reduce the losses associated with adverse channel effects while maintaining compatibility with the high-speed physical layer specifications defined for wireless local area networks (LANs) as the standard 802.11a of the Institute of Electrical and Electronics Engineers (IEEE 802.11a). OFDM is a multi-carrier modulation technique that is widely used for wireless transmission of data in LANs and in metropolitan area networks (MANs). OFDM has been adopted in IEEE 802.11a and some other industry standards because it affords robust performance under frequency-selective fading. However, its intrinsic frequency-diversity feature is highly sensitive to synchronization errors; this sensitivity poses a challenge to preserve coherence between the component subcarriers of an OFDM system in order to avoid intercarrier interference in the presence of large dynamic Doppler shifts as well as frequency-selective fading. As a result, heretofore, the use of OFDM has been limited primarily to applications involving small or zero Doppler shifts. The proposed system includes a digital coherent OFDM communication system that would utilize enhanced 802.1la-compatible signal-processing algorithms to overcome effects of frequency-selective fading and large dynamic Doppler shifts. The overall transceiver design would implement a two-frequency-channel architecture (see figure) that would afford frequency diversity for reducing the adverse effects of multipath fading. By using parallel concatenated convolutional codes (also known as Turbo codes) across the dual-channel and advanced OFDM signal processing within each channel, the proposed system is intended to achieve at least an order of magnitude improvement in received signal-to-noise ratio under adverse channel effects while preserving spectral efficiency.

Tsou, Haiping↗

5G Securely Energized and Resilient: (5G-SER) (Final Report)

NREL's work on 5G integration with physical power systems (versus simulated systems demonstrated in task 3) under 5G-Securely Energized and Resilient (5G-SER) achieved a major milestone in with the completion of Task 4 activities. After many months (6+) of planning and development along with scaling challenges along the way, a full 5G end-to-end network with physical hardware components (physical inverter, physical power panel, physical battery, etc.) was deployed in a containerized environment. In parallel, a distributed controls architecture for a microgrid powering 5G resources was also successfully modified from its previous instantiation for a simulated environment to work with these physical components. These accomplishments set the stage to use newly setup 5G technology with physical microgrid components to test the feasibility of 5G wireless with physical systems to enable resilient communications between controls and distributed solar and storage resources while exploring ways to configure 5G components to survive power disturbances. The results detailed in the report below show that even utilizing physical components, 5G wireless systems were able to provide resilient results that were similar to the results from the simulated environment Task 3).

24 POWER TRANSMISSION AND DISTRIBUTION↗

ISEE-3/ICE navigation analysis

Efforts to assure communications continuity and navigational accuracy for the ISEE-3 (now called the International Cometary Explorer - ICE) spacecraft as it heads toward a passage through the Giacobini-Zimmer (G-Z) comet tail are reviewed. Sufficient energy was gained with a series of lunar swingbys to take the rendezvous attempt possible. Communications will be by an S-band link though the upgraded Deep Space Network. The G-Z encounter is scheduled for September 1983. A 512 bps data rate will be supported by 64-3 m dishes at various global sites. The tracking will continue for 6 mos as the spacecraft moves into an orbit that parallels that of Halley's Comet. Ground-based recovery of the G-Z location in the spring of 1984 provided data for calculating the ephemerides required for configuring a major course correction for ICE 100 days before rendezvous.

Efron, L.↗

A multi-satellite orbit determination problem in a parallel processing environment

The Engineering Orbit Analysis Unit at GE Valley Forge used an Intel Hypercube Parallel Processor to investigate the performance and gain experience of parallel processors with a multi-satellite orbit determination problem. A general study was selected in which major blocks of computation for the multi-satellite orbit computations were used as units to be assigned to the various processors on the Hypercube. Problems encountered or successes achieved in addressing the orbit determination problem would be more likely to be transferable to other parallel processors. The prime objective was to study the algorithm to allow processing of observations later in time than those employed in the state update. Expertise in ephemeris determination was exploited in addressing these problems and the facility used to bring a realism to the study which would highlight the problems which may not otherwise be anticipated. Secondary objectives were to gain experience of a non-trivial problem in a parallel processor environment, to explore the necessary interplay of serial and parallel sections of the algorithm in terms of timing studies, to explore the granularity (coarse vs. fine grain) to discover the granularity limit above which there would be a risk of starvation where the majority of nodes would be idle or under the limit where the overhead associated with splitting the problem may require more work and communication time than is useful.

Deakyne, M. S.↗

Solar panel parallel mounting configuration

A spacecraft includes a plurality of solar panels interconnected with a power coupler and an electrically operated device to provide power to the device when the solar cells are insolated. The solar panels are subject to bending distortion when entering or leaving eclipse. Spacecraft attitude disturbances are reduced by mounting each of the solar panels to an elongated boom made from a material with a low coefficient of thermal expansion, so that the bending of one panel is not communicated to the next. The boom may be insulated to reduce its bending during changes in insolation. A particularly advantageous embodiment mounts each panel to the boom with a single mounting, which may be a hinge. The single mounting prevents transfer of bending moments from the panel to the boom.

Mutschler, Jr., Edward Charles↗

Performance analysis of a large-grain dataflow scheduling paradigm

A paradigm for scheduling computations on a network of multiprocessors using large-grain data flow scheduling at run time is described and analyzed. The computations to be scheduled must follow a static flow graph, while the schedule itself will be dynamic (i.e., determined at run time). Many applications characterized by static flow exist, and they include real-time control and digital signal processing. With the advent of computer-aided software engineering (CASE) tools for capturing software designs in dataflow-like structures, macro-dataflow scheduling becomes increasingly attractive, if not necessary. For parallel implementations, using the macro-dataflow method allows the scheduling to be insulated from the application designer and enables the maximum utilization of available resources. Further, by allowing multitasking, processor utilizations can approach 100 percent while they maintain maximum speedup. Extensive simulation studies are performed on 4-, 8-, and 16-processor architectures that reflect the effects of communication delays, scheduling delays, algorithm class, and multitasking on performance and speedup gains.

Young, Steven D.↗