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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 757 records · Page 42
All sourcesNASA NTRSDOE OSTI
NASA NTRS1983

Conceptual design of a data reduction system

A telemetry data processing system was defined of the Data Reduction. Data reduction activities in support of the developmental flights of the Space Shuttle were used as references against which requirements are assessed in general terms. A conceptual system design believed to offer significant throughput for the anticipated types of data reduction activities is presented. The design identifies the use of a large, intermediate data store as a key element in a complex of high speed, single purpose processors, each of which performs predesignated, repetitive operations on either raw or partially processed data. The recommended approach to implement the design concept is to adopt an established interface standard and rely heavily on mature or promising technologies which are considered main stream of the integrated circuit industry. The design system concept, is believed to be implementable without reliance on exotic devices and/or operational procedures. Numerical methods were employed to examine the feasibility of digital discrimination of FDM composite signals, and of eliminating line frequency noises in data measurements.

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NASA NTRS1991

Test and evaluation of the generalized gate logic system simulator

The results of the initial testing of the Generalized Gate Level Logic Simulator (GGLOSS) are discussed. The simulator is a special purpose fault simulator designed to assist in the analysis of the effects of random hardware failures on fault tolerant digital computer systems. The testing of the simulator covers two main areas. First, the simulation results are compared with data obtained by monitoring the behavior of hardware. The circuit used for these comparisons is an incomplete microprocessor design based upon the MIL-STD-1750A Instruction Set Architecture. In the second area of testing, current simulation results are compared with experimental data obtained using precursors of the current tool. In each case, a portion of the earlier experiment is confirmed. The new results are then viewed from a different perspective in order to evaluate the usefulness of this simulation strategy.

Miner, Paul S.↗
NASA NTRS1990

Initial evaluation of commercially available InGaAsP DFB laser diodes for use in high-speed digital fiber optic transceivers

NASA has been pursuing the development of high-speed fiber-optic transceivers for use in a number of space data system applications. Current efforts are directed toward a high-performance all-integrated-circuit transceiver operating up to the 3-5 Gb/s range. Details of the evaluation and selection of candidate high-speed optical sources to be used in the space-qualified high-performance transceiver are presented. Data on the performance of commercially available DFB (distributed feedback) lasers are presented, and their performance relative to each other and to their structural design with regard to their use in high-performance fiber-optic transceivers is discussed. The DFB lasers were obtained from seven commercial manufacturers. The data taken on each laser included threshold current, differential quantum efficiency, CW side mode suppression radio, wavelength temperature coefficient, threshold temperature coefficient, natural linewidth, and far field pattern. It was found that laser diodes with buried heterostructures and first-order gratings had, in general, the best CW operating characteristics. The modulated characteristics of the DFB laser diodes are emphasized. Modulated linewidth, modulated side mode suppression ratio, and frequency response are discussed.

Cook, Anthony L.↗
NASA NTRS1993

Photodetector Array For Neural Network

Integrated circuit performs 1,024 threshold operations in parallel. Designed for use in postprocessing output of optical correlator in optoelectronic neural network. Overall function of device to put out digital signals indicative of location(s) of bright spot(s) on detector plane. Response time less than commercial charge-coupled-device (CCD) imaging detector operating at standard television frame rate.

Langenbacher, Harry↗
NASA NTRS1986

Practical design of magnetic heading sensors

Although fluxgate magnetometers have been in use for many years, and a number of theoretical studies of these sensors are available, very little information has been published on the engineering choices relating to the detailed design of magnetometers intended for navigational applications in aircraft and other vehicles. This paper addresses some of the problems encountered in the design of the sensing head, the choice of operating mode, and the design of the supporting electronics for a simple low-cost magnetometer system which will produce a digital readout of the magnetic heading of the vehicle in which it is mounted. A major goal of this study has been to develop a design which minimizes circuit complexity, is easy to fabricate and calibrate, and utilizes a minimum of specialized components. Such a magnetometer system is intended either as a stand-alone indicating instrument or as a source of magnetic heading information for a more sophisticated navigational system.

Garner, H. D.↗
NASA NTRS2001

Fundamentals of Digital Engineering: Designing for Reliability

The concept of designing for reliability will be introduced along with a brief overview of reliability, redundancy and traditional methods of fault tolerance is presented, as applied to current logic devices. The fundamentals of advanced circuit design and analysis techniques will be the primary focus. The introduction will cover the definitions of key device parameters and how analysis is used to prove circuit correctness. Basic design techniques such as synchronous vs asynchronous design, metastable state resolution time/arbiter design, and finite state machine structure/implementation will be reviewed. Advanced topics will be explored such as skew-tolerant circuit design, the use of triple-modular redundancy and circuit hazards, device transients and preventative circuit design, lock-up states in finite state machines generated by logic synthesizers, device transient characteristics, radiation mitigation techniques. worst-case analysis, the use of timing analyzer and simulators, and others. Case studies and lessons learned from spaceflight designs will be given as examples

Katz, R.↗
NASA NTRS2004

NASA Tech Briefs, July 2004

Topics: Optoelectronic Sensor System for Guidance in Docking; Hybrid Piezoelectric/Fiber-Optic Sensor Sheets; Multisensor Arrays for Greater Reliability and Accuracy; Integrated-Optic Oxygen Sensors; Ka-Band Autonomous Formation Flying Sensor; CMOS VLSI Active-Pixel Sensor for Tracking; Lightweight, Self-Deploying Foam Antenna Structures; Electrically Small Microstrip Quarter-Wave Monopole Antennas; A 2-to-28-MHz Phase-Locked Loop; Portable Electromyograph; Open-Source Software for Modeling of Nanoelectronic Devices; Software for Generating Strip Maps from SAR Data; Calibration Software for use with Jurassicprok; Software for Probabilistic Risk Reduction; Software Processes SAR Motion-Measurement Data; Improved Method of Purifying Carbon Nanotubes; Patterned Growth of Carbon Nanotubes or Nanofibers; Lightweight, Rack-Mountable Composite Cold Plate/Shelves; SiC-Based Miniature High-Temperature Cantilever Anemometer; Inlet Housing for a Partial-Admission Turbine; Lightweight Thermoformed Structural Components and Optics; Growing High-Quality InAs Quantum Dots for Infrared Lasers; Selected Papers on Protoplanetary Disks; Module for Oxygenating Water without Generating Bubbles; Coastal Research Imaging Spectrometer; Rapid Switching and Modulation by use of Coupled VCSELs; Laser-Induced-Fluorescence Photogrammetry and Videogrammetry; Laboratory Apparatus Generates Dual-Species Cold Atomic Beam; Laser Ablation of Materials for Propulsion of Spacecraft; Small Active Radiation Monitor; Hybrid Image-Plane/Stereo Manipulation; Partitioning a Gridded Rectangle into Smaller Rectangles; Digital Radar-Signal Processors Implemented in FPGAs; Part 1 of a Computational Study of a Drop-Laden Mixing Layer; and Some Improvements in Signal-Conditioning Circuits.

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NASA NTRS2005

Re-Configurable Electronics Characterization under Extreme Thermal Environment

The need for reconfigurable electronics is driven by requirements to survive longer missions and harsher environments. It is possible to compensate for degradations in Extreme Environments (EE). EE has effect on electronics: circuits are designed to exploit device characteristics and when a certain temperature or radiation range is exceeded the circuit function gradually degrades. It is possible to employ Hardening by reconfiguration (HBR) to mitigate drifts, degradation, or damage on electronic devices in EE by using reconfigurable devices and an adaptive self-reconfiguration of circuit topology. In this manner degraded components can be salvaged, and completely damaged components can be bypassed. The challenge of conventional design is replaced with that of designing a recover process that automatically performs the (re) design in place of the designer. The objective of testing a Digital Signal Processor (DSP) under the extreme temperatures was to determine the lowest temperature at which the DAP can operate. The objective of testing a Xilinx VirtexII Pro FPGA board was to initially find our whether the evaluation board and the FPGA would survive and continue at temperature ranges from -180 C, and 120 C. The Virtex II functioned correctly at the temperatures tested. The next test was done on the GM-C filter building block using the same temperature range as the Virtex II. The current lower and upper limits were shown to be reduced as the temperature gets lower. The device function can be recovered by increasing the Vb from .08V to .85V. The negative and positive saturation voltages increases as the temperature gets higher. The function of the device can be recovered by decreasing the Vb from .8V to around .75V. The next test was performed to test the recovery of the GmC low pass filter through Vb in a filter circuit. The test indicate that bias voltage control adjustment is an efficient mechanism for circuit recovery at extreme temperatures.

reliability↗
NASA NTRS1989

Long period pseudo random number sequence generator

A circuit for generating a sequence of pseudo random numbers, (A sub K). There is an exponentiator in GF(2 sup m) for the normal basis representation of elements in a finite field GF(2 sup m) each represented by m binary digits and having two inputs and an output from which the sequence (A sub K). Of pseudo random numbers is taken. One of the two inputs is connected to receive the outputs (E sub K) of maximal length shift register of n stages. There is a switch having a pair of inputs and an output. The switch outputs is connected to the other of the two inputs of the exponentiator. One of the switch inputs is connected for initially receiving a primitive element (A sub O) in GF(2 sup m). Finally, there is a delay circuit having an input and an output. The delay circuit output is connected to the other of the switch inputs and the delay circuit input is connected to the output of the exponentiator. Whereby after the exponentiator initially receives the primitive element (A sub O) in GF(2 sup m) through the switch, the switch can be switched to cause the exponentiator to receive as its input a delayed output A(K-1) from the exponentiator thereby generating (A sub K) continuously at the output of the exponentiator. The exponentiator in GF(2 sup m) is novel and comprises a cyclic-shift circuit; a Massey-Omura multiplier; and, a control logic circuit all operably connected together to perform the function U(sub i) = 92(sup i) (for n(sub i) = 1 or 1 (for n(subi) = 0).

Wang, Charles C.↗
NASA NTRS1977

Time-division multiplexer uses digital gates

Device eliminates errors caused by analog gates in multiplexing a large number of channels at high frequency. System was designed for use in aerospace work to multiplex signals for monitoring such variables as fuel consumption, pressure, temperature, strain, and stress. Circuit may be useful in monitoring variables in process control and medicine as well.

Myers, C. E.↗
NASA NTRS1988

Data Transport Subsystem - The SFOC glue

The design and operation of the Data Transport Subsystem (DTS) for the JPL Space Flight Operation Center (SFOC) are described. The SFOC is the ground data system under development to serve interplanetary space probes; in addition to the DTS, it comprises a ground interface facility, a telemetry-input subsystem, data monitor and display facilities, and a digital TV system. DTS links the other subsystems via an ISO OSI presentation layer and an LAN. Here, particular attention is given to the DTS services and service modes (virtual circuit, datagram, and broadcast), the DTS software architecture, the logical-name server, the role of the integrated AI library, and SFOC as a distributed system.

Parr, Stephen J.↗
NASA NTRS1995

MQW Optical Feedback Modulators And Phase Shifters

Laser diodes equipped with proposed multiple-quantum-well (MQW) optical feedback modulators prove useful in variety of analog and digital optical-communication applications, including fiber-optic signal-distribution networks and high-speed, low-crosstalk interconnections among super computers or very-high-speed integrated circuits. Development exploits accompanying electro-optical aspect of QCSE - variation in index of refraction with applied electric field. Also exploits sensitivity of laser diodes to optical feedback. Approach is reverse of prior approach.

Jackson, Deborah J.↗
NASA NTRS1995

Solid-state image sensor with focal-plane digital photon-counting pixel array

A photosensitive layer such as a-Si for a UV/visible wavelength band is provided for low light level imaging with at least a separate CMOS amplifier directly connected to each PIN photodetector diode to provide a focal-plane array of NxN pixels, and preferably a separate photon-counting CMOS circuit directly connected to each CMOS amplifier, although one row of counters may be time shared for reading out the photon flux rate of each diode in the array, together with a buffer memory for storing all rows of the NxN image frame before transfer to suitable storage. All CMOS circuitry is preferably fabricated in the same silicon layer as the PIN photodetector diode for a monolithic structure, but when the wavelength band of interest requires photosensitive material different from silicon, the focal-plane array may be fabricated separately on a different semiconductor layer bump-bonded or otherwise bonded for a virtually monolithic structure with one free terminal of each diode directly connected to the input terminal of its CMOS amplifier and digital counter for integration of the photon flux rate at each photodetector of the array.

Fossum, Eric R.↗
NASA NTRS1991

NASA Space Engineering Research Center for VLSI systems design

This annual review reports the center's activities and findings on very large scale integration (VLSI) systems design for 1990, including project status, financial support, publications, the NASA Space Engineering Research Center (SERC) Symposium on VLSI Design, research results, and outreach programs. Processor chips completed or under development are listed. Research results summarized include a design technique to harden complementary metal oxide semiconductors (CMOS) memory circuits against single event upset (SEU); improved circuit design procedures; and advances in computer aided design (CAD), communications, computer architectures, and reliability design. Also described is a high school teacher program that exposes teachers to the fundamentals of digital logic design.

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NASA NTRS2009

Multi-Modulator for Bandwidth-Efficient Communication

A modulator circuit board has recently been developed to be used in conjunction with a vector modulator to generate any of a large number of modulations for bandwidth-efficient radio transmission of digital data signals at rates than can exceed 100 Mb/s. The modulations include quadrature phaseshift keying (QPSK), offset quadrature phase-shift keying (OQPSK), Gaussian minimum-shift keying (GMSK), and octonary phase-shift keying (8PSK) with square-root raised-cosine pulse shaping. The figure is a greatly simplified block diagram showing the relationship between the modulator board and the rest of the transmitter. The role of the modulator board is to encode the incoming data stream and to shape the resulting pulses, which are fed as inputs to the vector modulator. The combination of encoding and pulse shaping in a given application is chosen to maximize the bandwidth efficiency. The modulator board includes gallium arsenide serial-to-parallel converters at its input end. A complementary metal oxide/semiconductor (CMOS) field-programmable gate array (FPGA) performs the coding and modulation computations and utilizes parallel processing in doing so. The results of the parallel computation are combined and converted to pulse waveforms by use of gallium arsenide parallel-to-serial converters integrated with digital-to-analog converters. Without changing the hardware, one can configure the modulator to produce any of the designed combinations of coding and modulation by loading the appropriate bit configuration file into the FPGA.

Gray, Andrew↗
NASA NTRS2014

The Magnetospheric Multiscale Magnetometers

The success of the Magnetospheric Multiscale mission depends on the accurate measurement of the magnetic field on all four spacecraft. To ensure this success, two independently designed and built fluxgate magnetometers were developed, avoiding single-point failures. The magnetometers were dubbed the digital fluxgate (DFG), which uses an ASIC implementation and was supplied by the Space Research Institute of the Austrian Academy of Sciences and the analogue magnetometer (AFG) with a more traditional circuit board design supplied by the University of California, Los Angeles. A stringent magnetic cleanliness program was executed under the supervision of the Johns Hopkins University,s Applied Physics Laboratory. To achieve mission objectives, the calibration determined on the ground will be refined in space to ensure all eight magnetometers are precisely inter-calibrated. Near real-time data plays a key role in the transmission of high-resolution observations stored onboard so rapid processing of the low-resolution data is required. This article describes these instruments, the magnetic cleanliness program, and the instrument pre-launch calibrations, the planned in-flight calibration program, and the information flow that provides the data on the rapid time scale needed for mission success.

Magnetosphere↗
NASA NTRS2010

Electrically Variable Resistive Memory Devices

Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.

Liu, Shangqing↗
NASA NTRS1970

Pulse-rate averaging circuit

Averaging circuit provides a secondary control signal during inoperative periods of an intermittent primary control system. It can also provide an average pulse rate over a fixed time interval, such as in a digital frequency meter.

Jessee, R. D.↗