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At least 757 records · Page 42

Performance of the CMS high-level trigger during LHC Run 2

The CERN LHC provided proton and heavy ion collisions during its Run 2 operation period from 2015 to 2018. Proton-proton collisions reached a peak instantaneous luminosity of 2.1 $\times$ 10$^{34}$ cm$^{-2}$s$^{-1}$, twice the initial design value, at $\sqrt{s}$ = 13 TeV. The CMS experiment records a subset of the collisions for further processing as part of its online selection of data for physics analyses, using a two-level trigger system: the Level-1 trigger, implemented in custom-designed electronics, and the high-level trigger, a streamlined version of the offline reconstruction software running on a large computer farm. This paper presents the performance of the CMS high-level trigger system during LHC Run 2 for physics objects, such as leptons, jets, and missing transverse momentum, which meet the broad needs of the CMS physics program and the challenge of the evolving LHC and detector conditions. Sophisticated algorithms that were originally used in offline reconstruction were deployed online. Highlights include a machine-learning b tagging algorithm and a reconstruction algorithm for tau leptons that decay hadronically.

high energy physics↗

Cielo Computational Environment Usage Model: With Mappings to ACE Requirements for the General Availability User Environment Capabilities (Release V.1.1)

Cielo is a massively parallel supercomputer funded by the DOE/NNSA Advanced Simulation and Computing (ASC) program, and operated by the Alliance for Computing at Extreme Scale (ACES), a partnership between Los Alamos National Laboratory (LANL) and Sandia National Laboratories (SNL). The primary Cielo compute platform is physically located at Los Alamos National Laboratory. This Cielo Computational Environment Usage Model documents the capabilities and the environment to be provided for the Q1 FY12 Level 2 Cielo Capability Computing (CCC) Platform Production Readiness Milestone. This document describes specific capabilities, tools, and procedures to support both local and remote users. The model is focused on the needs of the ASC user working in the secure computing environments at Lawrence Livermore National Laboratory (LLNL), Los Alamos National Laboratory, or Sandia National Laboratories, but also addresses the needs of users working in the unclassified environment. The Cielo Computational Environment Usage Model maps the provided capabilities to the tri-Lab ASC Computing Environment (ACE) Version 8.0 requirements. The ACE requirements reflect the high performance computing requirements for the Production Readiness Milestone user environment capabilities of the ASC community. A description of ACE requirements met, and those requirements that are not met, are included in each section of this document. The Cielo Computing Environment, along with the ACE mappings, has been issued and reviewed throughout the tri-Lab community.

97 MATHEMATICS AND COMPUTING↗

Stand-Alone Dynamic System Simulation of a Fissile Solution System

Dynamic system simulations (DSS) of fissile solution systems (FSS) have been performed at Los Alamos National Laboratory (LANL) for several years. DSS have been designed and executed using the DESIRE (Direct Executing Simulation in Real Time) system, a platform ideal for expert system modelers, as it allows for direct mathematical specification of a model, and facilities for performing experiments and analyses with the model. Models built in DESIRE have been compared to historical data from several historic aqueous homogeneous reactors (AHR) showing close agreement between experimental data and model estimates. Historical systems modeled include: SUPO (Super Power), an AHR that operated at Los Alamos National Laboratory from 1951 to 1974; SILENE, which was operated by CEA at Valduc, France until 2011; KEWB (Kinetics Experiment Water Boiler) A-2 and B-5 cores, operated by North American Atomics during the 1960’s and 1970’s. SUPO is considered a benchmark for steady-state operations, SILENE for pulse, and KEWB as confirmatory for both modes. However, there are some simulation tasks that are not well-suited to DESIRE model implementation. These tasks include engineering design and analysis and providing a hardware simulator backend. It has been determined that executable simulation models would better suit these purposes, hence a process for converting DESIRE simulation models to executable simulation models was designed and implemented, and several models have been converted. DESIRE simulation models are converted to C++ executable models by an automated process. The conversion process is quick, accurate and repeatable, giving confidence that converted models will perform as well as the original DESIRE models. Extensive testing on the SUPO and accelerator driven subcritical system models has shown that the executable models perform almost identically to the DESIRE models. All major trends and events are simulated with excellent agreement and the steady-state results typically agree within a small fraction of a percent (always better than 0.1% and generally better than 0.01% agreement).

21 SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLANTS↗

Preliminary Plan to Inform Testing of a Heat Exchanger Test Article

This report presents a preliminary plan to guide the qualification testing of advanced heat exchanger (HX) components for nuclear-to-industrial heat transfer applications. The objective is to establish a defensible, physics-based methodology that integrates computational modeling, targeted experimentation, and in-service inspection considerations to demonstrate component performance and reliability under representative reactor conditions. The analysis identifies Sodium-cooled Fast Reactor (SFR) and High-Temperature Gas-cooled Reactor (HTGR) systems as reference configurations in terms of temperature, pressure, and chemical environment. Within these operating envelopes, dominant degradation mechanisms— including creep–fatigue interaction, flow-induced vibration, corrosion, and diffusion-bond deterioration—were evaluated to define test requirements. A comprehensive computationalexperimental framework is proposed to support life prediction and qualification activities. The framework couples high-fidelity structural-mechanics, thermal-hydraulic, and fluid-structure interaction models with accelerated degradation testing to produce a traceable linkage between microstructural evolution, mechanical performance, and remaining useful life (RUL). The approach adheres to established Verification, Validation, and Uncertainty Quantification (VVUQ) standards (ASME V&V 10/20; NUREG-2152) and incorporates a digital-twin architecture for continuous model refinement through data assimilation. The plan further outlines testing methodologies, including pre-test analyses, test-loop design parameters, and sensor placement strategies that maximize information yield while maintaining mechanistic fidelity. Complementary sections describe in-service inspection (ISI), on-line monitoring (OLM), and structural-health-monitoring (SHM) techniques applicable to compact HX geometries typical of advanced reactors. Collectively, these activities establish the technical foundation for demonstrating 40-60-year equivalent service life of advanced heat exchangers in support of the U.S. Department of Energy’s Advanced Reactor and Integrated Energy Systems programs. The forthcoming phase will execute the defined pre-test analyses, initiate hardware fabrication, and implement the integrated testing campaign to validate the proposed qualification methodology.

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

Exact block encoding of imaginary time evolution with universal quantum neural networks

We develop a constructive approach to generate quantum neural networks capable of representing the exact thermal states of all many-body qubit Hamiltonians. The Trotter expansion of the imaginary time propagator is implemented through an exact block encoding by means of a unitary, restricted Boltzmann machine architecture. Marginalization over the hidden-layer neurons (auxiliary qubits) creates the nonunitary action on the visible layer. Then, we introduce a unitary deep Boltzmann machine architecture in which the hidden-layer qubits are allowed to couple laterally to other hidden qubits. We prove that this wave-function is closed under the action of the imaginary time propagator and, more generally, can represent the action of a universal set of quantum gate operations. We provide analytic expressions for the coefficients for both architectures, thus enabling exact network representations of thermal states without stochastic optimization of the network parameters. In the limit of large imaginary time, the yields the ground state of the system. The number of qubits grows linearly with the number of interactions and total imaginary time for a fixed interaction order. Both networks can be readily implemented on quantum hardware via midcircuit measurements of auxiliary qubits. If only one auxiliary qubit is measured and reset, the circuit depth scales linearly with imaginary time and number of interactions, while the width is constant. Alternatively, one can employ a number of auxiliary qubits linearly proportional to the number of interactions, and circuit depth grows linearly with imaginary time only. Every midcircuit measurement has a postselection success probability, and the overall success probability is equal to the product of the probabilities of the midcircuit measurements.

97 MATHEMATICS AND COMPUTING↗

Promise of Graph Sparsification and Decomposition for Noise Reduction in QAOA: Analysis for Trapped-Ion Compilations

We develop new approximate compilation schemes that significantly reduce the expense of compiling the Quantum Approximate Optimization Algorithm (QAOA) for solving the Max-Cut problem. Our main focus is on compilation with trapped-ion simulators using Pauli-X operations and all-to-all Ising Hamiltonian HIsing evolution generated by Molmer-Sorensen or optical dipole force interactions, though some of our results also apply to standard gate-based compilations. Our results are based on principles of graph sparsification and decomposition; the former reduces the number of edges in a graph while maintaining its cut structure, while the latter breaks a weighted graph into a small number of unweighted graphs. Though these techniques have been used as heuristics in various hybrid quantum algorithms, there have been no guarantees on their performance, to the best of our knowledge. This work provides the first provable guarantees using sparsification and decomposition to improve quantum noise resilience and reduce quantum circuit complexity. For quantum hardware that uses edge-by-edge QAOA compilations, sparsification leads to a direct reduction in circuit complexity. For trapped-ion quantum simulators implementing all-to-all HIsing pulses, we show that for a (1−ϵ) factor loss in the Max-Cut approximation (ϵ>0), our compilations improve the (worst-case) number of HIsing pulses from O(n2) to O(nlog(n/ϵ)) and the (worst-case) number of Pauli-X bit flips from O(n2) to O(nlog(n/ϵ)ϵ2) for n-node graphs. This is an asymptotic improvement for any constant ϵ>0. We demonstrate that significant improvements to the approximation ratio are obtained using decomposition in simulated trapped-ion experiments with dephasing noise. We further present a generic argument showing that sparsification results in an exponentially improved circuit fidelity lower bound in digital computing schemes based on one- and two-qubit gates, which are relevant to a wide variety of hardwares such as superconducting qubits and certain neutral atom or trapped ion setups, and more sophisticated noise models. We anticipate these approximate compilation techniques will be useful tools in a variety of future quantum computing experiments.

Moondra, Jai [Georgia Institute of Technology]↗

Simulink/PARS Integration Support

The state of the art for signal processor hardware has far out-paced the development tools for placing applications on that hardware. In addition, signal processors are available in a variety of architectures, each uniquely capable of handling specific types of signal processing efficiently. With these processors becoming smaller and demanding less power, it has become possible to group multiple processors, a heterogeneous set of processors, into single systems. Different portions of the desired problem set can be assigned to different processor types as appropriate. As software development tools do not keep pace with these processors, especially when multiple processors of different types are used, a method is needed to enable software code portability among multiple processors and multiple types of processors along with their respective software environments. Sundance DSP, Inc. has developed a software toolkit called “PARS”, whose objective is to provide a framework that uses suites of tools provided by different vendors, along with modeling tools and a real time operating system, to build an application that spans different processor types. The software language used to express the behavior of the system is a very high level modeling language, “Simulink”, a MathWorks product. ORNL has used this toolkit to effectively implement several deliverables. This CRADA describes this collaboration between ORNL and Sundance DSP, Inc.

97 MATHEMATICS AND COMPUTING↗

Batched Sparse Linear Algebra (Final Report for Subcontract B648960)

This report finalizes design specifications for developing batched kernels for small tensor operations for unassembled matrix-free iterative solvers, batched solvers for partially assembled operators, and batched solvers with support for various sparse formats. The outcome of the project milestones is a set of interfaces to Batched Sparse LA solvers running on hardware accelerators for use in ECP Libraries and Applications. It is part of the development of sparse batched kernels, solvers/preconditioners as well as creating interoperability in xSDK libraries with sparse and dense batched functions to benefit ECP applications. The participants included representatives from ECP libraries (not limited to the xSDK project), applications, and vendors (AMD, Intel, and NVIDIA). Batched sparse linear algebra solvers form the new frontier for algorithmic development and performance engineering. Many applications (ECP and non-ECP alike) require simultaneous solutions of small linear systems of equations that are structurally sparse. To move towards high hardware utilization, it is important to provide these applications with appropriate interfaces to efficient batched sparse solvers running on modern hardware accelerators. We present interface designs in use by HPC software libraries supporting batched sparse linear algebra and the development of sparse batched kernel codes for solvers and preconditioners. We also address the potential interoperability opportunities to keep the software portable between the major hardware accelerators from AMD, Intel, and NVIDIA. The presented interface specifications includes batched band, sparse iterative, and sparse direct solvers. This report summarizes progress in Kokkos Kernels and the xSDK libraries MAGMA, Ginkgo, hypre, SUNDIALS, and SuperLU_dist.

97 MATHEMATICS AND COMPUTING↗

Matrix-free preconditioning for high-order H (curl) discretizations

The greater arithmetic intensity of high-order finite element discretizations makes them attractive for implementation on next-generation hardware, but assembly of high-order finite element operators as matrices is prohibitively expensive. As a result, the development of general algebraic solvers for such operators has been an open research challenge. Fast matrix-free application of high-order operators has received significant attention in the literature in the context of Poisson-type problems, but preconditioners and solvers for inverting more general operators are not very well-developed. In this paper, we consider the problem of preconditioning a definite Maxwell operator at high polynomial order without assembling a matrix. We show that given efficient preconditioners for high-order H 1 finite element problems on the same mesh, efficient H(curl) preconditioners can be constructed in an auxiliary space framework. We demonstrate the resulting preconditioners in a practical setting with tensor-product basis functions on an unstructured mesh of quadrilaterals. Overall, our approach uses a sparsified H 1 solver constructed on a low-order mesh of the nodal points of the underlying high-order space, and we show that the resulting H(curl) preconditioner is effective at very high polynomial orders for two-dimensional model problems with complicated geometry, varying piecewise constant coefficients, and curved elements. The resulting preconditioner scales with nearly optimal O(p d+1 ) floating point operation count and optimal O(p d ) memory transfer requirements, outperforming existing Maxwell preconditioners in the high-order regime.

97 MATHEMATICS AND COMPUTING↗

Schrödinger cat states of a nuclear spin qudit in silicon

High-dimensional quantum systems are a valuable resource for quantum information processing. They can be used to encode error-correctable logical qubits, which has been demonstrated using continuous-variable states in microwave cavities or the motional modes of trapped ions. For example, high-dimensional systems can be used to realize ‘Schrödinger cat’ states, which are superpositions of widely displaced coherent states that can be used to illustrate quantum effects at large scales. Recent proposals have suggested encoding qubits in high-spin atomic nuclei, which are finite-dimensional systems that can host hardware-efficient versions of continuous-variable codes. Here, in this study, we demonstrate the creation and manipulation of Schrödinger cat states using the spin-7/2 nucleus of an antimony atom embedded in a silicon nanoelectronic device. We use a multi-frequency control scheme to produce spin rotations that preserve the symmetry of the qudit, and we constitute logical Pauli operations for qubits encoded in the Schrödinger cat states. Our work demonstrates the ability to prepare and control non-classical resource states, which is a prerequisite for applications in quantum information processing and quantum error correction, using our scalable, manufacturable semiconductor platform.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Aspen-based performance and energy modeling frameworks

Now with the anticipation of exascale architectures, energy consumption is becoming one of the critical design parameters, especially in light of the energy budget of 20-30 Megawatts set by the U.S. Department of Energy. Understanding an application’s execution pattern and its energy footprint is critical to improving application operation on a diverse heterogeneous architecture. Applying application-specific performance optimization can consequently improve energy consumption. However, this approach is only applicable to current systems. As we enter a new era of exascale architectures that is projected to contain more complex memory hierarchies, increased levels of parallelism, heterogeneity in hardware, and complex programming models and techniques, energy and performance management is getting more cumbersome. We therefore propose techniques that predict the energy consumption beforehand or at runtime to enable proactive tuning. Such energy prediction approaches must be generic and adapt themselves at runtime to changing application and hardware configurations. Most existing energy estimation and prediction approaches are empirical in nature and thus tied to current systems. To overcome this limitation, we propose two energy estimation techniques: ACEE (Algorithmic and Categorical Energy Estimation), which uses a combination of analytical and empirical modeling techniques; and AEEM (Aspen’s Embedded Energy Estimation), a system-level analytical energy estimation technique. Both of these models incorporate the Aspen domain specific language for performance modeling. We present the methodologies of these two models and test their accuracy using five proxy applications. We also describe three use cases.

79 ASTRONOMY AND ASTROPHYSICS↗

Development of Thermoacoustic Sensors for Sodium-cooled Fast Reactors

This Final Report refers to the project “Development of Thermoacoustic Sensors for Sodium-cooled Fast Reactor Systems”, which was led by Westinghouse Electric Company (Westinghouse) and carried out in collaboration with Argonne National Laboratory (ANL) and University of Pittsburgh. Thermo-acoustic Power Sensors (TAPS) are self-powered, wireless sensors envisioned for measuring key parameters, such as local temperature and neutron flux, in a nuclear reactor core. This project was intended to specifically investigate their applicability to Sodium-cooled Fast Reactors (SFR). TAPS are non-invasive (wireless) and passive (self-powered) devices. The passivity derives from their ability to use conditions that “naturally” exist in a nuclear reactor, such as gamma and neutron flux, as power sources. They generate oscillating pressure waves (i.e., sound waves) which, with a frequency and amplitude dependent upon these conditions, can travel through the core and associated structures, and reach the outside of the reactor vessel where a properly designed network of receivers can detect and interpret them. These receivers require a very small amount of power which, during loss of power events, can be provided for example by harvesting gamma radiation energy, thus resulting in a monitoring system that can function both during normal operation and during loss of power events. The project aimed at TAPS development through a series of tasks which are listed and briefly discussed as follows. TASK 1 – Sensor hardware design Subtask 1a: Assessment of sensor applications to SFRs Subtask 1b: Development of sensor functional requirements Subtask 1c: Definition of sensor hardware design specifications Task description: TAPS design was informed by considerations on their application (Subtask 1a), both the ultimate one in an SFR and the actual one in the ANL testing facilities that was intended to be used in support of the project. Considerations were made to identify optimum sensor design features that optimize the sensor size, materials, and output signal, for installation inside an SFR core. These considerations led to the development of Functional Requirements (Subtask 1b) and Design Requirements (Subtask 1c). TASK 2 – Sensor Hardware Manufacture Subtask 2a: Sensor hardware construction drawing development Subtask 2b: Sensor manufacture and assembly Task description: TAPS technical drawings were developed (Subtask 2a) using the Design Requirements established under Task 1. Subsequently, in spite of some problems which ultimately caused the program to be delayed, TAPS manufacturing was completed based on drawings (Subtask 2b). TASK 3 – Development of TAPS Signal Measurement System and TAPS Testing in Water Subtask 3a: Design, assembly and testing of signal measurement system, and TAPS testing in water Subtask 3b: Signal prediction-correction methodology development Task description: An assessment was performed on the techniques that can potentially be used to detect the signals emitted by the TAPS, e.g. a fiber-optic based acoustic signal measurement system, a laser vibrometer system, or an accelerometer-based system. The most suited technology, i.e. the accelerometer-based system, was developed further, and tested in water (Subtask 3a). Moreover, efforts were made to develop the methodology required to determine the actual system temperature and neutron flux distribution using differences between the measured and predicted TAPS responses (Subtask 3b). TASK 4 – Sensor System Testing in Sodium Subtask 4a: Test plan development Subtask 4b: Design, assembly and testing in small-scale sodium facility Subtask 4c: Design, assembly and testing in large-scale sodium and structures facility Task description: Upon proper test plan development (Subtask 4a), the fabricated TAPS was planned to be tested in sodium, by using two sodium facilities at ANL having different size and different purpose. The Under Sodium Viewing (USV) small-scale facility was intended to be used to investigate the effect of sodium on the sensor and its performance (Subtask 4b). The Mechanism Engineering Test Loop (METL) large-scale facility was instead intended to be used to assess the additional effect of prototypical SFR structures, such as fuel assembly mockup or parts of the core restrain structure, on sensor performance (Subtask 4c). As discussed in Section 3.2.2.7, unexpected issues during the TAPS manufacturing process resulted in some activities being delayed, with the TAPS and USV facility developed to the point to be ready for testing in sodium, however without the possibility to actually perform such testing (including the testing in METL) due to the end of the program’s performance period. Overall, through the development and testing (in water only) of two TAPS devices (a First-Generation TAPS followed by an optimized Second-Generation TAPS), the project confirmed the capability of this technology to generate acoustic signals proportional to temperature, which can be detected through a network of accelerometers identified as the best-suited type of receivers for acoustic signal detection. Moreover, the project also developed a computational model to predict the characteristics of the acoustic signals being generated, which combines thermal analysis of the TAPS with Finite Element Modeling (FEM)-aided acoustic characterization of the system. This model was benchmarked against experimental data collected during the project and, although general agreement was obtained, some limitations of the modeling methods were identified, which require additional development. Additional testing is needed in order to assess the effect, on TAPS operation and performance, of environmental changes resulting from the transition from water to liquid sodium. Such testing, which is suggested to be performed in the future, should look specifically at 1) both the effect resulting from the different thermoacoustic behavior of sodium (relative to water) and the effects of higher temperature on TAPS performance, and 2) the performance of the sensor-receiver system when multiple TAPS are used simultaneously and prototypical reactor structures are positioned in the testing environment. The latter testing is needed to assess the effects that potential signal attenuation/ distortion phenomena, as well as potential interference between signals emitted simultaneously, have on the performance of the technology for ultimate application in a nuclear reactor.

21 SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLANTS↗

AREVA NP's industrial CFD single-phase methodology and applications for nuclear fuel

During the course of the last decade, AREVA NP has developed Computational Fluid Dynamics (CFD) methods capable of accurately predicting flow fields and thermal mixing within fuel bundles, as well as pressure losses and hydrodynamic forces on fuel assembly components such as spacer grids, lower and upper nozzles. The present work summarizes the evolution of AREVA NP's single-phase CFD methodology and the extensive validation efforts, with focus on improving confidence level in CFD results. Currently, it is possible to produce models for large sections of a fuel assembly and produce CFD simulation results with an uncertainty proven to be similar to the corresponding measurement uncertainty. Extensive validation has been conducted against in-house data obtained for a wide range of geometries representative of actual hardware, in multiple test facilities, with various measurement techniques. In addition to in-house validation data, AREVA NP has also exercised its best-practices against international benchmarks; blind test results were in very good agreement with the data. The current high level of confidence in single-phase CFD predictions allows investigating a wide variety of physics in Pressurized Water Reactor (PWR) as well as Boiling Water Reactor (BWR) fuel assemblies. CFD is used as a design and optimization tool as well as a supplement to regular testing to improve the quality of tests and optimize hardware design features for specific targets. CFD played a major role in the design of AREVA NP's latest fuel assembly designs (ATRIUM{sup TM1} 11 and GAIA). In this paper we first illustrate AREVA NP's comprehensive validation database for single-phase CFD (pressure drop, flow field), then provide several examples of applications: virtual testing for parts optimization and support of core operation. (authors)

11 NUCLEAR FUEL CYCLE AND FUEL MATERIALS↗

Deep learning model to detect various synchrophasor data anomalies

High-density synchrophasors provide valuable information for power grid situational awareness, operation and control. Unfortunately, due to factors including communication instability and hardware failure, their data quality can be greatly deteriorated by anomalies. Since the anomalies can impact the performance of the synchrophasor applications, it is of paramount significance to propose a model to detect anomalies in synchrophasor. In this study, a convolutional neural network model is established to detect and classify the anomalies in the synchrophasor measurements. Additionally, four types of anomalies observed in actual synchrophasors including erroneous patterns, random spikes, missing points and high-frequency interferences are considered in this study. The proposed model is extensively evaluated via field-collected measurements from the synchrophasor network in Jiangsu grid, China. The superior performance of the proposed model indicates the great potential of using deep learning for the detection of abnormal synchrophasor measurements.

42 ENGINEERING↗

Qubit Assignment Using Time Reversal

As quantum computers with large numbers of qubits become increasingly available, experiments executed on a given device may not utilize all available qubits. In this case, the outcome of executing a quantum program will depend on the ability to efficiently select a subset of high-performing physical qubits. For any given quantum program and device there are many ways to assign physical qubits for execution of the program, and assignments will differ in performance due to the variability in quality across qubits and entangling operations on a single device. Evaluating the performance of each assignment using fidelity estimation introduces significant experimental overhead and will be infeasible for many applications, while relying on standard device benchmarks provides incomplete information about the performance of any specific program. Furthermore, the number of possible assignments grows combinatorially in the number of qubits on the device and in the program, motivating the use of heuristic optimization techniques. We demonstrate a practical solution to the problem of qubit assignment by using simulated annealing with a cost function based on the Loschmidt echo, a diagnostic that measures the reversibility of a quantum process. We provide theoretical justification for this choice of cost function by demonstrating that the optimal qubit assignment coincides with the optimal qubit assignment based on state fidelity in the weak error limit, and we provide experimental justification using diagnostics performed on Google’s superconducting qubit devices. We then establish the performance of simulated annealing for qubit assignment using classical simulations of noisy devices as well as optimization experiments performed on a quantum processor. Our results demonstrate that the use of Loschmidt echoes and simulated annealing provides a scalable and flexible approach to optimizing qubit assignment on near-term hardware.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Resilience of the surface code to error bursts

Quantum error correction works effectively only if the error rate of gate operations is sufficiently low. However, some rare physical mechanisms can cause a temporary increase in the error rate that affects many qubits; examples include ionizing radiation in superconducting hardware and large deviations in the global control of atomic systems. We refer to such rare transient spikes in the gate error rate as error bursts. In this work, we investigate the resilience of the rotated surface code to generic error bursts. We assume that, after appropriate mitigation strategies, the spike in the error rate lasts for only a single syndrome-extraction cycle; we also assume that the enhanced error rate is uniform across the code block. Under these assumptions, and for a circuit-level depolarizing noise model, we perform Monte Carlo simulations to determine the regime in burst error rate and background error rate for which the memory time becomes arbitrarily long as the code block size grows. Our results indicate that suitable hardware mitigation methods combined with standard decoding methods may suffice to protect against transient error bursts in the rotated surface code.

Quantum error correction↗

Classification of dynamical Lie algebras generated by spin interactions on undirected graphs

Dynamical Lie algebras (DLAs) are a versatile tool for various topics that span from the expressibility-trainability of variational quantum algorithms (VQAs), to simulation of many body Hamiltonians. Quantum gates and most of the Hamiltonians of interest consist of local interactions; therefore, the analysis of all possible DLAs generated by 1- and 2-local operators is crucial for quantum simulation and VQAs on current hardware. Previously in [R. Wiersema et al ., npj Quantum Inf. 10 , 110 (2024)], we analyzed the DLAs on linear, circular and all-to-all topologies, and obtained results about their dimensions and algebraic structure. Here, in this work, we extend our analysis into any possible hardware topology and provide a classification of all DLAs generated by Pauli strings on any undirected interaction graph. Our results indicate that the DLAs depend solely on whether the connectivity or interaction graph is bipartite or not. In addition, we find that the non-trivial polynomially scaling DLAs appear only on 1D line or circle topologies, and all other DLAs have dimensions scaling exponentially with the system size. Together with the current VQA literature, our results imply that either the majority of VQAs are non-trainable, or we are yet to understand the role of DLAs on the trainability of VQAs.

Algebraic structures↗

A Systems Engineering Analysis of National Ignition Facility Industrial Controls Systems and Safety Interlock Systems Remote Input/Output Networking Migration from ControlNet to EtherNet/IP

The ControlNet industrial communications protocol and modules used in the Industrial Control System (ICS) and Safety Interlock System (SIS) at the National Ignition Facility (NIF) are no longer necessary and the ICS and SIS would be better served by migrating the communications structure to use EtherNet/Industrial Protocol (IP) and EtherNet bridge modules instead. By the admission of the vendor of ControlNet hardware, Rockwell Automation, in literature by Bill Petro [1], “Moving forward, customers will be able to optimize their asset utilization better using EtherNet/IP protocol than with ControlNet.” The NIF is one of the key elements of the Inertial Confinement Fusion (ICF) program at Lawrence Livermore National Laboratory (LLNL), a federally funded research and development center (FFRDC). The NIF contains the systems and provides the operational capacity to perform ICF, high energy density (HED), and discovery science experiments utilizing 192 individual beamlines, a host of diagnostics, and all the industrial systems required to facilitate these beamlines and diagnostics. The industrial systems are governed by the ICS and SIS, with the ICS providing control and the SIS providing monitoring and permissives. Construction on the NIF began in 1997 and was certified complete in 2009 and, as a result, the ICS and SIS were developed during this time using the tools that were available then. This includes the communications structure and protocols for these systems, much of which was, and still is, ControlNet. ControlNet, particularly during the time that the ICS and SIS were being built, has several attractive features. ControlNet hardware is exclusive to Rockwell Automation, which was the automation hardware chosen for the ICS and SIS. One feature that could be considered an advantage or a disadvantage depending on the communication needs of the system is that ControlNet also utilizes no active network components, excluding repeaters which are not always necessary. According to the architect of the ICS system at the NIF, Gordon Lau, one of the most attractive features of the ControlNet protocol during development of the ICS and SIS was that it is deterministic, providing timing of data transfer that is executed exactly as it is defined by the developer.

42 ENGINEERING↗