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At least 757 records · Page 42

All sources NASA NTRS DOE OSTI

NASA NTRS2006

Functional Recovery of Analog Circuits at Extreme Temperatures

This paper describes a new reconfigurable analog array (RAA) architecture and integrated circuit (IC) used to map analog circuits that can adapt to extreme temperatures under programmable control. Algorithm-driven adaptation takes place on the RAA IC. The algorithms are implemented in a separate Field Programmable Gate Array (FPGA) IC, co-located with the RAA in the extreme temperature environment. The experiments demonstrate circuit adaptation over a wide temperature range, from extremely low temperature of -180 C to high 120 C.

self-recovery↗

NASA NTRS1994

Conductance measurement circuit with wide dynamic range

A conductance measurement circuit to measure conductance of a solution under test with an output voltage proportional to conductance over a 5-decade range, i.e., 0.01 uS to 1000 uS or from 0.1 uS to 10,000 uS. An increase in conductance indicates growth, or multiplication, of the bacteria in the test solution. Two circuits are used each for an alternate half-cycle time periods of an alternate squarewave in order to cause alternate and opposite currents to be applied to the test solution. The output of one of the two circuits may be scaled for a different range optimum switching frequency dependent upon the solution conductance and to enable uninterrupted measurement over the complete 5-decade range. This circuitry provides two overlapping ranges of conductance which can be read simultaneously without discontinuity thereby eliminating range switching within the basic circuitry. A VCO is used to automatically change the operating frequency according to the particular value of the conductance being measured, and comparators indicate which range is valid and also facilitate computer-controlled data acquisition. A multiplexer may be used to monitor any number of solutions under test continuously.

Mount, Bruce E.↗

NASA NTRS1991

DC isolation and protection system and circuit

A precision analog electronic circuit that is capable of sending accurate signals to an external device that has hostile electric characteristics, including the presence of very large common mode voltages. The circuit is also capable of surviving applications of normal mode overvoltages of up to 120 VAC/VDC for unlimited periods of time without damage or degradation. First, the circuit isolates the DC signal output from the computer. Means are then provided for amplifying the isolated DC signal. Further means are provided for stabilizing and protecting the isolating and amplifying means, and the isolated and amplified DC signal which is output to the external device, against overvoltages and overcurrents.

Wagner, Charles A.↗

NASA NTRS1999

Physically separating printed circuit boards with a resilient, conductive contact

A multi-board module provides high density electronic packaging in which multiple printed circuit boards are stacked. Electrical power, or signals, are conducted between the boards through a resilient contact. One end of the contact is located at a via in the lower circuit board and soldered to a pad near the via. The top surface of the contact rests against a via of the facing printed circuit board.

Baker, John D.↗

NASA NTRS2001

Starter circuit for an ion engine

A starter circuit particularly suitable for a plasma of an ion engine for a spacecraft includes a power supply having an output inductor with a tap. A switch is coupled to the tap. The switch has a control input. A pulse control logic circuit is coupled to said control input, said pulse control logic circuit controlling said switch to an off state to generate a high voltage discharge.

Cardwell, Jr., Gilbert I.↗

NASA NTRS2002

Starter circuit for an ion engine

Cardwell, Jr., Gilbert I.↗

NASA NTRS2004

Evolvable circuit with transistor-level reconfigurability

An evolvable circuit includes a plurality of reconfigurable switches, a plurality of transistors within a region of the circuit, the plurality of transistors having terminals, the plurality of transistors being coupled between a power source terminal and a power sink terminal so as to be capable of admitting power between the power source terminal and the power sink terminal, the plurality of transistors being coupled so that every transistor terminal to transistor terminal coupling within the region of the circuit comprises a reconfigurable switch.

Stoica, Adrian↗

NASA NTRS2004

Self-contained sub-millimeter wave rectifying antenna integrated circuit

The invention is embodied in a monolithic semiconductor integrated circuit in which is formed an antenna, such as a slot dipole antenna, connected across a rectifying diode. In the preferred embodiment, the antenna is tuned to received an electromagnetic wave of about 2500 GHz so that the device is on the order of a wavelength in size, or about 200 microns across and 30 microns thick. This size is ideal for mounting on a microdevice such as a microrobot for example. The antenna is endowed with high gain in the direction of the incident radiation by providing a quarter-wavelength (30 microns) thick resonant cavity below the antenna, the cavity being formed as part of the monolithic integrated circuit. Preferably, the integrated circuit consists of a thin gallium arsenide membrane overlying the resonant cavity and supporting an epitaxial Gallium Arsenide semiconductor layer. The rectifying diode is a Schottky diode formed in the GaAs semiconductor layer and having an area that is a very small fraction of the wavelength of the 2500 GHz incident radiation. The cavity provides high forward gain in the antenna and isolation from surrounding structure.

Siegel, Peter H.↗

NASA NTRS1983

At grade optical crossover for monolithic optial circuits

Planar optical circuits may be made to cross through each other, (thus eliminating extra steps required to fabricate elevated, nonintersecting crossovers) by control of the dimensions of the crossing light conductors (10, 12) to be significantly greater than d=0.89.lambda. and the angle of crossing as nearly 90.degree. as conveniently possible. A light trap may be provided just ahead of the intersection to trap any light being reflected in the source conductor at angles greater than about 45.degree.. The light trap may take the form of triangular shaped portions (16a, 16b) on each side of the source conductor with the far side of the triangular portion receiving incident light at an angle so that incident light will be reflected to the other side, or it may take the form of windows (18a, 18b) in place of the triangular portions. Planar optical circuit boards (21-23) may be fabricated and stacked to form a keyboard (20) with intersecting conductors (26-29) and keyholes (0-9) where conductors merge at the broad side of the circuit boards. These keyholes may be prearranged to form an array or matrix of keyholes.

Jamieson, Robert S.↗

NASA NTRS2006

Method of acquiring an image from an optical structure having pixels with dedicated readout circuits

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Fossum, Eric R.↗

NASA NTRS1990

High-speed dynamic domino circuit implemented with gaas mesfets

A dynamic logic circuit (AND or OR) utilizes one depletion-mode metal-semiconductor FET for precharging an internal node A, and a plurality of the same type of FETs in series, or a FET in parallel with one or more of the series connected FETs for implementing the logic function. A pair of FETs are connected to provide an output inverter with two series diodes for level shift. A coupling capacitor may be employed with a further FET to provide level shifting required between the inverter and the logic circuit output terminal. These circuits may be cascaded to form a domino chain.

Yang, Long↗

NASA NTRS2007

A Low-Complexity Circuit for On-Sensor Concurrent A/D Conversion and Compression

A low-complexity circuit for on-sensor compression is presented. The proposed circuit achieves complexity savings by combining a single-slope analog-to-digital converter with a Golomb-Rice entropy encoder and by implementing a low-complexity adaptation rule. The adaptation rule monitors the output codewords and minimizes their length by incrementing or decrementing the value of the Golomb-Rice coding parameter k. Its hardware implementation is one order of magnitude lower than existing adaptive algorithms. The compression circuit has been fabricated using a 0.35 micrometers CMOS technology and occupies an area of 0.0918 mm2. Test measurements confirm the validity of the design

Leon-Salas, Walter D.↗

NASA NTRS2008

Modifications to the Fission Surface Power Primary Test Circuit (FSP-PTC)

An actively pumped alkali metal flow circuit, designed and fabricated at the NASA Marshall Space Flight Center, underwent a range of tests at MSFC in early 2007. During this period, system transient responses and the performance of the liquid metal pump were evaluated. In May of 2007, the circuit was drained and cleaned to prepare for multiple modifications: the addition of larger upper and lower reservoirs, the installation of an annular linear induction pump (ALIP), and the inclusion of a closeable orifice in the test section. Modifications are now complete and testing has resumed. Performance of the ALIp, provided by Idaho National Laboratory (INL), is the subject of the first round ofexperimentation. This paper provides a summary of the tests conducted on the original circuit, details the physical changes that have since been made to it, and describes the current test program.

Garber, Anne E.↗

NASA NTRS2006

Temperature-adaptive Circuits on Reconfigurable Analog Arrays

This paper describes a new reconfigurable analog array (MA) architecture and integrated circuit (IC) used to map analog circuits that can adapt to extreme temperatures under programmable control. Algorithm-driven adaptation takes place on the RAA IC. The algorithms are implemented in a separate Field Programmable Gate Array (FPGA) IC, co-located with the RAA in the extreme temperature environment. The experiments demonstrate circuit adaptation over a wide temperature range, from extremely low temperature of -180 C to high 120 C.

self recovery↗

NASA NTRS2008

Programmable Low-Voltage Circuit Breaker and Tester

An instrumentation system that would comprise a remotely controllable and programmable low-voltage circuit breaker plus several electric-circuit-testing subsystems has been conceived, originally for use aboard a spacecraft during all phases of operation from pre-launch testing through launch, ascent, orbit, descent, and landing. The system could also be adapted to similar use aboard aircraft. In comparison with remotely controllable circuit breakers heretofore commercially available, this system would be smaller, less massive, and capable of performing more functions, as needed for aerospace applications.

Greenfield, Terry↗

NASA NTRS2009

Tool for Crimping Flexible Circuit Leads

A hand tool has been developed for crimping leads in flexible tails that are parts of some electronic circuits -- especially some sensor circuits. The tool is used to cut the tails to desired lengths and attach solder tabs to the leads. For tailoring small numbers of circuits for special applications, this hand tool is a less expensive alternative to a commercially available automated crimping tool. The crimping tool consists of an off-the-shelf hand crimping tool plus a specialized crimping insert designed specifically for the intended application.

Hulse, Aaron↗

NASA NTRS2009

Global Electric Circuit Implications of Total Current Measurements over Electrified Clouds

We determined total conduction (Wilson) currents and flash rates for 850 overflights of electrified clouds spanning regions including the Southeastern United States, the Western Atlantic Ocean, the Gulf of Mexico, Central America and adjacent oceans, Central Brazil, and the South Pacific. The overflights include storms over land and ocean, with and without lightning, and with positive and negative Wilson currents. We combined these individual storm overflight statistics with global diurnal lightning variation data from the Lightning Imaging Sensor (LIS) and Optical Transient Detector (OTD) to estimate the thunderstorm and electrified shower cloud contributions to the diurnal variation in the global electric circuit. The contributions to the global electric circuit from lightning producing clouds are estimated by taking the mean current per flash derived from the overflight data for land and ocean overflights and combining it with the global lightning rates (for land and ocean) and their diurnal variation derived from the LIS/OTD data. We estimate the contribution of non-lightning producing electrified clouds by assuming several different diurnal variations and total non-electrified storm counts to produce estimates of the total storm currents (lightning and non-lightning producing storms). The storm counts and diurnal variations are constrained so that the resultant total current diurnal variation equals the diurnal variation in the fair weather electric field (+/-15%). These assumptions, combined with the airborne and satellite data, suggest that the total mean current in the global electric circuit ranges from 2.0 to 2.7 kA, which is greater than estimates made by others using other methods.

Mach, Douglas M.↗

NASA NTRS2010

Cost Estimate for Molybdenum and Tantalum Refractory Metal Alloy Flow Circuit Concepts

The Early Flight Fission-Test Facilities (EFF-TF) team at NASA Marshall Space Flight Center (MSFC) has been tasked by the Naval Reactors Prime Contract Team (NRPCT) to provide a cost and delivery rough order of magnitude estimate for a refractory metal-based lithium (Li) flow circuit. The design is based on the stainless steel Li flow circuit that is currently being assembled for an NRPCT task underway at the EFF-TF. While geometrically the flow circuit is not representative of a final flight prototype, knowledge has been gained to quantify (time and cost) the materials, manufacturing, fabrication, assembly, and operations to produce a testable configuration. This Technical Memorandum (TM) also identifies the following key issues that need to be addressed by the fabrication process: Alloy selection and forming, cost and availability, welding, bending, machining, assembly, and instrumentation. Several candidate materials were identified by NRPCT including molybdenum (Mo) alloy (Mo-47.5 %Re), tantalum (Ta) alloys (T-111, ASTAR-811C), and niobium (Nb) alloy (Nb-1 %Zr). This TM is focused only on the Mo and Ta alloys, since they are of higher concern to the ongoing effort. The initial estimate to complete a Mo-47%Re system ready for testing is =$9,000k over a period of 30 mo. The initial estimate to complete a T-111 or ASTAR-811C system ready for testing is =$12,000k over a period of 36 mo.

Hickman, Robert R.↗