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At least 757 records · Page 42

SUMC-DV hardware manual

The assembly, the physical and electrical characteristics, and the basic electrical tests of the Space Ultrareliable Modular Computer Demonstration Vehicle (SUMC-DV), are described. The descriptions include: (1) the packaging concepts, physical assembly, design and fabrication using design automation techniques of 10 different types of custom CMOS LSI arrays; (2) the fabrication and testing of the various components including the LSI arrays; (3) the hierarchy of the memory complement and the clock generation and distribution system; (4) system testing techniques; and (5) the procedure employed in the electrical checkout of the system.

Feller, A.↗

LSI computer design - SUMC/DV.

Advanced Technology Laboratories has designed, built, and tested the first CMOS general-purpose computer. The computer executes 32 instructions that are operation-code compatible with the IBM 360 and RCA Spectra 70 series of computers. The computer is supported by 2k words of main-memory LSI storage and a TTY peripheral for input and output operations. Additionally, a simulator, an assembler, and a loader have been constructed to provide software support to the hardware. This paper provides an overall picture of this computer project.

Clapp, W. A.↗

Design automation techniques for custom LSI arrays

The standard cell design automation technique is described as an approach for generating random logic PMOS, CMOS or CMOS/SOS custom large scale integration arrays with low initial nonrecurring costs and quick turnaround time or design cycle. The system is composed of predesigned circuit functions or cells and computer programs capable of automatic placement and interconnection of the cells in accordance with an input data net list. The program generates a set of instructions to drive an automatic precision artwork generator. A series of support design automation and simulation programs are described, including programs for verifying correctness of the logic on the arrays, performing dc and dynamic analysis of MOS devices, and generating test sequences.

Feller, A.↗

The mini-O, a digital superhet, or a truly low-cost Omega navigation receiver

A quartz tuning fork filter circuit and some unique CMOS clock logic methods provide a very simple OMEGA-VLF receiver with true hyperbolic station pair phase difference outputs. An experimental system was implemented on a single battery-operated circuit board requiring only an external antenna preamplifier, and LOP output recorder. A bench evaluation and preliminary navigation tests indicate the technique is viable and can provide very low-cost OMEGA measurement systems. The method is promising for marine use with small boats in the present form, but might be implemented in conjunction with digital microprocessors for airborne navigation aids.

Burhans, R. W.↗

Narrow band binary phase locked loops

Very high Q digital filtering circuits for audio frequencies in the range of 1Hz to 15 KHz are implemented in simple CMOS hardware using a binary local reference clock frequency. The circuits have application to VLF navigation receivers and other narrow band audio range tracking problems.

Burhans, R. W.↗

Multichannel implantable telemetry system

Multiplexed biotelemetry system for animal research combines several power-saving features. Implantable sensor measures up to eight parameters simultaneously, including blood flow. Microamp transistors, switching circuits, and CMOS technology are used to lower power requirements. However, when blood flow is monitored, these measures are insufficient to reduce power enough for long-term operation from implantable primary battery.

Fryer, T. B.↗

Biotelemetry system for ambulatory patients

Compact transmitter for multichannel telemetry of medical data is carried in patient's belt. Pulse-code modulation (PCM), is used for high-quality signal, and low-power CMOS integrated circuits make miniaturization possible. Transmitter is useful for electro-encephalograms (EEG) and electro-cardiograms (EKG) and other biomedical patient-monitoring situations.

Fryer, T. B.↗

Evaluation testing of solid encapsulated microcircuits for space applications

Epoxy encapsulated microcircuits were subjected to various thermal, vibration, thermal cycling, and reduced barometric pressure stress tests to obtain electrical, environmental, and failure data. Analyses of the data were employed to derive information on environmental and operating design limits to determine the capability of encapsulated microcircuits to perform in space applications and environments. Seven different part types (four TTL, two CMOS, one linear) from five different manufacturers were subjected to single, multiple, and combinational environmental stress levels to determine: (1) what failure mechanisms are unique to encapsulated microcircuits; (2) how believable are suppliers claims of improved reliability, (3) what stress tests and screens can be used to identify potential early failure, and (4) what stress tests and screens should be avoided to prevent unwanted life degradation.

Robinson, D. D.↗

Preamplifier Noise in VLF Receivers

Noise specifications for junction field-effect transistors are presented in different ways depending on the particular semiconductor manufacturer. Arithmetic involved in converting these specifications to equivalent RMS noise in microvolts developed at the preamplifier input terminal is reviewed. These methods were useful for estimating the noise performance of high input impedance preamplifiers used with E-field antennas operating in the range of 1 KHz to 10 MHz. Both the JFET MPF-102 transistor and the COS/MOS CA3600 transistor array provided amplification for VLF receivers where the internally generated noise was well below the atmospheric noise level. The CA3600 transistor array provided better performance because of the more symmetrical complementary MOS transistor transfer characteristics than a single N-type biased JFET transistor. The CMOS amplifier resulted in self-compensating gain characteristics over a very wide temperature range from -55 to +125 C.

Burhans, R. W.↗

A complementary DMOS-VMOS IC structure

A new complementary MOS structure has been fabricated consisting of a p-channel DMOS transistor and an n-channel double-diffused VMOS transistor. The transconductance of each transistor was between 0.85-0.98 of the theoretical transconductance. The threshold voltages have been adjusted by either ion implantation or by adjusting the diffusion profiles. The inverter operation is similar to that of standard CMOS.

Jhabvala, M.↗

Teletype test unit

Device may be used to facilitate testing and fault isolation in teletype and modem systems that are used for communication by people who having hearing disabilities. Unit uses CMOS digital integrated circuitry which may be operated from relatively inexpensive battery of any voltage from 3 to 18 volts.

Couch, R. H.↗

Complementary DMOS-VMOS integrated circuit structure

A high speed CMOS formed on a single semiconductor substrate includes a DMOS having an asymmetric channel and a VMOS with a relatively short channel length. The short channel length of the VMOS is achieved by forming a double diffusion along one edge of a V groove, or ion implanting boron into the apex of the V groove and diffusing a single layer to a relatively deep depth along both edges of the groove.

Jhabvala, M. O.↗

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 1

Electrical characterization and qualification tests were performed on the RCA MWS5001D, 1024 by 1-bit, CMOS, random access memory. Characterization tests were performed on five devices. The tests included functional tests, AC parametric worst case pattern selection test, determination of worst-case transition for setup and hold times and a series of schmoo plots. The qualification tests were performed on 32 devices and included a 2000 hour burn in with electrical tests performed at 0 hours and after 168, 1000, and 2000 hours of burn in. The tests performed included functional tests and AC and DC parametric tests. All of the tests in the characterization phase, with the exception of the worst-case transition test, were performed at ambient temperatures of 25, -55 and 125 C. The worst-case transition test was performed at 25 C. The preburn in electrical tests were performed at 25, -55, and 125 C. All burn in endpoint tests were performed at 25, -40, -55, 85, and 125 C.

Klute, A.↗

Electrical Characterization of the RCA CDP1822SD Random Access Memory, Volume 1, Appendix a

Electrical characteristization tests were performed on 35 RCA CDP1822SD, 256-by-4-bit, CMOS, random access memories. The tests included three functional tests, AC and DC parametric tests, a series of schmoo plots, rise/fall time screening, and a data retention test. All tests were performed on an automated IC test system with temperatures controlled by a thermal airstream unit. All the functional tests, the data retention test, and the AC and DC parametric tests were performed at ambient temperatures of 25 C, -20 C, -55 C, 85 C, and 125 C. The schmoo plots were performed at ambient temperatures of 25 C, -55 C, and 125 C. The data retention test was performed at 25 C. Five devices failed one or more functional tests and four of these devices failed to meet the expected limits of a number of AC parametric tests. Some of the schmoo plots indicated a small degree of interaction between parameters.

Klute, A.↗

Space Shuttle communications RF switch matrix

The Shuttle Orbiter communications equipment includes phase modulation (PM) and frequency modulation (FM) channels. The PM section has the capability of routing high levels of energy (175 W) from any one of four transmitters to any one of four antennas, mutually exclusive. The FM channel uses a maximum of 15-W power routed from either of two transmitters to one of two antennas, mutually exclusive. The paper describes the design and the theory of a logic-controlled RF switch matrix devised for the purposes cited. Both PM and FM channels are computer-controlled with manual overrides. The logic interface is realized with CMOS logic for low power consumption and high noise immunity. The interior of the switch matrix is maintained at a pressure of 15 psi (90% nitrogen, 10% helium) by an electron beam-welded encapsulation. The computational results confirm the viability of the RF switch matrix concept.

Winch, R.↗

Silicon nitride passivation of IC's

Feasibility study looks at effectiveness of silicon nitride passivation coating against moisture and mobile ions. Coating was tested on CMOS microcircuits. Tests included temperature cycling, high-temperature electrical stress, and temperature and humidity exposure. Report concludes plastic-encapsulated circuits with protective coating exhibit high survival rates; it includes tables summarizing test results and figures that show effects of flexing.

Erickson, J. J.↗