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At least 739 records · Page 41
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Competing Zero-Field Chern Insulators in Superconducting Twisted Bilayer Graphene

The discovery of magic angle twisted bilayer graphene has unveiled a rich variety of superconducting, magnetic, and topologically nontrivial phases. Here, we show that the zero-field states at odd integer filling factors in h-BN nonaligned devices are consistent with symmetry broken Chern insulators, as is evidenced by the observation of the anomalous Hall effect near moiré cell filling factor ν = +1. The corresponding Chern insulator has a Chern number C = ±1 and a relatively high Curie temperature of T c ≈ 4.5 K. In a perpendicular magnetic field above B > 0.5 T we observe a transition of the ν = +1 Chern insulator from Chern number C = ±1 to C = 3, characterized by a quantized Hall plateau with R yx = h/3e 2 . These observations demonstrate that interaction-induced symmetry breaking leads to zero-field ground states that include almost degenerate and closely competing Chern insulators, and that states with larger Chern numbers couple most strongly to the B field. In addition, the device reveals strong superconducting phases with critical temperatures of up to T c ≈ 3.5 K. By providing the first demonstration of a system that allows gate-induced transitions between magnetic and superconducting phases, our observations mark a major milestone in the creation of a new generation of quantum electronics.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2024

Management and Operation of the Lawrence Livermore National Laboratory (Final Report)

Optimize existing characterization and control methods by developing methods for rapid synthesis of multi-qubit control for error mitigation and complex gate design using optimal control theory. The Subcontractor shall develop Hamiltonian learning methods that can be used for characterizing super-conducting quantum devices, in particular develop strategies for effective probing of such devices.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1985

Cryogenic operation of pseudomorphic AlGaAs/InGaAs single-quantum-well MODFETs

The 77 K operation of AlGaAs/InGaAs MODFETs has been investigated. The structures, grown by MBE, make use of a 200 A undoped In(0.15)Ga(0.85)As quantum well for electron confinement and an Si-doped Al(0.15)Ga(0.85)As top barrier. The MODFETs with 1 micron gate lengths exhibit extrinsic transconductances of 360 mS/mm and maximum currents of 310 mA/mm at 77 K. The use of a low Al mole fraction AlGaAs/InGaAs heterojunction makes it possible to avoid the persistent trapping effects encountered in AlGaAs/GaAs MODFETs without sacrificing device performance.

Masselink, W. T.↗
DOE OSTI2020

Topological quantum switch and controllable one-dimensional conducting paths in antimonene facilitated by breaking the inversion symmetry

Based on the nontrivial topology of buckled antimonene, we propose two conceptual device designs based on breaking the inversion symmetry which can be achieved by gating. The first one is a quantized topological switch obtained by breaking the degeneracy of the fractionalized charge conducting edge states, inducing a metal-insulator transition. In the second one, using local gating with different polarity in different areas, a domain wall is created at their interface, which hosts a soliton type electronic gap state in which transport could be accessed by doping and shown to be robust over a wide range of disorder.

36 MATERIALS SCIENCE↗
DOE OSTI2021

Globally Optimizing QAOA Circuit Depth for Constrained Optimization Problems

We develop a global variable substitution method that reduces n-variable monomials in combinatorial optimization problems to equivalent instances with monomials in fewer variables. We apply this technique to 3-SAT and analyze the optimal quantum unitary circuit depth needed to solve the reduced problem using the quantum approximate optimization algorithm. For benchmark 3-SAT problems, we find that the upper bound of the unitary circuit depth is smaller when the problem is formulated as a product and uses the substitution method to decompose gates than when the problem is written in the linear formulation, which requires no decomposition.

3-SAT↗
DOE OSTI2025

High-Power Clock Laser Spectrally Tailored for High-Fidelity Quantum State Engineering

Highly frequency-stable lasers are ubiquitous tools for optical-frequency metrology, precision interferometry, and quantum information science. While making a universally applicable laser is unrealistic, spectral noise can be tailored for specific applications. Here we report a high-power 698-nm clock laser with a maximum output of 4W and minimized frequency noise up to a few kHz Fourier frequency, together with long-term instability of 3.5 × 10 −17 at one to thousands of seconds. The laser-frequency noise is precisely characterized with atom-based spectral analysis that employs a pulse sequence designed to suppress sensitivity to intensity noise. This method provides universally applicable tunability of the spectral response and analysis of quantum sensors over a wide frequency range. With the optimized laser system characterized by this technique, we achieve an average single-qubit Clifford gate fidelity of up to 𝐹$^2_1$ = 0.999⁢64⁢(3) when simultaneously driving 3000 optical qubits with a homogeneous Rabi frequency ranging from 10 Hz to 1 kHz. This result represents the highest single optical-qubit-gate fidelity for a large number of atoms.

atomic gases↗
DOE OSTI2022

Gate-Tunable Proximity Effects in Graphene on Layered Magnetic Insulators

The extreme versatility of van der Waals materials derives from their ability to exhibit new electronic properties when assembled in proximity with dissimilar crystals. 1 For example, although graphene is inherently non-magnetic, recent work has reported a magnetic proximity effect in graphene interfaced with magnetic substrates, potentially enabling a pathway towards achieving a high-temperature quantum anomalous Hall effect. Here, we investigate heterostructures of graphene and chromium trihalide magnetic insulators (CrI 3 , CrBr 3 , and CrCl 3 ). Surprisingly, we are unable to detect a magnetic exchange field in the graphene, but instead discover proximity effects featuring unprecedented gate-tunability. The graphene becomes highly hole-doped due to charge transfer from the neighboring magnetic insulator, and further exhibits a variety of atypical gate-dependent transport features. The charge transfer can additionally be altered upon switching the magnetic states of the nearest CrI 3 layers. In conclusion, our results provide a roadmap for exploiting proximity effects arising in graphene coupled to magnetic insulators.

2D magnet↗
DOE OSTI2022

Remote surface optical phonon scattering in ferroelectric Ba 0.6 Sr 0.4 TiO 3 gated graphene

We report the effect of remote surface optical (RSO) phonon scattering on carrier mobility in monolayer graphene gated by ferroelectric oxide. We fabricate monolayer graphene transistors back-gated by epitaxial (001) Ba 0.6 Sr 0.4 TiO 3 films, with field effect mobility up to 23 000 cm 2 V –1 s –1 achieved. Switching ferroelectric polarization induces nonvolatile modulation of resistance and quantum Hall effect in graphene at low temperatures. Ellipsometry spectroscopy studies reveal four pairs of optical phonon modes in Ba 0.6 Sr 0.4 TiO 3 , from which we extract RSO phonon frequencies. The temperature dependence of resistivity in graphene can be well accounted for by considering the scattering from the intrinsic longitudinal acoustic phonon and the RSO phonon, with the latter dominated by the mode at 35.8 meV. Furthermore, our study reveals the room temperature mobility limit of ferroelectric-gated graphene transistors imposed by RSO phonon scattering.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Constant-depth circuits for dynamic simulations of materials on quantum computers

Abstract Dynamic simulation of materials is a promising application for near-term quantum computers. Current algorithms for Hamiltonian simulation, however, produce circuits that grow in depth with increasing simulation time, limiting feasible simulations to short-time dynamics. Here, we present a method for generating circuits that are constant in depth with increasing simulation time for a specific subset of one-dimensional (1D) materials Hamiltonians, thereby enabling simulations out to arbitrarily long times. Furthermore, by removing the effective limit on the number of feasibly simulatable time-steps, the constant-depth circuits enable Trotter error to be made negligibly small by allowing simulations to be broken into arbitrarily many time-steps. For an N -spin system, the constant-depth circuit contains only $\mathcal {O}(N^{2})$ O ( N 2 ) CNOT gates. Such compact circuits enable us to successfully execute long-time dynamic simulation of ubiquitous models, such as the transverse field Ising and XY models, on current quantum hardware for systems of up to 5 qubits without the need for complex error mitigation techniques. Aside from enabling long-time dynamic simulations with minimal Trotter error for a specific subset of 1D Hamiltonians, our constant-depth circuits can advance materials simulations on quantum computers more broadly in a number of indirect ways.

Materials simulation↗
DOE OSTI2026

Promise of Graph Sparsification and Decomposition for Noise Reduction in QAOA: Analysis for Trapped-Ion Compilations

We develop new approximate compilation schemes that significantly reduce the expense of compiling the Quantum Approximate Optimization Algorithm (QAOA) for solving the Max-Cut problem. Our main focus is on compilation with trapped-ion simulators using Pauli-X operations and all-to-all Ising Hamiltonian HIsing evolution generated by Molmer-Sorensen or optical dipole force interactions, though some of our results also apply to standard gate-based compilations. Our results are based on principles of graph sparsification and decomposition; the former reduces the number of edges in a graph while maintaining its cut structure, while the latter breaks a weighted graph into a small number of unweighted graphs. Though these techniques have been used as heuristics in various hybrid quantum algorithms, there have been no guarantees on their performance, to the best of our knowledge. This work provides the first provable guarantees using sparsification and decomposition to improve quantum noise resilience and reduce quantum circuit complexity. For quantum hardware that uses edge-by-edge QAOA compilations, sparsification leads to a direct reduction in circuit complexity. For trapped-ion quantum simulators implementing all-to-all HIsing pulses, we show that for a (1−ϵ) factor loss in the Max-Cut approximation (ϵ>0), our compilations improve the (worst-case) number of HIsing pulses from O(n2) to O(nlog(n/ϵ)) and the (worst-case) number of Pauli-X bit flips from O(n2) to O(nlog(n/ϵ)ϵ2) for n-node graphs. This is an asymptotic improvement for any constant ϵ>0. We demonstrate that significant improvements to the approximation ratio are obtained using decomposition in simulated trapped-ion experiments with dephasing noise. We further present a generic argument showing that sparsification results in an exponentially improved circuit fidelity lower bound in digital computing schemes based on one- and two-qubit gates, which are relevant to a wide variety of hardwares such as superconducting qubits and certain neutral atom or trapped ion setups, and more sophisticated noise models. We anticipate these approximate compilation techniques will be useful tools in a variety of future quantum computing experiments.

Moondra, Jai [Georgia Institute of Technology]↗
DOE OSTI2022

Demonstration of universal control between non-interacting qubits using the Quantum Zeno effect

The Zeno effect occurs in quantum systems when a very strong measurement is applied, which can alter the dynamics in non-trivial ways. Despite being dissipative, the dynamics stay coherent within any degenerate subspaces of the measurement. Here we show that such a measurement can turn a single-qubit operation into a two- or multi-qubit entangling gate, even in a non-interacting system. We demonstrate this gate between two effectively non-interacting transmon qubits. Our Zeno gate works by imparting a geometric phase on the system, conditioned on it lying within a particular non-local subspace. These results show how universality can be generated not only by coherent interactions as is typically employed in quantum information platforms, but also by Zeno measurements.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2024

On the practical usefulness of the Hardware Efficient Ansatz

Variational Quantum Algorithms (VQAs) and Quantum Machine Learning (QML) models train a parametrized quantum circuit to solve a given learning task. The success of these algorithms greatly hinges on appropriately choosing an ansatz for the quantum circuit. Perhaps one of the most famous ansatzes is the one-dimensional layered Hardware Efficient Ansatz (HEA), which seeks to minimize the effect of hardware noise by using native gates and connectives. The use of this HEA has generated a certain ambivalence arising from the fact that while it suffers from barren plateaus at long depths, it can also avoid them at shallow ones. In this work, we attempt to determine whether one should, or should not, use a HEA. We rigorously identify scenarios where shallow HEAs should likely be avoided (e.g., VQA or QML tasks with data satisfying a volume law of entanglement). More importantly, we identify a Goldilocks scenario where shallow HEAs could achieve a quantum speedup: QML tasks with data satisfying an area law of entanglement. We provide examples for such scenario (such as Gaussian diagonal ensemble random Hamiltonian discrimination), and we show that in these cases a shallow HEA is always trainable and that there exists an anti-concentration of loss function values. Our work highlights the crucial role that input states play in the trainability of a parametrized quantum circuit, a phenomenon that is verified in our numerics.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

Benchmarking Optimizers for Qumode State Preparation with Variational Quantum Algorithms

Quantum state preparation involves preparing a target state from an initial system, a process integral to applications such as quantum machine learning and solving systems of linear equations. Recently, there has been a growing interest in qumodes due to advancements in the field and their potential applications. However there is a notable gap in the literature specifically addressing this area. This paper aims to bridge this gap by providing performance benchmarks of various optimizers used in state preparation with Variational Quantum Algorithms. We conducted extensive testing across multiple scenarios, including different target states, both ideal and sampling simulations, and varying numbers of basis gate layers. Our evaluations offer insights into the complexity of learning each type of target state and demonstrate that some optimizers perform better than others in this context. Notably, the Powell optimizer was found to be exceptionally robust against sampling errors, making it a preferred choice in scenarios prone to such inaccuracies. Additionally, the Simultaneous Perturbation Stochastic Approximation optimizer was distinguished for its efficiency and ability to handle increased parameter dimensionality effectively.

Kan, Shuwen [Fordham University]↗
DOE OSTI2023

TDAG: Tree-based Directed Acyclic Graph Partitioning for Quantum Circuits

We propose the Tree-based Directed Acyclic Graph (TDAG) partitioning for quantum circuits, a novel quantum circuit partitioning method which partitions circuits by viewing them as a series of binary trees and selecting the tree containing the most gates. TDAG produces results of comparable quality (number of partitions) to an existing method called ScanPartitioner (an exhaustive search algorithm) with an 95% average reduction in execution time. Furthermore, TDAG improves compared to a faster partitioning method called QuickPartitioner by 38% in terms of quality of the results with minimal overhead in execution time.

Clark, Joseph↗
DOE OSTI2024

Qumode transfer between continuous- and discrete-variable devices

Transferring quantum information between different types of quantum hardware is crucial for integrated quantum technology. In particular, converting information between continuous variable (CV) and discrete variable (DV) devices enables many applications in quantum networking, quantum sensing, quantum machine learning, and quantum computing. This paper addresses the transfer of CV-encoded information between CV and DV devices. We present a resource-efficient method for encoding CV states and implementing CV gates on DV devices, as well as two measurement-based protocols for transferring CV states between CV and DV devices. The success probability of the transfer protocols depends on the measurement outcome and can be increased to near-deterministic values by adding ancillary qubits to the DV devices.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2020

Variational fast forwarding for quantum simulation beyond the coherence time

Abstract Trotterization-based, iterative approaches to quantum simulation (QS) are restricted to simulation times less than the coherence time of the quantum computer (QC), which limits their utility in the near term. Here, we present a hybrid quantum-classical algorithm, called variational fast forwarding (VFF), for decreasing the quantum circuit depth of QSs. VFF seeks an approximate diagonalization of a short-time simulation to enable longer-time simulations using a constant number of gates. Our error analysis provides two results: (1) the simulation error of VFF scales at worst linearly in the fast-forwarded simulation time, and (2) our cost function’s operational meaning as an upper bound on average-case simulation error provides a natural termination condition for VFF. We implement VFF for the Hubbard, Ising, and Heisenberg models on a simulator. In addition, we implement VFF on Rigetti’s QC to demonstrate simulation beyond the coherence time. Finally, we show how to estimate energy eigenvalues using VFF.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS2007

Increasing Linear Dynamic Range of a CMOS Image Sensor

A generic design and a corresponding operating sequence have been developed for increasing the linear-response dynamic range of a complementary metal oxide/semiconductor (CMOS) image sensor. The design provides for linear calibrated dual-gain pixels that operate at high gain at a low signal level and at low gain at a signal level above a preset threshold. Unlike most prior designs for increasing dynamic range of an image sensor, this design does not entail any increase in noise (including fixed-pattern noise), decrease in responsivity or linearity, or degradation of photometric calibration. The figure is a simplified schematic diagram showing the circuit of one pixel and pertinent parts of its column readout circuitry. The conventional part of the pixel circuit includes a photodiode having a small capacitance, CD. The unconventional part includes an additional larger capacitance, CL, that can be connected to the photodiode via a transfer gate controlled in part by a latch. In the high-gain mode, the signal labeled TSR in the figure is held low through the latch, which also helps to adapt the gain on a pixel-by-pixel basis. Light must be coupled to the pixel through a microlens or by back illumination in order to obtain a high effective fill factor; this is necessary to ensure high quantum efficiency, a loss of which would minimize the efficacy of the dynamic- range-enhancement scheme. Once the level of illumination of the pixel exceeds the threshold, TSR is turned on, causing the transfer gate to conduct, thereby adding CL to the pixel capacitance. The added capacitance reduces the conversion gain, and increases the pixel electron-handling capacity, thereby providing an extension of the dynamic range. By use of an array of comparators also at the bottom of the column, photocharge voltages on sampling capacitors in each column are compared with a reference voltage to determine whether it is necessary to switch from the high-gain to the low-gain mode. Depending upon the built-in offset in each pixel and in each comparator, the point at which the gain change occurs will be different, adding gain-dependent fixed pattern noise in each pixel. The offset, and hence the fixed pattern noise, is eliminated by sampling the pixel readout charge four times by use of four capacitors (instead of two such capacitors as in conventional design) connected to the bottom of the column via electronic switches SHS1, SHR1, SHS2, and SHR2, respectively, corresponding to high and low values of the signals TSR and RST. The samples are combined in an appropriate fashion to cancel offset-induced errors, and provide spurious-free imaging with extended dynamic range.

Pain, Bedabrata↗
DOE OSTI2025

Enhancing quantum memory lifetime with measurement-free local error correction and reinforcement learning

Reliable quantum computation requires systematic identification and correction of errors that occur and accumulate in quantum hardware. To diagnose and correct such errors, standard quantum error-correcting protocols utilize global error information across the system obtained by mid-circuit readout of ancillary qubits. We investigate circuit-level error-correcting protocols that are measurement-free and based on local error information. Such a local error correction (LEC) circuit consists of faulty multi-qubit gates to perform both syndrome extraction and ancilla-controlled error removal. We develop and implement a reinforcement learning framework that takes a fixed set of faulty gates as inputs and outputs an optimized LEC circuit. To evaluate this approach, we quantitatively characterize an extension of logical qubit lifetime by a noisy LEC circuit. For the two-dimensional (2D) classical Ising model and four-dimensional toric code, our optimized LEC circuit performs better at extending a memory lifetime compared with a conventional LEC circuit based on Toom's rule in a subthreshold gate error regime. We further show that such circuits can be used to reduce the rate of mid-circuit readouts to preserve a 2D toric code memory. Lastly, we discuss the application of the LEC protocol on dissipative preparation of quantum states with topological phases.

74 ATOMIC AND MOLECULAR PHYSICS↗