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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 739 records · Page 41
All sourcesNASA NTRSDOE OSTI
NASA NTRS1995

High Performance Parallel Computational Nanotechnology

At a recent press conference, NASA Administrator Dan Goldin encouraged NASA Ames Research Center to take a lead role in promoting research and development of advanced, high-performance computer technology, including nanotechnology. Manufacturers of leading-edge microprocessors currently perform large-scale simulations in the design and verification of semiconductor devices and microprocessors. Recently, the need for this intensive simulation and modeling analysis has greatly increased, due in part to the ever-increasing complexity of these devices, as well as the lessons of experiences such as the Pentium fiasco. Simulation, modeling, testing, and validation will be even more important for designing molecular computers because of the complex specification of millions of atoms, thousands of assembly steps, as well as the simulation and modeling needed to ensure reliable, robust and efficient fabrication of the molecular devices. The software for this capacity does not exist today, but it can be extrapolated from the software currently used in molecular modeling for other applications: semi-empirical methods, ab initio methods, self-consistent field methods, Hartree-Fock methods, molecular mechanics; and simulation methods for diamondoid structures. In as much as it seems clear that the application of such methods in nanotechnology will require powerful, highly powerful systems, this talk will discuss techniques and issues for performing these types of computations on parallel systems. We will describe system design issues (memory, I/O, mass storage, operating system requirements, special user interface issues, interconnects, bandwidths, and programming languages) involved in parallel methods for scalable classical, semiclassical, quantum, molecular mechanics, and continuum models; molecular nanotechnology computer-aided designs (NanoCAD) techniques; visualization using virtual reality techniques of structural models and assembly sequences; software required to control mini robotic manipulators for positional control; scalable numerical algorithms for reliability, verifications and testability. There appears no fundamental obstacle to simulating molecular compilers and molecular computers on high performance parallel computers, just as the Boeing 777 was simulated on a computer before manufacturing it.

Saini, Subhash↗
NASA NTRS1993

Mapping robust parallel multigrid algorithms to scalable memory architectures

The convergence rate of standard multigrid algorithms degenerates on problems with stretched grids or anisotropic operators. The usual cure for this is the use of line or plane relaxation. However, multigrid algorithms based on line and plane relaxation have limited and awkward parallelism and are quite difficult to map effectively to highly parallel architectures. Newer multigrid algorithms that overcome anisotropy through the use of multiple coarse grids rather than relaxation are better suited to massively parallel architectures because they require only simple point-relaxation smoothers. In this paper, we look at the parallel implementation of a V-cycle multiple semicoarsened grid (MSG) algorithm on distributed-memory architectures such as the Intel iPSC/860 and Paragon computers. The MSG algorithms provide two levels of parallelism: parallelism within the relaxation or interpolation on each grid and across the grids on each multigrid level. Both levels of parallelism must be exploited to map these algorithms effectively to parallel architectures. This paper describes a mapping of an MSG algorithm to distributed-memory architectures that demonstrates how both levels of parallelism can be exploited. The result is a robust and effective multigrid algorithm for distributed-memory machines.

Overman, Andrea↗
NASA NTRS1975

Fixed memory least squares filtering

Buxbaum has reported on three algorithms for computing least squares estimates that are based on fixed amounts of data. In this correspondence, the filter is arranged as a point-deleting Kalman filter concatenated with the standard point-inclusion Kalman filter. The resulting algorithm is couched in a square root framework for greater numerical stability, and special attention is given to computer implementation.

Bierman, G. J.↗
NASA NTRS1992

Modeling of supersonic combustor flows using parallel computing

While current 3D CFD codes and modeling techniques have been shown capable of furnishing engineering data for complex scramjet flowfields, the usefulness of such efforts is primarily limited by solutions' CPU time requirements, and secondarily by memory requirements. Attention is presently given to the use of parallel computing capabilities for engineering CFD tools for the analysis of supersonic reacting flows, and to an illustrative incompressible CFD problem using up to 16 iPSC/2 processors with single-domain decomposition.

Riggins, D.↗
NASA NTRS1987

Implementation of a digital optical matrix-vector multiplier using a holographic look-up table and residue arithmetic

The design and implementation of a digital (numerical) optical matrix-vector multiplier are presented. The objective is to demonstrate the operation of an optical processor designed to minimize computation time in performing a practical computing application. This is done by using the large array of processing elements in a Hughes liquid crystal light valve, and relying on the residue arithmetic representation, a holographic optical memory, and position coded optical look-up tables. In the design, all operations are performed in effectively one light valve response time regardless of matrix size. The features of the design allowing fast computation include the residue arithmetic representation, the mapping approach to computation, and the holographic memory. In addition, other features of the work include a practical light valve configuration for efficient polarization control, a model for recording multiple exposures in silver halides with equal reconstruction efficiency, and using light from an optical fiber for a reference beam source in constructing the hologram. The design can be extended to implement larger matrix arrays without increasing computation time.

Habiby, Sarry F.↗
NASA NTRS1993

Generating local addresses and communication sets for data-parallel programs

Generating local addresses and communication sets is an important issue in distributed-memory implementations of data-parallel languages such as High Performance FORTRAN. We show that, for an array A affinely aligned to a template that is distributed across p processors with a cyclic(k) distribution and a computation involving the regular section A(l:h:s), the local memory access sequence for any processor is characterized by a finite state machine of at most k states. We present fast algorithms for computing the essential information about these state machines, and extend the framework to handle multidimensional arrays. We also show how to generate communication sets using the state machine approach. Performance results show that this solution requires very little run-time overhead and acceptable preprocessing time.

Chatterjee, Siddhartha↗
NASA NTRS1989

Supercomputer requirements for selected disciplines important to aerospace

Speed and memory requirements placed on supercomputers by five different disciplines important to aerospace are discussed and compared with the capabilities of various existing computers and those projected to be available before the end of this century. The disciplines chosen for consideration are turbulence physics, aerodynamics, aerothermodynamics, chemistry, and human vision modeling. Example results for problems illustrative of those currently being solved in each of the disciplines are presented and discussed. Limitations imposed on physical modeling and geometrical complexity by the need to obtain solutions in practical amounts of time are identified. Computational challenges for the future, for which either some or all of the current limitations are removed, are described. Meeting some of the challenges will require computer speeds in excess of exaflop/s (10 to the 18th flop/s) and memories in excess of petawords (10 to the 15th words).

Peterson, Victor L.↗
NASA NTRS1984

Impact of computers on aerodynamics research and development

Factors motivating the development of computational aerodynamics as a discipline are traced back to the limitations of the tools available to the aerodynamicist before the development of digital computers. Governing equations in exact and approximate forms are discussed together with approaches to their numerical solution. Example results obtained from the successively refined forms of the equations are presented and discussed, both in the context of levels of computer power required and the degree of the effect that their solution has on aerodynamic research and development. Factors pacing advances in computational aerodynamics are identified, including the amount of computational power required to take the next major step in the discipline. Finally, the Numerical Aerodynamic Simulation (NAS) Program - with its 1987 target of achieving a sustained computational rate of 1 billion floating-point operations per second operating on a memory of 240 million words - is briefly discussed in terms of its projected effect on the future of computational aerodynamics.

Peterson, V. L.↗
NASA NTRS1990

BIRD: A general interface for sparse distributed memory simulators

Kanerva's sparse distributed memory (SDM) has now been implemented for at least six different computers, including SUN3 workstations, the Apple Macintosh, and the Connection Machine. A common interface for input of commands would both aid testing of programs on a broad range of computer architectures and assist users in transferring results from research environments to applications. A common interface also allows secondary programs to generate command sequences for a sparse distributed memory, which may then be executed on the appropriate hardware. The BIRD program is an attempt to create such an interface. Simplifying access to different simulators should assist developers in finding appropriate uses for SDM.

Rogers, David↗
NASA NTRS2008

Impacts of the IBM Cell Processor to Support Climate Models

NASA is interested in the performance and cost benefits for adapting its applications to the IBM Cell processor. However, its 256KB local memory per SPE and the new communication mechanism, make it very challenging to port an application. We selected the solar radiation component of the NASA GEOS-5 climate model, which: (1) is representative of column physics (approximately 50% computational time), (2) has a high computational load relative to transferring data from and to main memory, (3) performs independent calculations across multiple columns. We converted the baseline code (single-precision, Fortran) to C and ported it with manually SIMDizing 4 independent columns and found that a Cell with 8 SPEs can process 2274 columns per second. Compared with the baseline results, the Cell is approximately 5.2X, approximately 8.2X, approximately 15.1X faster than a core on Intel Woodcrest, Dempsey, and Itanium2, respectively. We believe this dramatic performance improvement makes a hybrid cluster with Cell and traditional nodes competitive.

Zhou, Shujia↗
NASA NTRS1989

Merlin - Massively parallel heterogeneous computing

Hardware and software for Merlin, a new kind of massively parallel computing system, are described. Eight computers are linked as a 300-MIPS prototype to develop system software for a larger Merlin network with 16 to 64 nodes, totaling 600 to 3000 MIPS. These working prototypes help refine a mapped reflective memory technique that offers a new, very general way of linking many types of computer to form supercomputers. Processors share data selectively and rapidly on a word-by-word basis. Fast firmware virtual circuits are reconfigured to match topological needs of individual application programs. Merlin's low-latency memory-sharing interfaces solve many problems in the design of high-performance computing systems. The Merlin prototypes are intended to run parallel programs for scientific applications and to determine hardware and software needs for a future Teraflops Merlin network.

Wittie, Larry↗
NASA NTRS1975

Study of the modifications needed for efficient operation of NASTRAN on the Control Data Corporation STAR-100 computer

NASA structural analysis (NASTRAN) computer program is operational on three series of third generation computers. The problem and difficulties involved in adapting NASTRAN to a fourth generation computer, namely, the Control Data STAR-100, are discussed. The salient features which distinguish Control Data STAR-100 from third generation computers are hardware vector processing capability and virtual memory. A feasible method is presented for transferring NASTRAN to Control Data STAR-100 system while retaining much of the machine-independent code. Basic matrix operations are noted for optimization for vector processing.

Source record↗
NASA NTRS1976

HEP - A semaphore-synchronized multiprocessor with central control

The paper describes the design concept of the Heterogeneous Element Processor (HEP), a system tailored to the special needs of scientific simulation. In order to achieve high-speed computation required by simulation, HEP features a hierarchy of processes executing in parallel on a number of processors, with synchronization being largely accomplished by hardware. A full-empty-reserve scheme of synchronization is realized by zero-one-valued hardware semaphores. A typical system has, besides the control computer and the scheduler, an algebraic module, a memory module, a first-in first-out (FIFO) module, an integrator module, and an I/O module. The architecture of the scheduler and the algebraic module is examined in detail.

Gilliland, M. C.↗
NASA NTRS1977

Performance of DPSK with convolutional encoding on time-varying fading channels

The bit error probability performance of a differentially-coherent phase-shift keyed (DPSK) modem with convolutional encoding and Viterbi decoding on time-varying fading channels is examined. Both the Rician and the lognormal channels are considered. Bit error probability upper bounds on fully-interleaved (zero-memory) fading channels are derived and substantiated by computer simulation. It is shown that the resulting coded system performance is a relatively insensitive function of the choice of channel model provided that the channel parameters are related according to the correspondence developed as part of this paper. Finally, a comparison of DPSK with a number of other modulation strategies is provided.

Mui, S. Y.↗
NASA NTRS1982

Programmable Pulse Generator

New pulse generator programmed to produce pulses from several ports at different pulse lengths and intervals and virtually any combination and sequence. Unit contains a 256-word-by-16-bit memory loaded with instructions either manually or by computer. Once loaded, unit operates independently of computer.

Rhim, W. K.↗
NASA NTRS1983

Development of land based radar polarimeter processor system

The processing subsystem of a land based radar polarimeter was designed and constructed. This subsystem is labeled the remote data acquisition and distribution system (RDADS). The radar polarimeter, an experimental remote sensor, incorporates the RDADS to control all operations of the sensor. The RDADS uses industrial standard components including an 8-bit microprocessor based single board computer, analog input/output boards, a dynamic random access memory board, and power supplis. A high-speed digital electronics board was specially designed and constructed to control range-gating for the radar. A complete system of software programs was developed to operate the RDADS. The software uses a powerful real time, multi-tasking, executive package as an operating system. The hardware and software used in the RDADS are detailed. Future system improvements are recommended.

Kronke, C. W.↗
NASA NTRS1984

Improving the Spacelab mass memory unit tape layout with a simulation model

A tape drive called the Mass Memory Unit (MMU) stores software used by Spacelab computers. MMU tape motion must be minimized during typical flight operations to avoid a loss of scientific data. A projection of the tape motion is needed for evaluation of candidate tape layouts. A computer simulation of the scheduled and unscheduled MMU tape accesses is developed for this purpose. This simulation permits evaluations of candidate tape layouts by tracking and summarizing tape movements. The factors that affect tape travel are investigated and a heuristic is developed to find a good tape layout. An improved tape layout for Spacelab I is selected after the evaluation of fourteen candidates. The simulation model will provide the ability to determine MMU layouts that substantially decrease the tape travel on future Spacelab flights.

Noneman, S. R.↗
NASA NTRS1988

The Atlas-Centaur 67 incident

The conditions leading to the breakup of the Atlas-Centaur 67 (AC-67) vehicle launched on March 26, 1987 during a typical winter-time storm are analyzed, and a most probable lightning strike scenario was developed based on inspection of the AC-67 debris, the AC-68 vehicle, and appropriate drawings, electrical diagrams, and photographs. It is shown that, during ascent, the vehicle encountered increasingly larger electric fields and flew through clouds that produced precipitation static on the vehicle, eventually triggering a cloud-to-ground lightning, comprised of at least four return strokes. The resulting lightning current coupled a signal into the wiring which goes to the AC-67 digital computer unit (DCU), effecting a single-word memory alteration and causing the DCU to issue a hardover engine gimbal command. This led to an excessive angle of attack, large dynamic loads, and the breakup of the AC-67.

Christian, H. J.↗