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At least 739 records · Page 41

Sensitivity of feedforward neural networks to weight errors

An analysis is made of the sensitivity of feedforward layered networks of Adaline elements (threshold logic units) to weight errors. An approximation is derived which expresses the probability of error for an output neuron of a large network (a network with many neurons per layer) as a function of the percentage change in the weights. As would be expected, the probability of error increases with the number of layers in the network and with the percentage change in the weights. The probability of error is essentially independent of the number of weights per neuron and of the number of neurons per layer, as long as these numbers are large (on the order of 100 or more).

Stevenson, Maryhelen↗

Solid-state reprogrammable analog resistive devices for electronic neural networks

The fabrication and performance of WO3-based, solid-state, three-terminal device configurations as programmable analog memory elements are reported. These transistorlike device structures exhibit good resistance progammability with a remarkable resolution of a few percent of the resistive strength over a four orders of magnitude dynamic range. The most critical component of these devices is an insulating layer between the active WO3 and the cation donor layer. The progamming characteristics and operation mechanisms of the device are described, and probable reaction mechanisms critical to the device stability are discussed.

Ramesham, R.↗

Method Accelerates Training Of Some Neural Networks

Three-layer networks trained faster provided two conditions are satisfied: numbers of neurons in layers are such that majority of work done in synaptic connections between input and hidden layers, and number of neurons in input layer at least as great as number of training pairs of input and output vectors. Based on modified version of back-propagation method.

Shelton, Robert O.↗

Learning to read aloud: A neural network approach using sparse distributed memory

An attempt to solve a problem of text-to-phoneme mapping is described which does not appear amenable to solution by use of standard algorithmic procedures. Experiments based on a model of distributed processing are also described. This model (sparse distributed memory (SDM)) can be used in an iterative supervised learning mode to solve the problem. Additional improvements aimed at obtaining better performance are suggested.

Joglekar, Umesh Dwarkanath↗

Analog hardware for delta-backpropagation neural networks

This is a fully parallel analog backpropagation learning processor which comprises a plurality of programmable resistive memory elements serving as synapse connections whose values can be weighted during learning with buffer amplifiers, summing circuits, and sample-and-hold circuits arranged in a plurality of neuron layers in accordance with delta-backpropagation algorithms modified so as to control weight changes due to circuit drift.

Eberhardt, Silvio P.↗

Analog VLSI neural network integrated circuits

Two analog very large scale integration (VLSI) vector matrix multiplier integrated circuit chips were designed, fabricated, and partially tested. They can perform both vector-matrix and matrix-matrix multiplication operations at high speeds. The 32 by 32 vector-matrix multiplier chip and the 128 by 64 vector-matrix multiplier chip were designed to perform 300 million and 3 billion multiplications per second, respectively. An additional circuit that has been developed is a continuous-time adaptive learning circuit. The performance achieved thus far for this circuit is an adaptivity of 28 dB at 300 KHz and 11 dB at 15 MHz. This circuit has demonstrated greater than two orders of magnitude higher frequency of operation than any previous adaptive learning circuit.

Kub, F. J.↗

Neural networks modeling and control of dynamical systems

The topics are presented in viewgraph form and include: an overview of research; first year research objectives (starting 5/91); background; current work; accomplishments from 5/91-9/91; and second year research objectives.

Donald I Soloway↗

Application of fuzzy logic-neural network based reinforcement learning to proximity and docking operations

As part of the Research Institute for Computing and Information Systems (RICIS) activity, the reinforcement learning techniques developed at Ames Research Center are being applied to proximity and docking operations using the Shuttle and Solar Max satellite simulation. This activity is carried out in the software technology laboratory utilizing the Orbital Operations Simulator (OOS). This interim report provides the status of the project and outlines the future plans.

Jani, Yashvant↗

Cascaded VLSI neural network architecture for on-line learning

High-speed, analog, fully-parallel, and asynchronous building blocks are cascaded for larger sizes and enhanced resolution. A hardware compatible algorithm permits hardware-in-the-loop learning despite limited weight resolution. A computation intensive feature classification application was demonstrated with this flexible hardware and new algorithm at high speed. This result indicates that these building block chips can be embedded as an application specific coprocessor for solving real world problems at extremely high data rates.

Thakoor, Anilkumar P.↗