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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 721 records · Page 40
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Modeling and Simulation of Power-Electronic Inverters in Analog Electronic Circuit Simulators

This paper demonstrates how equivalent-circuit representations of grid-following power-electronic inverters can be realized within a SPICE-based development environment using common circuit components and VerilogA code. This facilitates computationally lean simulations of inverter networks leveraging the strengths of SPICE in large-scale simulations. We validate the approach with time-domain simulations for a modified version of the IEEE standard 118-bus system modeled in Virtuoso (a SPICE-based solver). Simulation results are compared-focusing on accuracy and computation speed-with results from a commonly used power-electronics simulation package. We note a significant decrease in simulation time with comparable signal resolution when simulating the network in SPICE.

Billmeyer, Ryan↗
DOE OSTI2024

Modeling and Validation of Offset Cancellation for Hybrid Photonic-Electronic Transimpedance Amplifier Using All-Electronic Circuits

Hybrid photonic-electronic circuits involving crossdomain feedback signals are difficult to validate and troubleshoot. This paper describes an approach to model and validate an offset-cancellation loop for a hybrid transimpedance amplifier (TIA) using all-electronic circuits. An equivalent electrical model is developed for the tunable interferometer attenuators used for offset trimming, and it includes test features to extract the system performance. The stability analysis of the system shows 75 ◦ of phase margin and 102 dB of gain margin. Measurement results demonstrate good agreement with analysis and successful TIA offset cancellation.

Marchant, Jared↗
DOE OSTI2024

Visual Analytics of Performance of Quantum Computing Systems and Circuit Optimization

Driven by potential exponential speedups in business, security, and scientific scenarios, interest in quantum computing is surging. This interest feeds the development of quantum computing hardware, but several challenges arise in optimizing application performance for hardware metrics (e.g., qubit coherence and gate fidelity). In this work, we describe a visual analytics approach for analyzing the performance properties of quantum devices and quantum circuit optimization. Our approach allows users to explore spatial and temporal patterns in quantum device performance data and it computes similarities and variances in key performance metrics. Detailed analysis of the error properties characterizing individual qubits is also supported. We also describe a method for visualizing the optimization of quantum circuits. The resulting visualization tool allows researchers to design more efficient quantum algorithms and applications by increasing the interpretability of quantum computations.

Chae, Junghoon↗
DOE OSTI2020

A Novel Model of Thyristor in Reverse Recovery Process for Current Interruption Test of HVDC Circuit Breakers

The high voltage thyristor is widely used in high voltage DC (HVDC) grids due to its large current capability. Recently, the high voltage thyristor is implemented to produce a high current in the HVDC circuit breaker (CB) testing process. Unfortunately, the reverse recovery process (RRP) of a thyristor could induce significant turn-off overvoltage and power losses, jeopardizing the safety of the devices. The existing models of a thyristor cannot describe such hard-switching transient accurately. Therefore, this paper divides this process into four stages based on the physical mechanism and proposes a novel cosine exponential (CE), simulating the voltage and current of the thyristor with analytical equations, which are derived from the equivalent circuit. Moreover, the extraction procedure of the proposed model is illustrated in this paper. Finally, we develop an HVDC CB test platform to validate the proposed model. Experimental results show that the proposed CE model can accurately predict the overvoltage with a relative error of less than 8% at various current varying rates.

Dongye, Zhonghao↗
DOE OSTI2020

Precursor Reaction Method With High Ga Cu(In,Ga)(S,Se)$_{2}$ to Achieve Increased Open-Circuit Voltage

The precursor reaction process for the fabrication of Cu(In,Ga)Se 2 solar cells potentially allows for low-cost fabrication and scalable processing for manufacturing. Additionally, this process has yielded record efficiencies in lab-scale experiments. Thus far, research on the precursor reaction method has been restricted to relatively low Ga compositions with Ga/(In+Ga) ≈ 25%. By increasing the ratio of Ga, it is possible to increase the bandgap, and thus, increase the open-circuit voltage. This work develops and characterizes the precursor reaction process for use with Ga/(In+Ga) ≈ 50%, with the goal of improving the open-circuit voltage and efficiency. It is shown that with an increased Ga ratio, increased V ∞ is achieved, but the rate of conversion from the precursor to absorber phases is decreased. Additionally, increased Ga improves the film adhesion at increased selenization temperatures as well as improving the film morphology.

14 SOLAR ENERGY↗
DOE OSTI2025

A Twin Circuit Theory-Based Framework for Oscillation Event Analysis in Inverter-Dominated Power Systems With Case Study for Kaua‘i System

Here, this paper proposes a real-world oscillation event analysis framework for power systems that include inverter-based resources together with synchronous generators. Specifically, the proposed framework combines both measurement-and model-based techniques to readily identify potential oscillation sources, replay the oscillation event with numerical simulation, unveil the underlying oscillation mechanism, and suggest mitigation methods for a wide range of oscillation events. To strengthen the theoretical foundation of our analysis framework, this paper proposes a twin circuit theory that provides theoretical support for one key utilized but not well-proven measurement-based oscillation source identification method-Dissipating Energy Flow. Our twin circuit theory also shows that adopting well-tuned grid-forming inverters can be a potential mitigation method for oscillation events. Finally, the effectiveness of our proposed oscillation event analysis framework is demonstrated by addressing a real-world 18-20 Hz oscillation event in Kaua‘i's power system on November 21, 2021.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2020

Reduced-Order Parameterized Short-Circuit Current Model of Inverter-Interfaced Distributed Generators

The short-circuit response of inverter-interfaced distributed generators (IIDGs) is not adequately represented in many conventional protection studies. This paper presents an in-depth analysis of IIDG behavior during grid faults and proposes a more accurate reduced-order parameterized short-circuit current (RPSC) model of inverters. Typical inverter components are thoroughly investigated to identify those that play dominant roles during faults. The paper shows that the current limiter is the dominant factor for the steady-state fault-current of inverter; while the inverter filter along with the severity of the voltage disturbance largely determine the initial transient spike of inverter fault current. The proposed model is low-order and can be used in large scale simulations. The parameters of the proposed RPSC model can be extracted from laboratory experiments without requiring proprietary manufacturer information. The proposed fault-current model is analogous to the well-known synchronous machine model that segregates the inverter fault current into subtransient, transient, and steady-state fault currents. Finally, experimental and simulation tests are presented to validate the model.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2023

Automating NISQ Application Design with Meta Quantum Circuits with Constraints (MQCC)

Near-term intermediate scale quantum (NISQ) computers are likely to have very restricted hardware resources, where precisely controllable qubits are expensive, error-prone, and scarce. Programmers of such computers must therefore balance trade-offs among a large number of (potentially heterogeneous) factors specific to the targeted application and quantum hardware. To assist them, we propose Meta Quantum Circuits with Constraints (MQCC), a meta-programming framework for quantum programs. Programmers express their application as a succinct collection of normal quantum circuits stitched together by a set of (manually or automatically) added meta-level choice variables, whose values are constrained according to a programmable set of quantitative optimization criteria. MQCC’s compiler generates the appropriate constraints and solves them via an SMT solver, producing an optimized, runnable program. We showcase a few MQCC’s applications for its generality including an automatic generation of efficient error syndrome extraction schemes for fault-tolerant quantum error correction with heterogeneous qubits and an approach to writing approximate quantum Fourier transformation and quantum phase estimation that smoothly trades off accuracy and resource use. We also illustrate that MQCC can easily encode prior one-off NISQ application designs-–multi-programming (MP), crosstalk mitigation (CM)—as well as a combination of their optimization goals (i.e., a combined MP-CM).

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2023

PyTorch Circuit-Aware Bit-Cell Modeling

SAND2024-08549O PyTorch Circuit-Aware Bit-Cell Modeling, a Python library, demonstrates circuit-aware training for analog machine learning accelerators. Built upon PyTorch, this software provides hardware-aware versions of common neural network layers to mitigate non-ideal behavior from novel hardware. The software provides accurate forward and backward pass estimates for hardware-mapped neural networks that are implemented in crossbars (arrays) that contain a non-linear transistor selector device. Sandia National Laboratories is a multimission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525.

Bennett, Christopher↗
DOE OSTI2025

Code Generators for Floating-Point Unit Design in Integrated Circuits (OpenFloat) v1.0

This IP provides a comprehensive set of code generators for various floating-point units (FPUs) essential for integrated circuit design and integration, targeting a broad spectrum of applications, including machine learning and scientific computing. The suite includes FP adders, multipliers, subtractors, dividers, reciprocals, exponentials, square roots, trigonometric functions (sine, cosine, arctangent), and more. It supports customizable hardware design parameters, such as precision (16, 32, 64, and 128 bits) and pipeline depths, offering users enhanced flexibility and productivity. The generated code is in an industry-standard hardware description language, ensuring compatibility with standard design flows, including simulation, verification, synthesis, and implementation on both field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs).

Shalf, JohnM. [Lawrence Berkeley National Laborato↗
DOE OSTI2023

Accelerated deep self-supervised ptycho-laminography for three-dimensional nanoscale imaging of integrated circuits

Three-dimensional inspection of nanostructures such as integrated circuits is important for security and reliability assurance. Two scanning operations are required: ptychographic to recover the complex transmissivity of the specimen, and rotation of the specimen to acquire multiple projections covering the 3D spatial frequency domain. Two types of rotational scanning are possible: tomographic and laminographic. For flat, extended samples, for which the full 180° coverage is not possible, the latter is preferable because it provides better coverage of the 3D spatial frequency domain compared to limited-angle tomography. It is also because the amount of attenuation through the sample is approximately the same for all projections. However, both techniques are time consuming because of extensive acquisition and computation time. Here, we demonstrate the acceleration of ptycho-laminographic reconstruction of integrated circuits with 16 times fewer angular samples and 4.67 times faster computation by using a physics-regularized deep self-supervised learning architecture. We check the fidelity of our reconstruction against a densely sampled reconstruction that uses full scanning and no learning. As already reported elsewhere [ Opt. Express 28 , 12872 ( 2020 ) OPEXFF 1094-4087 10.1364/OE.379200 ], we observe improvement of reconstruction quality even over the densely sampled reconstruction, due to the ability of the self-supervised learning kernel to fill the missing cone.

47 OTHER INSTRUMENTATION↗
DOE OSTI2020

Learning to Optimize Variational Quantum Circuits to Solve Combinatorial Problems

Quantum computing is a computational paradigm with the potential to outperform classical methods for a variety of problems. Proposed recently, the Quantum Approximate Optimization Algorithm (QAOA) is considered as one of the leading candidates for demonstrating quantum advantage in the near term. QAOA is a variational hybrid quantum-classical algorithm for approximately solving combinatorial optimization problems. The quality of the solution obtained by QAOA for a given problem instance depends on the performance of the classical optimizer used to optimize the variational parameters. In this paper, we formulate the problem of finding optimal QAOA parameters as a learning task in which the knowledge gained from solving training instances can be leveraged to find high-quality solutions for unseen test instances. To this end, we develop two machine-learning-based approaches. Our first approach adopts a reinforcement learning (RL) framework to learn a policy network to optimize QAOA circuits. Our second approach adopts a kernel density estimation (KDE) technique to learn a generative model of optimal QAOA parameters. In both approaches, the training procedure is performed on small-sized problem instances that can be simulated on a classical computer; yet the learned RL policy and the generative model can be used to efficiently solve larger problems. Furthermore, extensive simulations using the IBM Qiskit Aer quantum circuit simulator demonstrate that our proposed RL- and KDE-based approaches reduce the optimality gap by factors up to 30.15 when compared with other commonly used off-the-shelf optimizers.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Case Study: Laboratory and Field Evaluation of Circuit-Level Electrical Submetering with Wireless Current Transformers

Laboratory and field demonstration of circuit-level electrical submetering technology that utilizes wireless current transformers to monitor circuits within the panel. Report provides a background of the technology and how it works, outlines the testing methodology and presents results on measurement accuracy and ability of the technology to be rapidly integrated into both electrical panels/infrastructure and into an analytics platform. Cost effectiveness results are discussed for the specific field demonstration site.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗
DOE OSTI2024

Radio Frequency Properties of a 3D Printed Klystron Circuit

The manufacturing of active RF devices like klystrons is dominated by expensive and time-consuming cycles of machining and brazing. In this article, we characterize the RF properties of X-band klystron cavities and an integrated circuit manufactured with a novel additive manufacturing process. Parts are 3D printed in 316 L stainless steel with direct metal laser sintering, electroplated in copper, and brazed in one simple braze cycle. Stand-alone test cavities and integrated circuit cavities were measured throughout the manufacturing process. The un-tuned cavity frequency varies by less than 5% of the intended frequency, and Q factors reach above 1200. A tuning study was performed, and unoptimized tuning pins achieved a tuning range of 138 MHz without compromising Q. Klystron system performance was simulated with as-built cavity parameters and realistic tuning. Together, these results show promise that this process can be used to cheaply and quickly manufacture a new generation of highly integrated high power vacuum devices.

3D printing↗
DOE OSTI2022

Quantum Circuits for the Preparation of Spin Eigenfunctions on Quantum Computers

The application of quantum algorithms to the study of many-particle quantum systems requires the ability to prepare wave functions that are relevant in the behavior of the system under study. Hamiltonian symmetries are important instruments used to classify relevant many-particle wave functions and to improve the efficiency of numerical simulations. In this work, quantum circuits for the exact and approximate preparation of total spin eigenfunctions on quantum computers are presented. Two different strategies are discussed and compared: exact recursive construction of total spin eigenfunctions based on the addition theorem of angular momentum, and heuristic approximation of total spin eigenfunctions based on the variational optimization of a suitable cost function. The construction of these quantum circuits is illustrated in detail, and the preparation of total spin eigenfunctions is demonstrated on IBM quantum devices, focusing on three- and five-spin systems on graphs with triangle connectivity.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Non-invasive mid-circuit measurement and reset on atomic qubits

Mid-circuit measurement and reset of subsets of qubits is a crucial ingredient of quantum error correction and many quantum information applications. Measurement of atomic qubits is accomplished through resonant fluorescence, which typically disturbs neighboring atoms due to photon scattering. We propose and prototype a new scheme for measurement that provides both spatial and spectral isolation by using tightly-focused individual laser beams and narrow atomic transitions. The unique advantage of this scheme is that all operations are applied exclusively to the read-out qubit, with negligible disturbance to the other qubits of the same species and little overhead. In this letter, we pave the way for non-invasive and high fidelity mid-circuit measurement and demonstrate all key building blocks on a single trapped barium ion.

Atomic Physics (physics.atom-ph)↗
DOE OSTI2025

Fault Tolerant Decoding of QLDPC-GKP Codes with Circuit Level Soft Information

Concatenated bosonic-stabilizer codes have recently gained prominence as promising candidates for achieving low-overhead fault-tolerant quantum computing in the long term. In such systems, analog information obtained from the syndrome measurements of an inner bosonic code is used to inform decoding for an outer code layer consisting of a discrete-variable stabilizer code such as a surface code. The use of Quantum Low-Density Parity Check (QLDPC) codes as an outer code is of particular interest due to the significantly higher encoding rates offered by these code families, leading to a further reduction in overhead for large-scale quantum computing. Recent works have investigated the performance of QLDPC-GKP codes in detail, and the use of analog information from the inner code significantly boosts decoder performance. However, the noise models assumed in these works are typically limited to depolarizing or phenomenological noise. In this paper, we investigate the performance of QLDPC-GKP concatenated codes under circuit-level noise, based on a model introduced by Noh et al. in the context of the surface-GKP code. To demonstrate the performance boost from analog information, we investigate three scenarios: (a) decoding without soft information, (b) decoding with precomputed error probabilities but without real-time soft information, and (c) decoding with real-time soft information obtained from round-to-round decoding of the inner GKP code. Results show minimal improvement between (a) and (b), but a significant boost in (c), indicating that real-time soft information is critical for concatenated decoding under circuit-level noise. We also study the effect of measurement schedules with varying depths and show that using a schedule with minimum depth is essential for obtaining reliable soft information from the inner code.

Borah, Shantom K. [Arizona U. (main)]↗
NASA NTRS1964

Computer circuit will fit on single silicon chip

A simplified computer logic circuit of two NAND/NOR gates and three additional inputs to accomplish the count and shift function is described. The circuit has capacity for parallel read-in, counting, serial shiftout, complement input and set and reset.

Smith, C.↗