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At least 721 records · Page 40
All sourcesNASA NTRSDOE OSTI
NASA NTRS1993

Fast, Low-Power, Hysteretic Level-Detector Circuit

Circuit for detection of preset levels of voltage or current intended to replace standard fast voltage comparator. Hysteretic analog/digital level detector operates at unusually low power with little sacrifice of speed. Comprises low-power analog circuit and complementary metal oxide/semiconductor (CMOS) digital circuit connected in overall closed feedback loop to decrease rise and fall times, provide hysteresis, and trip-level control. Contains multiple subloops combining linear and digital feedback. Levels of sensed signals and hysteresis level easily adjusted by selection of components to suit specific application.

Arditti, Mordechai↗
NASA NTRS1991

Investigations of detail design issues for the high speed acoustic wind tunnel using a 60th scale model tunnel. Part 2: Tests with the closed circuit

This report summarizes the tests on the 1:60 scale model of the High Speed Acoustic Wind Tunnel (HSAWT) performed during the period June - August 1991. Throughout the testing the tunnel was operated in the 'closed circuit mode,' that is when the airflow was set up by an axial flow fan, which was located inside the tunnel circuit and was directly driven by a motor. The tests were first performed with the closed test section and were subsequently repeated with the open test section, the latter operating with the nozzle-diffuser at its optimum setting. On this subject, reference is made to the report (1) issued January 1991, under contract 17-GFY900125, which summarizes the result obtained with the tunnel operating in the 'open circuit mode.' The tests confirmed the viability of the tunnel design, and the flow distributions in most of the tunnel components were considered acceptable. There were found, however, some locations where the flow distribution requires improvement. This applies to the flow upstream of the fan where the flow was found skewed, thus affecting the flow downstream. As a result of this, the flow appeared separated at the end of the large diffuser at the outer side. All tests were performed at NASA LaRC.

Barna, P. Stephen↗
NASA NTRS1993

Simulation of TunneLadder traveling-wave tube cold-test characteristics: Implementation of the three-dimensional, electromagnetic circuit analysis code micro-SOS

The three-dimensional, electromagnetic circuit analysis code, Micro-SOS, can be used to reduce expensive time-consuming experimental 'cold-testing' of traveling-wave tube (TWT) circuits. The frequency-phase dispersion characteristics and beam interaction impedance of a TunneLadder traveling-wave tube slow-wave structure were simulated using the code. When reasonable dimensional adjustments are made, computer results agree closely with experimental data. Modifications to the circuit geometry that would make the TunneLadder TWT easier to fabricate for higher frequency operation are explored.

Kory, Carol L.↗
NASA NTRS1991

System-level integrated circuit (SLIC) development for phased array antenna applications

A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

Shalkhauser, K. A.↗
NASA NTRS1943

A Hot-wire Circuit with Very Small Time Lag

A circuit for a hot-wire anemometer for the measurement of fluctuating flow is presented in the present report. The principal elements of the circuit are a Wheatstone bridge, one branch of which is the hot wire; and an electronic amplifier and a current regulator for the brief current which in combination maintain the bridge balance constant. Hence the hot wire is kept at practically constant resistance and temperature, and the time lag caused by thermal inertia of the wire is thereby reduced. Through the addition of a nonlinear amplifying stage the reading of the instrument has been rendered proportional to the velocity. A discussion of certain characteristics of the circuit and the results of related calibrating tests are given.

Weske, John R↗
NASA NTRS1994

Hermetic Packages For Millimeter-Wave Circuits

Advanced hermetic packages developed to house electronic circuits operating at frequencies from 1 to 100 gigahertz and beyond. Signals coupled into and out of packages electromagnetically. Provides circuit packages small, lightweight, rugged, and inexpensive in mass production. Packages embedded in planar microstrip and coplanar waveguide circuits, in waveguide-to-planar and planar-to-waveguide circuitry, in waveguide-to-waveguide circuitry, between radiating (antenna) elements, and between planar transmission lines and radiating elements. Other applications in automotive, communication, radar, remote sensing, and biomedical electronic systems foreseen.

Herman, Martin I.↗
NASA NTRS1991

New dynamic FET logic and serial memory circuits for VLSI GaAs technology

The complexity of GaAs field effect transistor (FET) very large scale integration (VLSI) circuits is limited by the maximum power dissipation while the uniformity of the device parameters determines the functional yield. In this work, digital GaAs FET circuits are presented that eliminate the DC power dissipation and reduce the area to 50% of that of the conventional static circuits. Its larger tolerance to device parameter variations results in higher functional yield.

Eldin, A. G.↗
NASA NTRS1991

Asynchronous sequential circuit design using pass transistor iterative logic arrays

The iterative logic array (ILA) is introduced as a new architecture for asynchronous sequential circuits. This is the first ILA architecture for sequential circuits reported in the literature. The ILA architecture produces a very regular circuit structure. Moreover, it is immune to both 1-1 and 0-0 crossovers and is free of hazards. This paper also presents a new critical race free STT state assignment which produces a simple form of design equations that greatly simplifies the ILA realizations.

Liu, M. N.↗
NASA NTRS1992

Dimension scaling effects on the yield sensitivity of HEMT digital circuits

In our previous works, using a graphical tool, yield factor histograms, we studied the yield sensitivity of High Electron Mobility Transistors (HEMT) and HEMT circuit performance with the variation of process parameters. This work studies the scaling effects of process parameters on yield sensitivity of HEMT digital circuits. The results from two HEMT circuits are presented.

Sarker, Jogendra C.↗
NASA NTRS1995

Digital Pulse-Width-Modulation Circuit

Digital pulse-width-modulation circuit provides programmable duration from 1 microsecond to full on, at repetition rate of 1 kHz. Designed for use in controlling CO2 laser, also used in applications in which precision and flexibility of digital control of pulse durations needed. Circuit incorporates low-power Schottky transistor/transistor-logic (TTL) devices in critical high-speed parts. Designed in TTL to make it compatible with Pro-Log 7914 (or equivalent) decoder input/output (I/O) utility printed-circuit card.

Wenzler, Carl J.↗
NASA NTRS1995

Circuit Stops Prelasing In A Q-Switched Laser

Protective shutdown circuit stops prelasing in Q-switched laser operating at pulse-repetition rate of about 10 Hz. During normal operation, Q-switch prevents emission of light from laser cavity during application of Q-switch-trigger pulse. When circuit detects prelasing, it triggers relay turning off laser power supply. Circuit integrated into almost any Q-switched-laser system, provided one gains access to laser light, Q-switch-trigger pulse, and safety-interlock line of laser power supply.

Lockard, George E.↗
NASA NTRS1995

Gas-Sensing Flip-Flop Circuits

Gas-sensing integrated circuits consisting largely of modified static random-access memories (SRAMs) undergoing development, building on experience gained in use of modified SRAMs as radiation sensors. Each SRAM memory cell includes flip-flop circuit; sensors exploit metastable state that lies between two stable states (corresponding to binary logic states) of flip-flop circuit. Voltages of metastable states vary with exposures of gas-sensitive resistors.

Buehler, Martin G.↗
NASA NTRS1995

Interface Circuit Board For Space-Shuttle Communications

Report describes interface electronic circuit developed to enable ground controllers to send commands and data via Ku-band radio uplink to multiple circuits connected to standard IEEE-488 general-purpose interface bus in space shuttle. Design of circuit extends data-throughput capability of communication system.

Parrish, Brett T.↗
NASA NTRS1995

Formal development of a clock synchronization circuit

This talk presents the latest stage in formal development of a fault-tolerant clock synchronization circuit. The development spans from a high level specification of the required properties to a circuit realizing the core function of the system. An abstract description of an algorithm has been verified to satisfy the high-level properties using the mechanical verification system EHDM. This abstract description is recast as a behavioral specification input to the Digital Design Derivation system (DDD) developed at Indiana University. DDD provides a formal design algebra for developing correct digital hardware. Using DDD as the principle design environment, a core circuit implementing the clock synchronization algorithm was developed. The design process consisted of standard DDD transformations augmented with an ad hoc refinement justified using the Prototype Verification System (PVS) from SRI International. Subsequent to the above development, Wilfredo Torres-Pomales discovered an area-efficient realization of the same function. Establishing correctness of this optimization requires reasoning in arithmetic, so a general verification is outside the domain of both DDD transformations and model-checking techniques. DDD represents digital hardware by systems of mutually recursive stream equations. A collection of PVS theories was developed to aid in reasoning about DDD-style streams. These theories include a combinator for defining streams that satisfy stream equations, and a means for proving stream equivalence by exhibiting a stream bisimulation. DDD was used to isolate the sub-system involved in Torres-Pomales' optimization. The equivalence between the original design and the optimized verified was verified in PVS by exhibiting a suitable bisimulation. The verification depended upon type constraints on the input streams and made extensive use of the PVS type system. The dependent types in PVS provided a useful mechanism for defining an appropriate bisimulation.

Miner, Paul S.↗
NASA NTRS1998

Finite Ground Coplanar (FGC) Waveguide: It's Characteristics and Advantages for Use in RF and Wireless Communication Circuits

To solve many of the problems encountered when using conventional coplanar waveguide (CPW) with its semi-infinite ground planes, a new version of coplanar waveguide with electrically narrow ground planes has been developed. This new transmission line which we call Finite Ground Coplanar (FGC) waveguide has several advantages which make it a better transmission line for RF and wireless circuits. Since the ground planes are electrically narrow, spurious resonances created by the CPW ground planes and the metal carrier or package base are eliminated. In addition, lumped and distributed circuit elements may now be integrated into the ground strips in the same way as they traditionally have been integrated into the center conductor to realize novel circuit layouts that are smaller and have less parasitic reactance. Lastly, FGC is shown to have lower coupling between adjacent transmission lines than conventional CPW.

Ponchak, George E.↗
NASA NTRS1998

Finite Ground Coplanar (FGC) Waveguide: A Better Transmission Line for Microwave Circuits

A new version of coplanar waveguide (CPW) with electrically narrow ground strips 14 has been developed for microwave integrated circuits. This transmission line, referred to by Finite Ground Coplanar (FGC) waveguide, has several advantages over conventional coplanar waveguide. Since the ground strips are narrow, parasitic resonances that develop when the CPW is placed on a carrier or in a package are eliminated. In addition, the narrow ground strips permit the integration of lumped and distributed circuit elements in the ground strips as well as in the center strip to reduce the circuit size and improve its performance. Finally, the coupling between adjacent FGC transmission lines is lower than the coupling between CPW lines for the same spacing between the lines. All of these attributes of FGC are presented in this paper.

Ponchak, George E.↗
NASA NTRS2000

Optical Circuit Switched Protocol

The present invention is a system and method embodied in an optical circuit switched protocol for the transmission of data through a network. The optical circuit switched protocol is an all-optical circuit switched network and includes novel optical switching nodes for transmitting optical data packets within a network. Each optical switching node comprises a detector for receiving the header, header detection logic for translating the header into routing information and eliminating the header, and a controller for receiving the routing information and configuring an all optical path within the node. The all optical path located within the node is solely an optical path without having electronic storage of the data and without having optical delay of the data. Since electronic storage of the header is not necessary and the initial header is eliminated by the first detector of the first switching node. multiple identical headers are sent throughout the network so that subsequent switching nodes can receive and read the header for setting up an optical data path.

Monacos, Steve P.↗
NASA NTRS2001

Novel Low Loss Wide-Band Multi-Port Integrated Circuit Technology for RF/Microwave Applications

In this paper, novel low loss, wide-band coplanar stripline technology for radio frequency (RF)/microwave integrated circuits is demonstrated on high resistivity silicon wafer. In particular, the fabrication process for the deposition of spin-on-glass (SOG) as a dielectric layer, the etching of microvias for the vertical interconnects, the design methodology for the multiport circuits and their measured/simulated characteristics are graphically illustrated. The study shows that circuits with very low loss, large bandwidth, and compact size are feasible using this technology. This multilayer planar technology has potential to significantly enhance RF/microwave IC performance when combined with semi-conductor devices and microelectromechanical systems (MEMS).

Simons, Rainee N.↗