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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS2010

Optimal and Local Connectivity Between Neuron and Synapse Array in the Quantum Dot/Silicon Brain

This innovation is used to connect between synapse and neuron arrays using nanowire in quantum dot and metal in CMOS (complementary metal oxide semiconductor) technology to enable the density of a brain-like connection in hardware. The hardware implementation combines three technologies: 1. Quantum dot and nanowire-based compact synaptic cell (50x50 sq nm) with inherently low parasitic capacitance (hence, low dynamic power approx.l0(exp -11) watts/synapse), 2. Neuron and learning circuits implemented in 50-nm CMOS technology, to be integrated with quantum dot and nanowire synapse, and 3. 3D stacking approach to achieve the overall numbers of high density O(10(exp 12)) synapses and O(10(exp 8)) neurons in the overall system. In a 1-sq cm of quantum dot layer sitting on a 50-nm CMOS layer, innovators were able to pack a 10(exp 6)-neuron and 10(exp 10)-synapse array; however, the constraint for the connection scheme is that each neuron will receive a non-identical 10(exp 4)-synapse set, including itself, via its efficacy of the connection. This is not a fully connected system where the 100x100 synapse array only has a 100-input data bus and 100-output data bus. Due to the data bus sharing, it poses a great challenge to have a complete connected system, and its constraint within the quantum dot and silicon wafer layer. For an effective connection scheme, there are three conditions to be met: 1. Local connection. 2. The nanowire should be connected locally, not globally from which it helps to maximize the data flow by sharing the same wire space location. 3. Each synapse can have an alternate summation line if needed (this option is doable based on the simple mask creation). The 10(exp 3)x10(exp 3)-neuron array was partitioned into a 10-block, 10(exp 2)x10(exp 3)-neuron array. This building block can be completely mapped within itself (10,000 synapses to a neuron).

Duong, Tuan A.↗
NASA NTRS1997

Novel Highly Parallel and Systolic Architectures Using Quantum Dot-Based Hardware

VLSI technology has made possible the integration of massive number of components (processors, memory, etc.) into a single chip. In VLSI design, memory and processing power are relatively cheap and the main emphasis of the design is on reducing the overall interconnection complexity since data routing costs dominate the power, time, and area required to implement a computation. Communication is costly because wires occupy the most space on a circuit and it can also degrade clock time. In fact, much of the complexity (and hence the cost) of VLSI design results from minimization of data routing. The main difficulty in VLSI routing is due to the fact that crossing of the lines carrying data, instruction, control, etc. is not possible in a plane. Thus, in order to meet this constraint, the VLSI design aims at keeping the architecture highly regular with local and short interconnection. As a result, while the high level of integration has opened the way for massively parallel computation, practical and full exploitation of such a capability in many applications of interest has been hindered by the constraints on interconnection pattern. More precisely. the use of only localized communication significantly simplifies the design of interconnection architecture but at the expense of somewhat restricted class of applications. For example, there are currently commercially available products integrating; hundreds of simple processor elements within a single chip. However, the lack of adequate interconnection pattern among these processing elements make them inefficient for exploiting a large degree of parallelism in many applications.

Fijany, Amir↗
NASA NTRS2003

Precise Heater Controller with rf-Biased Josephson Junctions

Paramagnetic susceptibility thermometers used in fundamental physics experiments are capable of measuring temperature changes with a precision of a part in 2 x 10(exp 10). However, heater controllers are only able to control open-loop power dissipation to about a part in 10(exp 5). We used an array of rf-biased Josephson junctions to precisely control the electrical power dissipation in a heater resistor mounted on a thermally isolated cryogenic platform. Theoretically, this method is capable of controlling the electrical power dissipation to better than a part in 10(exp 12). However, this level has not yet been demonstrated experimentally. The experiment consists of a liquid helium cell that also functions as a high-resolution PdMn thermometer, with a heater resistor mounted on it. The cell is thermally connected to a temperature-controlled cooling stage via a weak thermal link. The heater resistor is electrically connected to the array of Josephson junctions using superconducting wire. An rf-biased array of capacitively shunted Josephson junctions drives the voltage across the heater. The quantized voltage across the resistor is Vn = nf(h/2e), where h is Planck's constant, f is the array biasing frequency, e is the charge of an electron, and n is the integer quantum state of the Josephson array. This results in an electrical power dissipation on the cell of Pn = (Vn)(sup 2/R), where R is the heater resistance. The change of the quantum state of the array changes the power dissipated in the heater, which in turn, results in the change of the cell temperature. This temperature change is compared to the expected values based on the known thermal standoff resistance of the cell from the cooling stage. We will present our initial experimental results and discuss future improvements. This work has been funded by the Fundamental Physics Discipline of the Microgravity Science Office of NASA, and supported by a no-cost equipment loan from Sandia National Laboratories.

Green, Colin J.↗
NASA NTRS1977

High resolution imaging X-ray detector for astronomical measurements

The article describes the X-ray detector which will provide second-of-arc images for the HEAO-B X-ray observatory. The instrument uses microchannel plates as a photocathode surface and imaging photoelectron multiplier, and a crossed wire grid as a two-dimensional position-sensitive detector. Position determination is accomplished by electronic interpolation between the coarse grid wires. The detector provides the arrival time and position of each event which occurs within its field of view. Measurements of the spatial resolution (15 microns), temporal resolution (7.8 microsec), image distortion (less than 10 microns), uniformity of efficiency (less than plus or minus 10%), dark counting rate (0.2 cts/sq cm/s), and quantum efficiency (10% at 1.54 keV) of this detector are described. A summary of the procedure which was found useful during the initial turn-on of microchannel plates is given.

Henry, J. P.↗
DOE OSTI2024

Superconducting (Ba,K)Fe 2 As 2 epitaxial films on single and bicrystal SrTiO 3 substrates

The realization of single crystal and bicrystal films of superconducting materials is of great interest because they allow the investigation of the intragrain performance as well as the understanding of potential limitations in the grain boundary transparency. For many years, the realization of a high-quality (Ba,K)Fe 2 As 2 film has been challenging. Here, the realization of (Ba,K)Fe 2 As 2 epitaxial thin films on single crystal SrTiO 3 (001) and [001]-tilt-type SrTiO 3 bicrystal substrates with high superconducting properties is demonstrated. The epitaxial growth of (Ba,K)Fe 2 As 2 was enabled by implementing an undoped BaFe 2 As 2 buffer layer between the SrTiO 3 substrate and (Ba,K)Fe 2 As 2 film. The film exhibits a high T c of 38.0 K and an extremely high J c of 14.3 MA/cm 2 at 4.2 K. Artificial grain boundaries of (Ba,K)Fe 2 As 2 were also successfully achieved on bicrystals with misorientation angles up to 36.8° by the same preparation methods. The artificial grain boundaries exhibited an identical T c of 38.0 K and an excellent transfer of the grain orientation from the bicrystal substrates with high crystallinity comparable to that of the high-quality Ba(Fe,Co) 2 As 2 films. Furthermore, this enables the investigation of the intrinsic (Ba,K)Fe 2 As 2 grain boundary nature, which will clarify its potential for superconducting applications, like Josephson junctions, wires, and magnets.

(Ba,K)Fe2As2↗
NASA NTRS2003

Block QCA Fault-Tolerant Logic Gates

Suitably patterned arrays (blocks) of quantum-dot cellular automata (QCA) have been proposed as fault-tolerant universal logic gates. These block QCA gates could be used to realize the potential of QCA for further miniaturization, reduction of power consumption, increase in switching speed, and increased degree of integration of very-large-scale integrated (VLSI) electronic circuits. The limitations of conventional VLSI circuitry, the basic principle of operation of QCA, and the potential advantages of QCA-based VLSI circuitry were described in several NASA Tech Briefs articles, namely Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), Vol. 25, No. 10 (October 2001), page 42; Compact Interconnection Networks Based on Quantum Dots (NPO-20855) Vol. 27, No. 1 (January 2003), page 32; Bit-Serial Adder Based on Quantum Dots (NPO-20869), Vol. 27, No. 1 (January 2003), page 35; and Hybrid VLSI/QCA Architecture for Computing FFTs (NPO-20923), which follows this article. To recapitulate the principle of operation (greatly oversimplified because of the limitation on space available for this article): A quantum-dot cellular automata contains four quantum dots positioned at or between the corners of a square cell. The cell contains two extra mobile electrons that can tunnel (in the quantummechanical sense) between neighboring dots within the cell. The Coulomb repulsion between the two electrons tends to make them occupy antipodal dots in the cell. For an isolated cell, there are two energetically equivalent arrangements (denoted polarization states) of the extra electrons. The cell polarization is used to encode binary information. Because the polarization of a nonisolated cell depends on Coulomb-repulsion interactions with neighboring cells, universal logic gates and binary wires could be constructed, in principle, by arraying QCA of suitable design in suitable patterns. Heretofore, researchers have recognized two major obstacles to realization of QCA-based logic gates: One is the need for (and the difficulty of attaining) operation of QCA circuitry at room temperature or, for that matter, at any temperature above a few Kelvins. It has been theorized that room-temperature operation could be made possible by constructing QCA as molecular-scale devices. However, in approaching the lower limit of miniaturization at the molecular level, it becomes increasingly imperative to overcome the second major obstacle, which is the need for (and the difficulty of attaining) high precision in the alignments of adjacent QCA in order to ensure the correct interactions among the quantum dots.

Firjany, Amir↗
DOE OSTI2025

Demonstration of a 1820 channel multiplexer for transition-edge sensor bolometers

The scalability of most transition-edge sensor arrays is limited by the multiplexing technology, which combines their signals over a reduced number of wires and amplifiers. Here, in this Letter, we present and demonstrate a multiplexer design optimized for transition-edge sensor bolometers with 1820 sensors per readout unit, a factor of two more than the previous state-of-the-art. The design is optimized for cosmic microwave background imaging applications, and it builds on previous microwave superconducting quantum interference device multiplexers by doubling the available readout bandwidth to the full 4–8 GHz octave. Evaluating the key performance metrics of yield, sensitivity, and crosstalk through laboratory testing, we find an end-to-end operable detector yield of 78%, a typical nearest-neighbor crosstalk amplitude of ∼0.4%, and a median white noise level of 83 pA/$\sqrt{\textrm{Hz}}$ due to the multiplexer, corresponding to an estimated contribution of 4% to the total system noise for a ground-based cosmic microwave background telescope. Additionally, we identify a possible path toward reducing resonator loss for future designs with reduced noise. We expect these developments to alleviate the system complexity, cryogenic requirements, and cost of future large arrays of low temperature detectors.

cosmic microwave background↗
DOE OSTI2025

Geometric control of magnetic domain morphology in electrodeposited Ni rich NiPt mesoscopic wires

In this paper, we study the electrodeposited Ni—Pt magnetic wires, exploring the mechanisms by which changes in geometry and composition influence the local magnetic structure. The samples were prepared by electrodeposition, their elemental composition was analyzed by energy dispersive X-ray spectroscopy, and phase analysis was carried out by an X-ray diffraction measurement. Magnetic force microscopy measurements, and magnetic force microscopy measurements in magnetic field were carried out to study the domain morphology of the prepared samples. Magnetization characteristics were measured via vibrating sample magnetometry mode of a superconducting quantum interference device. Here, the results were analyzed and compared with micromagnetic simulations. It is shown that a strong perpendicular magnetic anisotropy is responsible for the characteristic checkerboard-like surface magnetization patterns, which can be tuned by geometrical constriction and Ni content. Understanding these relationships provides insights into the design of magnetic materials with tailored properties for advanced applications, like magnetic sensors.

Binary alloy↗
DOE OSTI2026

Architectural scaling tradeoffs in modular 3D bosonic quantum processors

We propose a modular three-dimensional bosonic quantum processor built from repeatable coupled-cavity modules linked by configurable interconnect networks. Using hardware-motivated graph-theoretic measures, we compare nearest-neighbor, hub-based, and hybrid architectures in terms of interconnect count, communication distance, resource concentration, and implementation complexity. Rather than identifying a universally optimal topology, our analysis shows how these architectures redistribute the costs of scaling, including wiring and port requirements, nonlocal communication distance, exposure to shared resources, routing bottlenecks, and scheduling overhead. Case studies of a \(3\times3\) processor and a larger hierarchical architecture further distinguish finite-size performance from asymptotic scaling. The resulting framework provides a systematic basis for evaluating modular three-dimensional bosonic processors and for identifying the device-level parameters required for quantitative hardware design.

Zhu, Shaojiang [Fermilab] (ORCID:0000000293180092)↗
NASA NTRS1995

Nanoelectronics: Opportunities for future space applications

Further improvements in the performance of integrated electronics will eventually halt due to practical fundamental limits on our ability to downsize transistors and interconnect wiring. Avoiding these limits requires a revolutionary approach to switching device technology and computing architecture. Nanoelectronics, the technology of exploiting physics on the nanometer scale for computation and communication, attempts to avoid conventional limits by developing new approaches to switching, circuitry, and system integration. This presentation overviews the basic principles that operate on the nanometer scale that can be assembled into practical devices and circuits. Quantum resonant tunneling (RT) is used as the center-piece of the overview since RT devices already operate at high temperature (120 degrees C) and can be scaled, in principle, to a few nanometers in semiconductors. Near- and long-term applications of GaAs and silicon quantum devices are suggested for signal and information processing, memory, optoelectronics, and radio frequency (RF) communication.

Frazier, Gary↗
DOE OSTI2025

Enhanced quasiparticle relaxation in a superconductor via the proximity effect

Quasiparticle dynamics have been identified as an important factor in the operational performance of superconductors in quantum computing and sensing applications. In order to study such dynamics, we performed measurements of quasiparticle transport in a superconductor engineered to enhance quasiparticle relaxation. We found that a thin, highly disordered normal metal layer can be used to greatly reduce the relaxation time of quasiparticles in a superconductor, as seen by a large reduction in the quasiparticle charge imbalance in a fully proximitized Cu/Al bilayer wire, without significantly affecting the properties of the superconductor. The enhanced relaxation is likely due to an increased electron–electron scattering rate in the disordered normal metal. Our results provide a positive indication that quasiparticle relaxation can be substantially enhanced via a simple and technologically viable method, and demonstrate that direct measurement of quasiparticle imbalance can be a useful tool for the assessment and engineering of superconductors in various applications at mK temperatures.

Ryan, Kevin M. [Northwestern U.] (ORCID:0000000293↗
NASA NTRS2003

Bit-Serial Adder Based on Quantum Dots

A proposed integrated circuit based on quantum-dot cellular automata (QCA) would function as a bit-serial adder. This circuit would serve as a prototype building block for demonstrating the feasibility of quantum-dots computing and for the further development of increasingly complex and increasingly capable quantum-dots computing circuits. QCA-based bit-serial adders would be especially useful in that they would enable the development of highly parallel and systolic processors for implementing fast Fourier, cosine, Hartley, and wavelet transforms. The proposed circuit would complement the QCA-based circuits described in "Implementing Permutation Matrices by Use of Quantum Dots" (NPO-20801), NASA Tech Briefs, Vol. 25, No. 10 (October 2001), page 42 and "Compact Interconnection Networks Based on Quantum Dots" (NPO-20855), which appears elsewhere in this issue. Those articles described the limitations of very-large-scale-integrated (VLSI) circuitry and the major potential advantage afforded by QCA. To recapitulate: In a VLSI circuit, signal paths that are required not to interact with each other must not cross in the same plane. In contrast, for reasons too complex to describe in the limited space available for this article, suitably designed and operated QCA-based signal paths that are required not to interact with each other can nevertheless be allowed to cross each other in the same plane without adverse effect. In principle, this characteristic could be exploited to design compact, coplanar, simple (relative to VLSI) QCA-based networks to implement complex, advanced interconnection schemes. To enable a meaningful description of the proposed bit-serial adder, it is necessary to further recapitulate the description of a quantum-dot cellular automation from the first-mentioned prior article: A quantum-dot cellular automaton contains four quantum dots positioned at the corners of a square cell. The cell contains two extra mobile electrons that can tunnel (in the quantum-mechanical sense) between neighboring dots within the cell. The Coulomb repulsion between the two electrons tends to make them occupy antipodal dots in the cell. For an isolated cell, there are two energetically equivalent arrangements (denoted polarization states) of the extra electrons. The cell polarization is used to encode binary information. Because the polarization of a nonisolated cell depends on Coulomb-repulsion interactions with neighboring cells, universal logic gates and binary wires could be constructed, in principle, by arraying QCA of suitable design in suitable patterns. Again, for reasons too complex to describe here, in order to ensure accuracy and timeliness of the output of a QCA array, it is necessary to resort to an adiabatic switching scheme in which the QCA array is divided into subarrays, each controlled by a different phase of a multiphase clock signal. In this scheme, each subarray is given time to perform its computation, then its state is frozen by raising its inter-dot potential barriers and its output is fed as the input to the successor subarray. The successor subarray is kept in an unpolarized state so it does not influence the calculation of preceding subarray. Such a clocking scheme is consistent with pipeline computation in the sense that each different subarray can perform a different part of an overall computation. In other words, QCA arrays are inherently suitable for pipeline and, moreover, systolic computations. This sequential or pipeline aspect of QCA would be utilized in the proposed bit-serial adders.

Fijany, Amir↗
NASA NTRS2009

NASA 2009 Body of Knowledge (BoK) carbon nanotube technology

The nature of the bonding of a nanotube is described by applied quantum chemistry, specifically, orbital hybridization. The chemical bonding of nanotubes is composed entirely of sp2 bonds, similar to those of graphite. This bonding structure, which is stronger than the sp3 bonds found in diamonds, provides the molecules with their unique strength. Nanotubes naturally align themselves into "ropes" held together by Van der Waals forces. Under high pressure, nanotubes can merge together, trading some sp² bonds for sp³ bonds, giving the possibility of producing strong, unlimited-length wires through high-pressure nanotube linking. This document looks at the topic of carbon nanotubes as it applies to microelectronics packaging and assembly.

Gerke, David↗
NASA NTRS1983

Monolithic short wave infrared (SWIR) detector array

A monolithic self-scanned linear detector array was developed for remote sensing in the 1.1- 2.4-micron spectral region. A high-density IRCCD test chip was fabricated to verify new design approaches required for the detector array. The driving factors in the Schottky barrier IRCCD (Pdsub2Si) process development are the attainment of detector yield, uniformity, adequate quantum efficiency, and lowest possible dark current consistent with radiometric accuracy. A dual-band module was designed that consists of two linear detector arrays. The sensor architecture places the floating diffusion output structure in the middle of the chip, away from the butt edges. A focal plane package was conceptualized and includes a polycrystalline silicon substrate carrying a two-layer, thick-film interconnecting conductor pattern and five epoxy-mounted modules. A polycrystalline silicon cover encloses the modules and bond wires, and serves as a radiation and EMI shield, thermal conductor, and contamination seal.

Source record↗
DOE OSTI2025

Magnetically tuned metal-insulator transition in LaAlO 3 /SrTiO 3 nanowire arrays

A wide family of two-dimensional (2D) systems, including stripe-phase superconductors, sliding Luttinger liquids, and anisotropic 2D materials, can be modeled by an array of coupled one-dimensional (1D) electron channels or nanowire arrays. Here we report experiments in arrays of conducting nanowires with gate and field tunable interwire coupling, that are programmed at the LaAlO 3 /SrTiO 3 interface. We find a magnetically tuned metal-to-insulator transition in which the transverse resistance of the nanowire array increases by up to four orders of magnitude, which can be further tuned with a gate voltage. To explain this behavior, we develop a minimal model of a coupled two-wire system where a Wenzel-Kramers-Brillouin-based approach is used to estimate the transverse tunneling conductance. We demonstrate the existence of distinct conductance features and highlight the crucial role played by the field dependence of the interwire potential barrier on transport properties. Since our model makes minimal assumptions, we expect our predictions to hold for a wide class of coupled 1D systems. The nanowire arrays can serve as model systems to understand the origin of exotic behavior in correlated materials via analog quantum simulation.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
NASA NTRS1991

Development of N/P AlGaAs free-standing top solar cells for tandem applications

The combination of a free standing AlGaAs top solar cell and an existing bottom solar cell is the highest performance, lowest risk approach to implementing the tandem cell concept. The solar cell consists of an AlGaAs substrate layer, an AlGaAs base layer, an AlGaAs emitter, and an ultra-thin AlGaAs window layer. The window layer is compositionally graded which minimizes reflection at the window layer/emitter interface and creates a built-in electric field to improve quantum response in the blue region of the spectrum. Liquid phase epitaxy (LPE) is the only viable method to produce this free standing top solar cell. Small (0.125 sq cm), transparent p/n AlGaAs top solar cells were demonstrated with optimum bandgap for combination with a silicon bottom solar cell. The efficiency of an AlGaAs/Si stack using the free standing AlGaAs device upon an existing silicon bottom solar cell is 24 pct. (1X, Air Mass Zero (AM0). The n/p AlGaAs top solar cell is being developed in order to facilitate the wiring configuration. The two terminal tandem stack will retain fit, form, and function of existing silicon solar cells. Progress in the development of large area (8 and 16 sq cm), free standing AlGaAs top solar cells is discussed.

Negley, Gerald H.↗
NASA NTRS2007

Improved Sensing Coils for SQUIDs

An improvement in the design and fabrication of sensing coils of superconducting quantum interference device (SQUID) magnetometers has been proposed to increase sensitivity. It has been estimated that, in some cases, it would be possible to increase sensitivity by about half or to reduce measurement time correspondingly. The pertinent aspects of the problems of design and fabrication can be summarized as follows: In general, to increase the sensitivity of a SQUID magnetometer, it is necessary to maximize the magnetic flux enclosed by the sensing coil while minimizing the self-inductance of this coil. It is often beneficial to fabricate the coil from a thicker wire to reduce its self-inductance. Moreover, to optimize the design of the coil with respect to sensitivity, it may be necessary to shape the wire to other than a commonly available circular or square cross-section. On the other hand, it is not practical to use thicker superconducting wire for the entire superconducting circuit, especially if the design of a specific device requires a persistent-current loop enclosing a remotely placed SQUID sensor. It may be possible to bond a thicker sensing-coil wire to thinner superconducting wires leading to a SQUID sensor, but it could be difficult to ensure reliable superconducting connections, especially if the bonded wires are made of different materials. The main idea is to mold the sensing coil in place, to more nearly optimum cross sectional shape, instead of making the coil by winding standard pre-fabricated wire. For this purpose, a thin superconducting wire loop that is an essential part of the SQUID magnetometer would be encapsulated in a form that would serve as a mold. A low-melting-temperature superconducting metal (e.g., indium, tin, or a lead/tin alloy) would be melted into the form, which would be sized and shaped to impart the required cross section to the coil thus formed.

Penanen, Konstantin↗
NASA NTRS2010

Planar Submillimeter-Wave Mixer Technology with Integrated Antenna

High-performance mixers at terahertz frequencies require good matching between the coupling circuits such as antennas and local oscillators and the diode embedding impedance. With the availability of amplifiers at submillimeter wavelengths and the need to have multi-pixel imagers and cameras, planar mixer architecture is required to have an integrated system. An integrated mixer with planar antenna provides a compact and optimized design at terahertz frequencies. Moreover, it leads to a planar architecture that enables efficient interconnect with submillimeter-wave amplifiers. In this architecture, a planar slot antenna is designed on a thin gallium arsenide (GaAs) membrane in such a way that the beam on either side of the membrane is symmetric and has good beam profile with high coupling efficiency. A coplanar waveguide (CPW) coupled Schottky diode mixer is designed and integrated with the antenna. In this architecture, the local oscillator (LO) is coupled through one side of the antenna and the RF from the other side, without requiring any beam sp litters or diplexers. The intermediate frequency (IF) comes out on a 50-ohm CPW line at the edge of the mixer chip, which can be wire-bonded to external circuits. This unique terahertz mixer has an integrated single planar antenna for coupling both the radio frequency (RF) input and LO injection without any diplexer or beamsplitters. The design utilizes novel planar slot antenna architecture on a 3- mthick GaAs membrane. This work is required to enable future multi-pixel terahertz receivers for astrophysics missions, and lightweight and compact receivers for planetary missions to the outer planets in our solar system. Also, this technology can be used in tera hertz radar imaging applications as well as for testing of quantum cascade lasers (QCLs).

Chattopadhyay, Gautam↗