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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4

Post-processing of phase change material in a zero-change commercial silicon photonic process

Integration of phase change material (PCM) with photonic integrated circuits can transform large-scale photonic systems by providing non-volatile control over phase and amplitude. The next generation of commercial silicon photonic processes can benefit from the addition of PCM to enable ultra-low power, highly reconfigurable, and compact photonic integrated circuits for large-scale applications. Despite all the advantages of PCM-based photonics, today’s commercial foundries do not provide them in their silicon photonic processes yet. We demonstrate the first-ever electrically programmable PCM device that is monolithically post-processed in a commercial foundry silicon photonics process using a few fabrication steps and coarse-resolution photolithography. These devices achieved 1.4 dB/μm of amplitude switching contrast using a thin layer of 12.5 nm GeSbTe in this work. We have also characterized the reconfiguration speed as well as repeatability of these devices over 20,000 switching cycles. Our solution enables non-volatile photonic VLSI systems that can be fabricated at low cost and high reliability in a commercial foundry process, paving the way for the development of non-volatile programmable photonic integrated circuits for a variety of emerging applications.

Optics↗

An automated miniaturized Haploscope for testing binocular visual function

A computer-controlled binocular vision testing device has been developed as one part of a system designed for NASA to test the vision of astronauts during spaceflight. The device, called the Mark III Haploscope, utilizes semi-automated psychophysical test procedures to measure visual acuity, stereopsis, phorias, fixation disparity and accommodation/convergence relationships. All tests are self-administered, yield quantitative data and may be used repeatedly without subject memorization. Future applications of this programmable, compact device include its use as a clinical instrument to perform routine eye examinations or vision screening, and as a research tool to examine the effects of environment or work-cycle upon visual function.

Decker, T. A.↗

Output data formatter for the Electronically Scanned Thinned Array Radiometer (ESTAR) instrument

A prototype Output Data Formatter (ODF) for the ESTAR (Electronically Scanned Thinned Array Radiometer) instrument has been designed and tested. It employs programmable logic devices to format and tag correlator data for transmission to Earth. After accepting 170 bits or correlator and error data in parallel, it appends an identification word and then serially passes the data to the Small Explorer Data System (SEDS) for transmission at a maximum rate of greater than 15 Mb/sec. Implemented with two reprogrammable field programmable gate arrays (FPGA's), each contained in a 132-pin plastic pin grid array (PGA) package, the design is cascadeable, fully testable, and low-power.

Chren, William A., Jr.↗

Observation of edge supercurrent in topological antiferromagnet MnBi 2 Te 4 -based Josephson junctions

Hybridizing superconductivity with topology and magnetism attracts growing interest in condensed matter physics. Here, we present our findings on the measurement of supercurrent induced in an intrinsic antiferromagnetic topological insulator MnBi 2 Te 4 . By constructing a MnBi 2 Te 4 proximity Josephson junction, we observed an anomalously large period of the Fraunhofer patterns, indicating a strong Josephson coupling state. As the MnBi 2 Te 4 thickness is reduced, a distinct asymmetric edge supercurrent emerges, aligning consistently with the observed oscillatory junction magnetoresistance. Leveraging this large asymmetric edge supercurrent, we have realized a nonvolatile Josephson diode device with programmable polarity, achieved through training with an out-of-plane magnetic field. Theoretical calculations substantiate that these behaviors are attributed to the interference between the highly asymmetric topological edge channel–mediated supercurrent induced in MnBi 2 Te 4 . Our study establishes this system as a promising avenue for investigating topological superconductivity, chiral Majorana edge modes, and advanced functionality device applications.

Science & Technology - Other Topics↗

Directed self-assembly of chiral liquid crystals into biomimetic bouligand structures in thin film

The Bouligand structure, renowned for its helicoidal arrangement and enhanced mechanical properties, has attracted significant research interest for its ability to impart enhanced strength to intrinsically soft materials. Biomimetic approaches have centered on fibrous structures in bulk materials, but translating this architecture into thin-film regime for miniaturized-wearable devices with programmable functions remains challenging. Here, we direct the self-assembly of cholesteric liquid crystals (CLCs) into hierarchical helical structures using chemically patterned surfaces. Alternating surface anchoring regions align uniform lying-down helices at the nanoscale, guiding a secondary microscale helical structure exhibiting both left- and right-handed twists. This mimetic Bouligand structure in CLCs enables optical modulation under applied field and strain with enhanced mechanical response. Simulations reveal the structural evolution from initial Bouligand configuration in LC layers to alternating twist helices. This research provides a basis for designing and manufacturing miniaturized or wearable devices with nanometer-scale precision in regulating electro-optical and mechanical properties. Bouligand structures, which offer strength in natural materials, are of interest but difficult to obtain. Here, the authors report the development of such structures by directed self-assembly of cholesteric single crystals into hierarchical helical structures, with the secondary structure having right and left-handed twists.

Bouligand structure↗

On Representative Spaceflight Instrument and Associated Instrument Sensor Web Framework

Sensor Web-based adaptation and sharing of space flight mission resources, including those of the Space-Ground and Control-User communication segment, could greatly benefit from utilization of heritage Internet Protocols and devices applied for Spaceflight (SpaceIP). This had been successfully demonstrated by a few recent spaceflight experiments. However, while terrestrial applications of Internet protocols are well developed and understood (mostly due to billions of dollars in investments by the military and industry), the spaceflight application of Internet protocols is still in its infancy. Progress in the developments of SpaceIP-enabled instrument components will largely determine the SpaceIP utilization of those investments and acceptance in years to come. Likewise SpaceIP, the development of commercial real-time and instrument colocated computational resources, data compression and storage, can be enabled on-board a spacecraft and, in turn, support a powerful application to Sensor Web-based design of a spaceflight instrument. Sensor Web-enabled reconfiguration and adaptation of structures for hardware resources and information systems will commence application of Field Programmable Arrays (FPGA) and other aerospace programmable logic devices for what this technology was intended. These are a few obvious potential benefits of Sensor Web technologies for spaceflight applications. However, they are still waiting to be explored. This is because there is a need for a new approach to spaceflight instrumentation in order to make these mature sensor web technologies applicable for spaceflight. In this paper we present an approach in developing related and enabling spaceflight instrument-level technologies based on the new concept of a representative spaceflight Instrument Sensor Web (ISW).

Kizhner, Semion↗

Image remapping strategies applied as protheses for the visually impaired

Maculopathy and retinitis pigmentosa (rp) are two vision defects which render the afflicted person with impaired ability to read and recognize visual patterns. For some time there has been interest and work on the use of image remapping techniques to provide a visual aid for individuals with these impairments. The basic concept is to remap an image according to some mathematical transformation such that the image is warped around a maculopathic defect (scotoma) or within the rp foveal region of retinal sensitivity. NASA/JSC has been pursuing this research using angle invariant transformations with testing of the resulting remapping using subjects and facilities of the University of Houston, College of Optometry. Testing is facilitated by use of a hardware device, the Programmable Remapper, to provide the remapping of video images. This report presents the results of studies of alternative remapping transformations with the objective of improving subject reading rates and pattern recognition. In particular a form of conformal transformation was developed which provides for a smooth warping of an image around a scotoma. In such a case it is shown that distortion of characters and lines of characters is minimized which should lead to enhanced character recognition. In addition studies were made of alternative transformations which, although not conformal, provide for similar low character distortion remapping. A second, non-conformal transformation was studied for remapping of images to aid rp impairments. In this case a transformation was investigated which allows remapping of a vision field into a circular area representing the foveal retina region. The size and spatial representation of the image are selectable. It is shown that parametric adjustments allow for a wide variation of how a visual field is presented to the sensitive retina. This study also presents some preliminary considerations of how a prosthetic device could be implemented in a practical sense, vis-a-vis, size, weight and portability.

Johnson, Curtis D.↗

Redox-Responsive, Reconfigurable All-Liquid Constructs

Using host-guest chemistries in a biphasic system, a novel supramolecular nanoparticle surfactant (s-NPS) with redox-responsiveness is presented to structure liquids. Additionally, the in situ assembly/jamming and disassembly/unjamming of s-NPSs at the oil-water interface are reversibly controlled by a switchable redox process, imparting a nanoscale redox-responsiveness, affecting the assemblies on all length scales. "Smart" all-liquid constructs including structured emulsions and programmable liquid devices are easily prepared, showing promising applications in responsive delivery, release, and reaction systems.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

A Digital Three Level Space Vector Modulator for High Frequency Vector Sequence Generation

This letter proposes a digital high-speed three-level space vector pulse width modulator (3L-SVPWM). A conventional 3L-SVPWM is typically computation-based, involving a sequential execution of sub-tasks on a digital signal processor (DSP) based controller. The resulting high computation time of 5.4 μs limits the implementation of additional control blocks for switching frequencies greater than 100 kHz. This is overcome by transforming sub-tasks into digital blocks with 1-0 decisions and simpler arithmetic operations. The sub-task blocks are executed concurrently on a programmable logic device (PLD). Hence, a fast 3L-SVPWM execution in 140 ns is achieved. The proposed digital 3L-SVPWM enables high switching frequency operation of wide bandgap (WBG) device-based 3 L inverters to generate high fundamental frequency waveforms. A finite state machine is an integral part of the proposed implementation with the ability to generate any vector sequence, maximizing the usage of redundant vector states in 3L-SVPWM. Here, the proposed digital 3L-SVPWM operation is demonstrated with a GaN-based 3 L active neutral point clamped (3L-ANPC) inverter. Experimental results are presented at 250 kHz switching frequency to generate vector sequences for center-aligned SVPWM (CA-SVPWM) and common mode voltage reduced SVPWM (CMVR-SVPWM). The results also showcase a high fundamental frequency generation capability of 10 kHz.

active neutral point clamped inverter↗

Leveraging In-Network Computing and Programmable Switches for Streaming Analysis of Scientific Data

With the emergence of programmable network devices that match the performance of fixed function devices, several recent projects have explored in-network computing, where the processing that is traditionally done outside the network is offloaded to the network devices. In-network computing has typically been applied to network functions (e.g., load balancing, NAT, and DNS), caching, data reduction/aggregation, and coordination/consensus functions. In some cases it has been used to accelerate stream-processing tasks that involve small payloads and simple operations. In this work we focus on leveraging in-network computing for stream processing of scientific datasets with large payloads that require complex operations such as floating-point computations and logarithmic functions. We demonstrate in-network computing for a real-world scientific application performing streaming normalization of a 2-D image from a light source experiment. We discuss the challenges we encountered and potential approaches to address them.

Sankaran, Ganesh↗

Toward Resilient Heterogeneous Computing Workflow through Kokkos-DataSpaces Integration

With the growing number of applications designed for heterogeneous HPC devices, application programmers and users are finding it challenging to compose scalable workflows as ensembles of these applications, that are portable, performant and resilient. The Kokkos C++ library has been designed to simplify this cumbersome procedure by providing an intra-application uniform programming model and portable performance. However, assembling multiple Kokkos-enabled applications into a complex workflow is still a challenge. Although Kokkos enables a uniform programming model, the inter-application data exchange still remains a challenge from both performance and software development cost perspectives. In order to address this issue, we propose a Kokkos-DataSpaces Integration, with the goal of providing a virtual shared-space abstraction that can be accessed concurrently by all applications in an Kokkos workflow, thus extending Kokkos to support inter-application data exchange.

97 MATHEMATICS AND COMPUTING↗

Design and Performance of Kokkos Staging Space toward Scalable Resilient Application Couplings

With the growing number of applications designed for heterogeneous HPC devices, application programmers and users are finding it challenging to compose scalable workflows as ensembles of these applications, that are portable, performant and resilient. The Kokkos C++ library has been designed to simplify this cumbersome procedure by providing an intra-application uniform programming model and portable performance. However, assembling multiple Kokkos-enabled applications into a complex workflow is still a challenge. Although Kokkos enables a uniform programming model, the inter-application data exchange still remains a challenge from both performance and software development cost perspectives. In order to address this issue, we propose Kokkos data staging memory space, an extension of Kokkos' data abstraction (memory space) for heterogeneous computing systems. This new abstraction allows to express data on a virtual shared-space for multiple Kokkos applications, thus extending Kokkos to support inter-application data exchange to build an efficient application workflow. Additionally, we study the effectiveness of asynchronous data layout conversions for applications requiring different memory access patterns for the shared data. Our preliminary evaluation with a synthetic benchmark indicate the effectiveness of this conversion adapted to three different scenarios representing access frequency and use patterns of the shared data.

97 MATHEMATICS AND COMPUTING↗

Evaluation of Hardware and Software Bill of Materials (HBOMs/SBOMs) Extraction Methods

Hardware and software bills of materials (HBOMs and SBOMs) provide important visibility into the components, dependencies, and supply chain relationships within programmable digital devices. This visibility is critical for advanced nuclear reactor applications, where use of common or shared hardware components, software libraries, suppliers, or manufacturing processes may create common cause failure (CCF) vulnerabilities despite apparent diversity. This paper evaluates current approaches for obtaining and analyzing HBOMs and SBOMs in support of CCF, diversity and defense-in-depth (D3) assessments, and begins to explore potential methods for artificial intelligence/machine learning-based analysis. The availability of BOM information from advanced reactor manufacturers and vendors, representative hardware and software categories found in advanced reactor systems continues to limit research [13]. This paper compares commonly used BOM formats, including CycloneDX, SPDX, and SWID. It also surveys publicly available tools for generating BOMs from source code, compiled binaries, and hardware-related information, noting limitations in language coverage, system age, and format interoperability. Finally, this paper evaluates methods for correlating BOM data with vulnerability and exploitability information, including VEX, CVE, and CWE resources. The findings indicate that publicly available nuclear-vendor BOMs are limited, making third-party extraction and research into novel analysis techniques necessary.

Cybersecurity↗

A flexible on-board demultiplexer/demodulator

Optimization of satellite communications system performance from the point of view of reduced overall system cost per unit of service delivered, requires that economies be exercised at all levels. Introduction of onboard regeneration which necessarily involves on-board demultiplexing and demodulation is an essential ingredient in meeting this goal. To achieve maximum benefit from this approach, the uplink transmission data rate and bandwidth from each earth terminal and consequently uplink EIRP needs to be minimized. This necessarily introduces multiple carriers of different bandwidths on the uplinks and creates an attending need onboard for simultaneous demodulation of many carriers. This paper addresses a digitally implemented bulk demultiplexer/demodulator that processes a large number of carriers having differing carrier bandwidths, bit rates and center rrequencies. The device is programmable from the ground to accommodate changes in the complexion of the carriers.

Campanella, S. Joseph↗

Single chip fixed frequency bit synchronizer

A single chip, fixed frequency suboptimum bit synchronizer design which was implemented utilizing a programmable logic device is described. The bit synchronizer is modeled after a digital transition tracking loop for symbol estimation and employs a first-order incremental phase modulator for closed-loop symbol synchronization. The BER and tracking performance is modeled and compared to optimum designs. The bit synchronizer was developed for the Space Shuttle.

Butler, Madeline J.↗

Modifications for a communication interface board

The objectives of this report had three sections. First, it is to modify a communication interface board by using erasable programmable logic devices to replace around SSI and MSI logic. Second, it is to simulate selected portions of the schematics using Altera Maxplus 1990 and Maxplus 2 1991 CAD programs. Third, it is to replace a first input first output (FIFO) device as well as serial to parallel and parallel to serial converters with new FIFO's that have internal converters.

Dejesuslafuente, Carlos E.↗

Digital receiver for on-board FM/FSK-FM/BPSK demodulation

An all-digital demodulator FM/FSK-FM/BPSK is presented. The proposed architecture allows the 1-bit IF down-sampling technique with the hardware simplification of receiver analog section. The receiver exhibits great flexibility both in terms of signal demodulation (FSK or BPSK, subcarrier/ tone frequency, data rate) and interface capability. The demodulator is going to be realized in a VLSI chip (20 Kgate complexity). This paper describes the demodulator structure and its demodulation performances obtained with a breadboard based on programmable logic devices. The choice of a simple and effective scheme for frequency detection (FM and FSK demodulators) is suggested by system design considerations as well. Signal processing algorithms include also a Costas carrier phase recovery scheme in the case of BPSK signal and data transition tracking loop for the bit clock recovery. Test results address this solution as one of the most suitable for TT&C space application.

Boscagli, G.↗

Fundamental Hardware Design in PVS

The development of Programmable Logic Devices (PLDs) has introduced programming as a primary tool in the development of digital circuits. This work attempts to create a generic verification environment in which designs can be specified and verified using the Prototype Verification System (PVS). This is accomplished by providing library support for general hardware constructs. The environment is intended for use with any PLD and any PLD programming language. The goal of the environment is to allow the easy translation of digital designs to PVS and provide sufficient support to make verification possible without a great deal of effort.

Leathrum, James F., Jr.↗