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At least 73 records · Page 4

Analytical Models

A system-level design and analysis model was developed. This model was conceived to have several key elements: a solar pond thermodynamic performance model, a power generation subsystem model, and an economic analysis element. The basic approach was to create these elements or modules and refine them on an individual basis yet retain the capability to easily couple them into a full system design model. This building block approach allows for maximum flexibility and substitution of refined descriptions as the technology develops. A general overview of interconnecting these subsystem models is presented. The primary program control element will perform the administrative functions of data input, data output, information storage and transfer, and sequential calling of the subsystem models. From the point of view of the requirements of a system design model, a power conversion subsystem model was developed. The goal of the effort was a preliminary subsystem model compatible with the solar pond subsystem model so that a first order system simulation analysis could be performed.

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Constellation Architecture Team-Lunar Scenario 12.0 Habitation Overview

This paper will describe an overview of the Constellation Architecture Team Lunar Scenario 12.0 (LS-12) surface habitation approach and concept performed during the study definition. The Lunar Scenario 12 architecture study focused on two primary habitation approaches: a horizontally-oriented habitation module (LS-12.0) and a vertically-oriented habitation module (LS-12.1). This paper will provide an overview of the 12.0 lunar surface campaign, the associated outpost architecture, habitation functionality, concept description, system integration strategy, mass and power resource estimates. The Scenario 12 architecture resulted from combining three previous scenario attributes from Scenario 4 "Optimized Exploration", Scenario 5 "Fission Surface Power System" and Scenario 8 "Initial Extensive Mobility" into Scenario 12 along with an added emphasis on defining the excursion ConOps while the crew is away from the outpost location. This paper will describe an overview of the CxAT-Lunar Scenario 12.0 habitation concepts and their functionality. The Crew Operations area includes basic crew accommodations such as sleeping, eating, hygiene and stowage. The EVA Operations area includes additional EVA capability beyond the suitlock function such as suit maintenance, spares stowage, and suit stowage. The Logistics Operations area includes the enhanced accommodations for 180 days such as enhanced life support systems hardware, consumable stowage, spares stowage, interconnection to the other habitation elements, a common interface mechanism for future growth, and mating to a pressurized rover or Pressurized Logistics Module (PLM). The Mission & Science Operations area includes enhanced outpost autonomy such as an IVA glove box, life support, medical operations, and exercise equipment.

Kennedy, Kriss J.↗

Multibus-based parallel processor for simulation

A Multibus-based parallel processor simulation system is described. The system is intended to serve as a vehicle for gaining hands-on experience, testing system and application software, and evaluating parallel processor performance during development of a larger system based on the horizontal/vertical-bus interprocessor communication mechanism. The prototype system consists of up to seven Intel iSBC 86/12A single-board computers which serve as processing elements, a multiple transmission controller (MTC) designed to support system operation, and an Intel Model 225 Microcomputer Development System which serves as the user interface and input/output processor. All components are interconnected by a Multibus/IEEE 796 bus. An important characteristic of the system is that it provides a mechanism for a processing element to broadcast data to other selected processing elements. This parallel transfer capability is provided through the design of the MTC and a minor modification to the iSBC 86/12A board. The operation of the MTC, the basic hardware-level operation of the system, and pertinent details about the iSBC 86/12A and the Multibus are described.

Ogrady, E. P.↗

Multiphase complete exchange on Paragon, SP2 and CS-2

The overhead of interprocessor communication is a major factor in limiting the performance of parallel computer systems. The complete exchange is the severest communication pattern in that it requires each processor to send a distinct message to every other processor. This pattern is at the heart of many important parallel applications. On hypercubes, multiphase complete exchange has been developed and shown to provide optimal performance over varying message sizes. Most commercial multicomputer systems do not have a hypercube interconnect. However, they use special purpose hardware and dedicated communication processors to achieve very high performance communication and can be made to emulate the hypercube quite well. Multiphase complete exchange has been implemented on three contemporary parallel architectures: the Intel Paragon, IBM SP2 and Meiko CS-2. The essential features of these machines are described and their basic interprocessor communication overheads are discussed. The performance of multiphase complete exchange is evaluated on each machine. It is shown that the theoretical ideas developed for hypercubes are also applicable in practice to these machines and that multiphase complete exchange can lead to major savings in execution time over traditional solutions.

Bokhari, Shahid H.↗

High performance interconnection between high data rate networks

The bridge/gateway system needed to interconnect a wide range of computer networks to support a wide range of user quality-of-service requirements is discussed. The bridge/gateway must handle a wide range of message types including synchronous and asynchronous traffic, large, bursty messages, short, self-contained messages, time critical messages, etc. It is shown that messages can be classified into three basic classes, synchronous and large and small asynchronous messages. The first two require call setup so that packet identification, buffer handling, etc. can be supported in the bridge/gateway. Identification enables resequences in packet size. The third class is for messages which do not require call setup. Resequencing hardware based to handle two types of resequencing problems is presented. The first is for a virtual parallel circuit which can scramble channel bytes. The second system is effective in handling both synchronous and asynchronous traffic between networks with highly differing packet sizes and data rates. The two other major needs for the bridge/gateway are congestion and error control. A dynamic, lossless congestion control scheme which can easily support effective error correction is presented. Results indicate that the congestion control scheme provides close to optimal capacity under congested conditions. Under conditions where error may develop due to intervening networks which are not lossless, intermediate error recovery and correction takes 1/3 less time than equivalent end-to-end error correction under similar conditions.

Foudriat, E. C.↗

A parallel householder tridiagonalization stratagem using scattered row decomposition

Householder's method for tridiagonalizing a real symmetric matrix, a major step in evaluating eigenvalues of the matrix, is modified into a parallel algorithm for a concurrent machine of message passing type. Each processor of the concurrent machine has its own CPU, communications control and local memory. Messages are passed through connections between processors. Although the basic algorithm is inherently serial, the computations can be spread over all processors by scattering different rows of the matrix into processors, hence the term 'Scattered Row Decomposition'. The steps in the serial and the parallel algorithms are identified. Expressions for efficiency and speedup are given in terms of problem and machine parameters. For a concurrent machine of ring type interconnection, a selected representative problem of large order exhibits efficiency approaching 66 per cent.

Chang, H. Y.↗

Constellation Architecture Team-Lunar: Lunar Habitat Concepts

This paper will describe lunar habitat concepts that were defined as part of the Constellation Architecture Team-Lunar (CxAT-Lunar) in support of the Vision for Space Exploration. There are many challenges to designing lunar habitats such as mission objectives, launch packaging, lander capability, and risks. Surface habitats are required in support of sustaining human life to meet the mission objectives of lunar exploration, operations, and sustainability. Lunar surface operations consist of crew operations, mission operations, EVA operations, science operations, and logistics operations. Habitats are crewed pressurized vessels that include surface mission operations, science laboratories, living support capabilities, EVA support, logistics, and maintenance facilities. The challenge is to deliver, unload, and deploy self-contained habitats and laboratories to the lunar surface. The CxAT-Lunar surface campaign analysis focused on three primary trade sets of analysis. Trade set one (TS1) investigated sustaining a crew of four for six months with full outpost capability and the ability to perform long surface mission excursions using large mobility systems. Two basic habitat concepts of a hard metallic horizontal cylinder and a larger inflatable torus concept were investigated as options in response to the surface exploration architecture campaign analysis. Figure 1 and 2 depicts the notional outpost configurations for this trade set. Trade set two (TS2) investigated a mobile architecture approach with the campaign focused on early exploration using two small pressurized rovers and a mobile logistics support capability. This exploration concept will not be described in this paper. Trade set three (TS3) investigated delivery of a "core' habitation capability in support of an early outpost that would mature into the TS1 full outpost capability. Three core habitat concepts were defined for this campaign analysis. One with a four port core habitat, another with a 2 port core habitat, and the third investigated leveraging commonality of the lander ascent module and airlock pressure vessel hard shell. The paper will describe an overview of the various habitat concepts and their functionality. The Crew Operations area includes basic crew accommodations such as sleeping, eating, hygiene and stowage. The EVA Operations area includes additional EVA capability beyond the suit-port airlock function such as redundant airlock(s), suit maintenance, spares stowage, and suit stowage. The Logistics Operations area includes the enhanced accommodations for 180 days such as closed loop life support systems hardware, consumable stowage, spares stowage, interconnection to the other Hab units, and a common interface mechanism for future growth and mating to a pressurized rover. The Mission & Science Operations area includes enhanced outpost autonomy such as an IVA glove box, life support, and medical operations.

Toups, Larry↗

Magma production and migration within the moon

Partial melting is likely to have occurred throughout much of the moon due to heating during accretion and the volumetric heating of radioactive isotopes. Important problems that have received relatively little attention concern the migration of the resulting magmas to form surface or near surface volcanic rock. In the paper the basic mechanism for the migration of the magma through the lunar asthenosphere is considered. A porous flow model is proposed. The magma behaves like a liquid flowing through a porous matrix. The volume fraction of liquid present determines the saturated porosity. The differential buoyancy of the magma drives it upwards. It is shown that the per cent partial melt in the lunar interior will only slightly exceed that required to provide interconnecting porosity. Assuming that the radioactive isotopes are preferentially segregated into the magma, the time dependence of the partial melting of the lunar interior is found. It is shown that the total degree of partial melting of the deep lunar interior is likely to be between five and ten per cent.

Turcotte, D. L.↗

A Parallel Multigrid Solver for Viscous Flows on Anisotropic Structured Grids

This paper presents an efficient parallel multigrid solver for speeding up the computation of a 3-D model that treats the flow of a viscous fluid over a flat plate. The main interest of this simulation lies in exhibiting some basic difficulties that prevent optimal multigrid efficiencies from being achieved. As the computing platform, we have used Coral, a Beowulf-class system based on Intel Pentium processors and equipped with GigaNet cLAN and switched Fast Ethernet networks. Our study not only examines the scalability of the solver but also includes a performance evaluation of Coral where the investigated solver has been used to compare several of its design choices, namely, the interconnection network (GigaNet versus switched Fast-Ethernet) and the node configuration (dual nodes versus single nodes). As a reference, the performance results have been compared with those obtained with the NAS-MG benchmark.

Prieto, Manuel↗

Efficient parallel architecture for highly coupled real-time linear system applications

A systematic procedure is developed for exploiting the parallel constructs of computation in a highly coupled, linear system application. An overall top-down design approach is adopted. Differential equations governing the application under consideration are partitioned into subtasks on the basis of a data flow analysis. The interconnected task units constitute a task graph which has to be computed in every update interval. Multiprocessing concepts utilizing parallel integration algorithms are then applied for efficient task graph execution. A simple scheduling routine is developed to handle task allocation while in the multiprocessor mode. Results of simulation and scheduling are compared on the basis of standard performance indices. Processor timing diagrams are developed on the basis of program output accruing to an optimal set of processors. Basic architectural attributes for implementing the system are discussed together with suggestions for processing element design. Emphasis is placed on flexible architectures capable of accommodating widely varying application specifics.

Carroll, Chester C.↗

A Large-Grain Mapping Approach for Multiprocessor Systems Through Data Flow Model Ph.D. Thesis

A large-grain level mapping method is presented of numerical oriented applications onto multiprocessor systems. The method is based on the large-grain data flow representation of the input application and it assumes a general interconnection topology of the multiprocessor system. The large-grain data flow model was used because such representation best exhibits inherited parallelism in many important applications, e.g., CFD models based on partial differential equations can be presented in large-grain data flow format, very effectively. A generalized interconnection topology of the multiprocessor architecture is considered, including such architectural issues as interprocessor communication cost, with the aim to identify the 'best matching' between the application and the multiprocessor structure. The objective is to minimize the total execution time of the input algorithm running on the target system. The mapping strategy consists of the following: (1) large-grain data flow graph generation from the input application using compilation techniques; (2) data flow graph partitioning into basic computation blocks; and (3) physical mapping onto the target multiprocessor using a priority allocation scheme for the computation blocks.

Kim, Hwa-Soo↗

Tool for Inspecting Alignment of Twinaxial Connectors

A proposed tool would be used to inspect alignments of mating twinaxial-connector assemblies on interconnecting wiring harnesses. More specifically, the tool would be used to inspect the alignment of each contact pin of each connector on one assembly with the corresponding socket in the corresponding connector on the other assembly. It is necessary to inspect the alignment because if mating of the assemblies is attempted when any pin/socket pair is misaligned beyond tolerance, the connection will not be completed and the dielectric material in the socket will be damaged (see Figure 1). Although the basic principle of the tool is applicable to almost any type of mating connector assemblies, the specific geometry of the tool must match the pin-and-socket geometry of the specific mating assemblies to be inspected. In the original application for which the tool was conceived, each of the mating assemblies contains eight twinaxial connectors; the pin diameter is 0.014 in. (.0.35 mm), and the maximum allowable pin/socket misalignment is 0.007 in. (.0.18 mm). Incomplete connections can result in loss of flight data within the functional path to the space shuttle crew cockpit displays. The tool (see Figure 2) would consist mainly of a transparent disk with alignment clocking tabs that can be fitted onto either connector assembly. Sets of circles or equivalent reference markings are affixed to the face of the tool, located at the desired positions of the mating contact pairs. An inspector would simply fit the tool onto a connector assembly, engaging the clocking tabs until the tool fits tightly. The inspector would then align one set of circles positioning a line of sight perpendicular to one contact within the connector assembly. Mis alignments would be evidenced by the tip of a pin contact straying past the inner edge of the circle. Socket contact misalignments would be evidenced by a crescent-shaped portion of the white dielectric appearing within the circle. The tool could include a variable magnifier plus an illuminator that could be configured so as not to cast shadows.

Smith, Christopher R.↗

Basic avionics module design for general aviation aircraft

The design of an advanced digital avionics system (basic avionics module) for general aviation aircraft operated with a single pilot under IFR conditions is described. The microprocessor based system provided all avionic functions, including flight management, navigation, and lateral flight control. The mode selection was interactive with the pilot. The system used a navigation map data base to provide operation in the current and planned air traffic control environment. The system design included software design listings for some of the required modules. The distributed microcomputer uses the IEEE 488 bus for interconnecting the microcomputer and sensors.

Smyth, R. K.↗

Architecture, performance, and implementation of the tandem banyan fast packet switch

The authors propose a space-division fast packet switch architecture based on banyan interconnection networks, called the tandem banyan switching fabric. It consists of placing banyan networks in tandem, offering multiple paths from each input to each output, thus overcoming in a very simple way the effect of conflicts among packets (to which banyan networks are prone) and achieving output buffering. From a hardware implementation perspective, this architecture is simple in that it consists of several instances of only two VLSI chips, one implementing the banyan network and the other implementing the output buffer function. The basic structure and operation of the tandem banyan switching fabric are described, and its performance is discussed. The authors propose a modification to the basic structure which decreases the hardware complexity of the switch while maintaining its performance. An implementation of the banyan network using a high-performance BiCMOS sea-of-gates on 0.8-micron technology is reported.

Tobagi, Fouad A.↗

The Policy Formation Process: A Conceptual Framework for Analysis

A conceptual framework for analysis which is intended to assist both the policy analyst and the policy researcher in their empirical investigations into policy phenomena is developed. It is meant to facilitate understanding of the policy formation process by focusing attention on the basic forces shaping the main features of policy formation as a dynamic social-political-organizational process. The primary contribution of the framework lies in its capability to suggest useful ways of looking at policy formation reality. It provides the analyst and the researcher with a group of indicators which suggest where to look and what to look for when attempting to analyze and understand the mix of forces which energize, maintain, and direct the operation of strategic level policy systems. The framework also highlights interconnections, linkage, and relational patterns between and among important variables. The framework offers an integrated set of conceptual tools which facilitate understanding of and research on the complex and dynamic set of variables which interact in any major strategic level policy formation process.

Fuchs, E. F.↗

Certification of lightning protection for a full-authority digital engine control

FADEC systems present many challenges to the lightning protection engineer. Verification of the protection-design adequacy for certification purposes presents additional challenges. The basic requirements of the certification plan of a FADEC is to demonstrate compliance with Federal Airworthiness Regulations (FAR) 25.1309 and 25.581. These FARs are intended for transport aircraft, but there are equivalent sections for general aviation aircraft, normal and transport rotorcraft. Military aircraft may have additional requirements. The criteria for demonstration of adequate lightning protection for a FADEC systems include the procedures outlined in FAA Advisory Circular (AC) 20-136, Protection of aircraft electrical/electronic systems against the indirect effects of lightning. As FADEC systems, including the interconnecting wiring, are generally not susceptible to direct attachment of lightning currents, the verification of protection against indirect effects is primarily described.

Dargi, M.↗

Testing interconnected VLSI circuits in the Big Viterbi Decoder

The Big Viterbi Decoder (BVD) is a powerful error-correcting hardware device for the Deep Space Network (DSN), in support of the Galileo and Comet Rendezvous Asteroid Flyby (CRAF)/Cassini Missions. Recently, a prototype was completed and run successfully at 400,000 or more decoded bits per second. This prototype is a complex digital system whose core arithmetic unit consists of 256 identical very large scale integration (VLSI) gate-array chips, 16 on each of 16 identical boards which are connected through a 28-layer, printed-circuit backplane using 4416 wires. Special techniques were developed for debugging, testing, and locating faults inside individual chips, on boards, and within the entire decoder. The methods are based upon hierarchical structure in the decoder, and require that chips or boards be wired themselves as Viterbi decoders. The basic procedure consists of sending a small set of known, very noisy channel symbols through a decoder, and matching observables against values computed by a software simulation. Also, tests were devised for finding open and short-circuited wires which connect VLSI chips on the boards and through the backplane.

Onyszchuk, I. M.↗

Suggestions for Layout and Functional Behavior of Software-Based Voice Switch Keysets

Marshall Space Flight Center (MSFC) provides communication services for a number of real time environments, including Space Shuttle Propulsion support and International Space Station (ISS) payload operations. In such settings, control team members speak with each other via multiple voice circuits or loops. Each loop has a particular purpose and constituency, and users are assigned listen and/or talk capabilities for a given loop based on their role in fulfilling the purpose. A voice switch is a given facility's hardware and software that supports such communication, and may be interconnected with other facilities switches to create a large network that, from an end user perspective, acts like a single system. Since users typically monitor and/or respond to several voice loops concurrently for hours on end and real time operations can be very dynamic and intense, it s vital that a control panel or keyset for interfacing with the voice switch be a servant that reduces stress, not a master that adds it. Implementing the visual interface on a computer screen provides tremendous flexibility and configurability, but there s a very real risk of overcomplication. (Remember how office automation made life easier, which led to a deluge of documents that made life harder?) This paper a) discusses some basic human factors considerations related to keysets implemented as application software windows, b) suggests what to standardize at the facility level and what to leave to the user's preference, and c) provides screen shot mockups for a robust but reasonably simple user experience. Concepts apply to keyset needs in almost any type of operations control or support center.

Scott, David W.↗