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At least 73 records · Page 4

Temperature Mapping of Stacked Silicon Dies from X-Ray-Diffraction Intensities

Increasing power densities in integrated circuits have led to an increased prevalence of thermal hotspots in integrated circuits. Tracking these thermal hotspots is imperative to prevent circuit failures. In three- dimensional (3D) integrated circuits, conventional surface techniques like infrared thermometry are unable to measure the 3D temperature distribution, and optical and magnetic resonance techniques are difficult to apply due to the presence of metals and large current densities. X-rays offer a high penetration depth and can be used to probe 3D structures. We report a method utilizing the temperature dependence of x-ray-diffraction intensity via the Debye-Waller factor to simultaneously map the temperature of individual silicon dies in a stack. Here, utilizing beamline 1-ID-E at the Advanced Photon Source (Argonne), we demonstrate, for each individual silicon die, a temperature resolution of 3 K, a spatial resolution of 100 × 400 μm 2 , and a temporal resolution of 20 s. Utilizing a sufficiently high-intensity laboratory source, e.g., from a liquid-anode source, this method can be scaled down to laboratories for noninvasive temperature mapping of 3D integrated circuits.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Solution-processable integrated CMOS circuits based on colloidal CuInSe2 quantum dots

Abstract The emerging technology of colloidal quantum dot electronics provides an opportunity for combining the advantages of well-understood inorganic semiconductors with the chemical processability of molecular systems. So far, most research on quantum dot electronic devices has focused on materials based on Pb- and Cd chalcogenides. In addition to environmental concerns associated with the presence of toxic metals, these quantum dots are not well suited for applications in CMOS circuits due to difficulties in integrating complementary n - and p -channel transistors in a common quantum dot active layer. Here, we demonstrate that by using heavy-metal-free CuInSe 2 quantum dots, we can address the problem of toxicity and simultaneously achieve straightforward integration of complimentary devices to prepare functional CMOS circuits. Specifically, utilizing the same spin-coated layer of CuInSe 2 quantum dots, we realize both p - and n -channel transistors and demonstrate well-behaved integrated logic circuits with low switching voltages compatible with standard CMOS electronics.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Strong Zero Modes in Integrable Quantum Circuits

It is a classic result that certain interacting integrable spin chains host robust edge modes known as strong zero modes (SZMs). In this Letter, we extend this result to the Floquet setting of local quantum circuits, focusing on a prototypical model providing an integrable Trotterization for the evolution of the XXZ Heisenberg spin chain. By exploiting the algebraic structures of integrability, we show that an exact SZM operator can be constructed for these integrable quantum circuits in certain regions of parameter space. Our construction, which recovers a well-known result by Paul Fendley in the continuous-time limit, relies on a set of commuting transfer matrices known from integrability, and allows us to easily prove important properties of the SZM, including normalizabilty. Our approach is different from previous methods and could be of independent interest even in the Hamiltonian setting. Furthermore, our predictions, which are corroborated by numerical simulations of infinite-temperature autocorrelation functions, are potentially interesting for implementations of the XXZ quantum circuit on available quantum platforms.

1-dimensional spin chains↗

Nitride-Oxide-Metal Heterostructure with Self-Assembled Core–Shell Nanopillar Arrays: Effect of Ordering on Magneto-Optical Properties

Magneto-optical (MO) coupling incorporates photon-induced change of magnetic polarization that can be adopted in ultrafast switching, optical isolators, mode convertors, and optical data storage components for advanced optical integrated circuits. However, integrating plasmonic, magnetic, and dielectric properties in one single material system poses challenges since one natural material can hardly possess all these functionalities. Here, co-deposition of a three-phase heterostructure composed of a durable conductive nitride matrix with embedded core–shell vertically aligned nanopillars, is demonstrated. Additionally, the unique coupling between ferromagnetic NiO core and atomically sharp plasmonic Au shell enables strong MO activity out-of-plane at room temperature. Further, a template growth process is applied, which significantly enhances the ordering of the nanopillar array. The ordered nanostructure offers two schemes of spin polarization which result in stronger antisymmetry of Kerr rotation. The presented complex hybrid metamaterial platform with strong magnetic and optical anisotropies is promising for tunable and modulated all-optical-based nanodevices.

36 MATERIALS SCIENCE↗

Final Technical Report - Rapid Surface Microanalysis using a Low Temperature Plasma

This project focused on improving our current understanding and scientific knowledge in the area of plasma-surface interactions and plasma assisted material synthesis related to advanced microelectronics and nanotechnology. Current challenges include: controlling the interaction of Low Temperature Plasma (LTP) with a single layer of atoms to manufacture integrated circuits, continued miniaturization of integrated circuits, LTP processing of material surfaces and thin films to enable industrial scale fabrication of advanced microelectronics, synthesis of new materials, nanomaterials, nanotubes, and complex materials, Technology developed in this subtopic is of value to either (i) enable scans of surfaces (~1 sq. cm area) using various microscopies (electron, optical, other) at high resolution (micron or sub-micron resolution) rapidly (hours or days rather than years to complete a high-resolution scan of such a large surface area), or (ii) enable scans of surfaces (~1 sq. cm area) using various microscopies (electron, optical, other) at relatively low resolution rapidly, then apply algorithms to select spots for micron-scale imaging. Sputtering occurs when particles of a solid material are ejected from its surface by energetic particles from a plasma. While the degradation of the solid material and the subsequent deposition of the ejected material onto vulnerable surfaces are the usual subjects of sputtering studies, plasma science has yet to be combined with sputtering to create new diagnostics devices and systems. Small changes in the design of the plasma discharge device make it possible to create broad plasma beams for rapid scanning or small plasma beams to obtain the distribution of ejected elements with micron resolution. In the high-resolution use, the ion flux is extracted from the gas-discharge plasma and focused by a spherical emission surface to micron sizes onto the target specimen, providing very local sputtering and local elemental analysis. We call this “self-focusing”. The radiation from the excited and ionized sputtered atoms is recorded by a spectrometer through a window and fiberglass cable and analyzed with standard software packages used for optical glow discharge spectroscopy. Computer simulations of beam formation were used to verify and optimize the designs to be tested. A prototype was designed, constructed, and used to start experiments of beam formation.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Discrete time analog front end circuit implemented in a receiver device

A device can comprise a peaked integrator circuit that generates an output signal from a continuous time signal based on a sub rate clock timing cycle. The device can further comprise a track and hold circuit coupled to the output of the peaked integrator that generates a held discrete time signal from the output of the peaked integrator based on a second sub rate clock timing cycle that is offset in time from the sub rate clock timing cycle by a single time unit interval. The device can further comprise an integrator circuit coupled to an output of the track and hold circuit that integrates the held discrete time signal, based on the second sub rate clock timing cycle that is offset in time from the sub rate clock timing cycle by a single time unit interval.

42 ENGINEERING↗

Internship Work Report

I worked on two projects during my summer internship at Sandia. My official title was “Intern - Mission Tech Electrical Eng./Computer Eng.- R&D Undergraduate Summer.” I worked at the central location, which is Albuquerque, New Mexico. The department you are placed in at Sandia doesn’t always correspond to the people you will be working with. For example, I only directly worked with one person from my department this summer. On one of my projects, I worked with a diverse team of engineers from many different departments. On my other project, I mainly worked with two departments, as the project had two distinct parts. As mentioned earlier, I worked on two projects during my summer at Sandia. The first project focused on a lightweight embedded controller in an advanced FPGA System-on-Chip for radar signal processing applications. The term “controller” refers to a hardware device that directs the flow of data between two entities. An FPGA is a reprogrammable integrated circuit (as opposed to an integrated circuit with one purpose). An FPGA was used on this project so in order to protype various ideas for our System-on-Chip. My role on the project was to implement designs on the fabric of the FPGA and design a state machine (written in C) for the processor. My second project was also heavily involved with embedded systems but had a different application. It focused on using a Newton-Raphson control algorithm to stabilize an inverted pendulum using a novel microcontroller. The pendulum dynamics were derived, and it was successfully simulated in MATLAB. I worked on integrating the microcontroller with the inverted pendulum machinery, and converting the Newton-Raphson control algorithm from MATLAB into C. The inverted pendulum was successfully stabilized using a simple PID controller and industry-standard microcontroller. The project is still ongoing, and the team is gearing up for more tests using the novel Newton-Raphson control algorithm and novel microcontroller

42 ENGINEERING↗

Efficient excitation and control of integrated photonic circuits with virtual critical coupling

Critical coupling in integrated photonic devices enables the efficient transfer of energy from a waveguide to a resonator, a key operation for many applications. This condition is achieved when the resonator loss rate is equal to the coupling rate to the bus waveguide. Carefully matching these quantities is challenging in practice, due to variations in the resonator properties resulting from fabrication and external conditions. Here, we demonstrate that efficient energy transfer to a non-critically coupled resonator can be achieved by tailoring the excitation signal in time. We rely on excitations oscillating at complex frequencies to load an otherwise overcoupled resonator, demonstrating that a virtual critical coupling condition is achieved if the imaginary part of the complex frequency equals the mismatch between loss and coupling rate. We probe a microring resonator with tailored pulses and observe a minimum intensity transmission T = 0.11 in contrast to a continuous-wave transmission T = 0.58, corresponding to 8 times enhancement of intracavity intensity. Our technique opens opportunities for enhancing and controlling on-demand light-matter interactions for linear and nonlinear photonic platforms.

42 ENGINEERING↗

Aligned carbon nanotubes for 1,000x improvement in computing (CRADA Final Report)

As part of the Cyclotron Road program, the Aligned Carbon team worked to improve and bring to market their technology to manufacture carbon nanotubes (CNTs) for integrated circuits. There are multiple applications which can benefit from the use of CNT based transistors in integrated circuits, including high performance computing, RF data transmission, and biosensing. Each of these applications faces a problem of poor starting CNT material to come to market. Aligned Carbon offers material with the highest ceiling of performance based around a fully aligned, uniform, on-wafer growth of CNTs and our proprietary purification process to remove metallic CNTs leaving only the semi-conducting ones behind. Further, Aligned Carbon has been guided by scalable manufacturing processes that will fit seamlessly into the integrated circuit foundry model of chip fabrication.

36 MATERIALS SCIENCE↗

Integrative Circuit-Host Modeling of a Genetic Switch in Varying Environments

Synthetic biology is advancing into a new phase where real-world applications are emphasized. There is hence an urgent need for mathematical modeling that can quantitatively describe the behaviors of genetic devices in natural, fluctuating environments. We utilize an integrative circuit-host modeling framework to examine the dynamics of a genetic switch and its host cell in varying environments. For both steady-state and transient cases, we find increasing nutrient reduces the bistability region of the phase space and eventually drives the switch from bistability to monostability. In response, cellular growth and proteome partitioning experience the same transition. Antibiotic perturbations cause the similar circuit and host responses as nutrient variations. However, one difference is the trend of growth rate, which augments with nutrient but declines with antibiotic levels. The framework provides a mechanistic scheme to account for both the dynamic and static characteristics of the circuit-host system upon environmental perturbations, underscoring the intimacy of gene circuits and their hosts and elucidating the complexity of circuit behaviors arising from environmental variations.

59 BASIC BIOLOGICAL SCIENCES↗

Integrated silicon carbide diode rectifier circuits

An integrated silicon carbide rectifier circuit with an on chip isolation diode. The isolation diode can be a channel-to-substrate isolation diode or a channel to channel isolation diode. the circuit teaches an integrated diode rectification circuit for use with a two phase center tap transformer having a first voltage output, a second voltage output, and a center tap output with a single chip having a first half-wave rectifier connected to the first voltage output, a second half-wave rectifier connected to the second voltage output, and a floating substrate connection connected to the center tap output and an on chip first channel-to-substrate isolation diode electrically connected between the first half-wave rectifier and the floating substrate.

Barlow, Matthew↗

Post-processing of phase change material in a zero-change commercial silicon photonic process

Integration of phase change material (PCM) with photonic integrated circuits can transform large-scale photonic systems by providing non-volatile control over phase and amplitude. The next generation of commercial silicon photonic processes can benefit from the addition of PCM to enable ultra-low power, highly reconfigurable, and compact photonic integrated circuits for large-scale applications. Despite all the advantages of PCM-based photonics, today’s commercial foundries do not provide them in their silicon photonic processes yet. We demonstrate the first-ever electrically programmable PCM device that is monolithically post-processed in a commercial foundry silicon photonics process using a few fabrication steps and coarse-resolution photolithography. These devices achieved 1.4 dB/μm of amplitude switching contrast using a thin layer of 12.5 nm GeSbTe in this work. We have also characterized the reconfiguration speed as well as repeatability of these devices over 20,000 switching cycles. Our solution enables non-volatile photonic VLSI systems that can be fabricated at low cost and high reliability in a commercial foundry process, paving the way for the development of non-volatile programmable photonic integrated circuits for a variety of emerging applications.

Optics↗

System-on-Chip approach microwave diagnostics development for burning plasma

System-on-chip (SoC) millimeter wave integrated circuit technology has been developed and employed in chip heterodyne radiometers in Electron Cyclotron Emission Imaging (ECEI) and Microwave Imaging Reflectometer (MIR) on the DIII-D tokamak for 2D electron temperature and density fluctuation diagnostics. The W-band (75-110 GHz) ECEI system has been employed with 20 poloidal horn receiver modules with customized monolithic integrated circuit chips and internal local oscillator coupling path. The new SoC approach demonstrates > 30 dB additional gain on the receiver and 95% electronics noise suppression compared to the previous Schottky diode mixer array . An F-band (110-140 GHz) receiver chip has been developed to measure MHD and turbulence behavior on the DIII-D high-field side, such as Alfven eigenmodes. Furthermore, it can image pedestal structure evolution on fusion facilities with stronger magnetic fields, such as ASDEX-U, EAST, HL-2M, and LHD. The F-band chip performance has been tested in the laboratory. Also, V-band (55-75 GHz) transmitter and receiver modules (55-75 GHz) have been developed for DIII-D and NSTX-U Furthermore, microwave Imaging Reflectometer (MIR) application suitability for 2D density fluctuation imaging on the pedestal region.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

High‐Performance Zinc Tin Oxide TFTs with Active Layers Deposited by Atomic Layer Deposition

Abstract New deposition techniques for amorphous oxide semiconductors compatible with silicon back end of line manufacturing are needed for 3D monolithic integration of thin‐film electronics. Here, three atomic layer deposition (ALD) processes are compared for the fabrication of amorphous zinc tin oxide (ZTO) channels in bottom‐gate, top‐contact n‐channel transistors. As‐deposited ZTO films, made by ALD at 150–200 °C, exhibit semiconducting, enhancement‐mode behavior with electron mobility as high as 13 cm 2 V −1 s −1 , due to a low density of oxygen‐related defects. ZTO deposited at 200 °C using a hybrid thermal‐plasma ALD process with an optimal tin composition of 21%, post‐annealed at 400 °C, shows excellent performance with a record high mobility of 22.1 cm 2 V –1 s –1 and a subthreshold slope of 0.29 V dec –1 . Increasing the deposition temperature and performing post‐deposition anneals at 300–500 °C lead to an increased density of the X‐ray amorphous ZTO film, improving its electrical properties. By optimizing the ZTO active layer thickness and using a high‐ k gate insulator (ALD Al 2 O 3 ), the transistor switching voltage is lowered, enabling electrical compatibility with silicon integrated circuits. This work opens the possibility of monolithic integration of ALD ZTO‐based thin‐film electronics with silicon integrated circuits or onto large‐area flexible substrates.

Allemang, Christopher R.↗

Synchronous micromechanically resonant programmable photonic circuits

Abstract Programmable photonic integrated circuits (PICs) are emerging as powerful tools for control of light, with applications in quantum information processing, optical range finding, and artificial intelligence. Low-power implementations of these PICs involve micromechanical structures driven capacitively or piezoelectrically but are often limited in modulation bandwidth by mechanical resonances and high operating voltages. Here we introduce a synchronous, micromechanically resonant design architecture for programmable PICs and a proof-of-principle 1×8 photonic switch using piezoelectric optical phase shifters. Our design purposefully exploits high-frequency mechanical resonances and optically broadband components for larger modulation responses on the order of the mechanical quality factor Q m while maintaining fast switching speeds. We experimentally show switching cycles of all 8 channels spaced by approximately 11 ns and operating at 4.6 dB average modulation enhancement. Future advances in micromechanical devices with high Q m , which can exceed 10000, should enable an improved series of low-voltage and high-speed programmable PICs.

42 ENGINEERING↗

High-speed programmable photonic circuits in a cryogenically compatible, visible–near-infrared 200 mm CMOS architecture

Abstract Recent advances in photonic integrated circuits have enabled a new generation of programmable Mach–Zehnder meshes (MZMs) realized by using cascaded Mach–Zehnder interferometers capable of universal linear-optical transformations on N input/output optical modes. MZMs serve critical functions in photonic quantum information processing, quantum-enhanced sensor networks, machine learning and other applications. However, MZM implementations reported to date rely on thermo-optic phase shifters, which limit applications due to slow response times and high power consumption. Here we introduce a large-scale MZM platform made in a 200 mm complementary metal–oxide–semiconductor foundry, which uses aluminium nitride piezo-optomechanical actuators coupled to silicon nitride waveguides, enabling low-loss propagation with phase modulation at greater than 100 MHz in the visible–near-infrared wavelengths. Moreover, the vanishingly low hold-power consumption of the piezo-actuators enables these photonic integrated circuits to operate at cryogenic temperatures, paving the way for a fully integrated device architecture for a range of quantum applications.

47 OTHER INSTRUMENTATION↗

Method and apparatus for providing wear leveling

Exemplary embodiments provide wear spreading among die regions (i.e., one or more circuits) in an integrated circuit or among dies by using operating condition data in addition to or instead of environmental data such as temperature data, from each of a plurality of die regions. Control logic produces a cumulative amount of time each of the plurality of die regions has spent at an operating condition based on operating condition data wherein the operating condition data is based on at least one of the following operating characteristics: frequency of operation of the plurality of die regions, an operating voltage of the plurality of die regions, an activity level of the plurality of die regions, a timing margin of the plurality of die regions, and a number of detected faults of the plurality of die regions. The method and apparatus spreads wear among the plurality of same type of die regions by controlling task execution among the plurality of die regions using the die wear-out data.

Raasch, Steven↗