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At least 73 records · Page 4

Leveraging the Run 3 experience for the evolution of the ATLAS software-based readout towards HL-LHC

The High-Luminosity Large Hadron Collider (HL-LHC), scheduled to start operating in 2030, aims to increase the instantaneous luminosity by a factor of 10 compared to the LHC. To match this increase, the ATLAS experiment has been implementing a major upgrade program divided into two phases. The first phase (Phase-I), completed in 2022, introduced new trigger and detector systems that have been used during the Run 3 data taking period which began in July 2022. These systems have been used in conjunction with the new Data Acquisition (DAQ) Readout system, based on a software application called Software Readout Driver (SW ROD). SW ROD receives and aggregates data from the front-end electronics via the Front-End Link eXchange (FELIX) system and passes aggregated data fragments to the High-Level Trigger (HLT) system. During Run 3, SW ROD operates in parallel with the legacy Readout System (ROS) at an input rate of 100 kHz. For the Phase-II, the legacy ROS will be completely replaced with a new system based on the next generation of FELIX and an evolution of the SW ROD application called Data Handler. Data Handler has the same functional requirements as SW ROD but must be able to operate at an input rate of 1 MHz. To facilitate this evolution the SW ROD has been implemented using plugin architecture. This contribution presents the design and implementation of the SW ROD application for Run 3, along with the strategy for its evolution to the Phase-II Readout system. It discusses the lessons learned during Run 3 and describes the challenges that have been addressed to accomplish the demanding performance requirements of HL-LHC.

Kolos, Serguei [Univ. of California, Irvine, CA (U↗

A first look at AS-ROC: a Si-Ge integrated chip readout for fast timing

Abstract Advances in timing detector technology require new specialized readout electronics. Applications demand below 10 ps time of arrival resolution and low power for a low repetition rate. A possible path to achieve O(10 ps) time resolution is an integrated chip using Silicon Germanium (SiGe) technology. Using DoE SBIR funding, Anadyne, Inc., in collaboration with UC Santa Cruz, has developed a prototype SiGe front-end readout chip optimized for low power and timing resolution. Two versions of the chip were produced with performance in simulation: a more power version with 10 ps resolution at 5 fC with 1.1 mW/channel, and a less power version with 10 ps resolution at 8 fC with 0.6 mW/channel.The chip was produced at Tower Semiconductor with 350 nm technology. The ASIC from the prototype run shows good performance: a rise time of 0.7–1 ns and 25 mV per fC response with RMS noise <1 mV. Simulation and results from the prototype will be reported in this paper.

Instruments & Instrumentation↗

SAMPA Based Streaming Readout Data Acquisition Prototype

We have assembled a small-scale streaming data acquisition system based on the SAMPA front-end ASIC. The 32-channel SAMPA chip was designed for the high-luminosity upgrade of the ALICE Time Projection Chamber (TPC) detector at the CERN Large Hadron Collider. The goals of the prototype system are to determine if the SAMPA chip is appropriate for use in detector systems at Jefferson Lab, and to gain experience with the hardware and software required to deploy streaming data acquisition systems in nuclear physics experiments. The 800 channel system is composed of components used in the ALICE TPC data acquisition upgrade. Five front-end cards (FEC) support five SAMPA chips each. SAMPA data streams on an FEC are concentrated into two high-speed (4.48 Gb/s) serial data streams by a pair Gigabit Transceiver ASICs (GBTx). These ten streams (44.8 Gb/s) are transmitted from the FECs over fibers to a PCIe based readout unit. The FPGA engine on the readout unit compresses data for transmission to a server via 100 Gb ethernet. Components on the FECs are radiation tolerant. High data rates can be handled. The system is by design scalable and thus provides a functional prototype for high-rate streaming readout at Jefferson Lab and the future Electron Ion Collider. We have made fundamental measurements (noise, linearity, time resolution) on the SAMPA ASIC. We have also coupled the readout system to a small Gas Electron Multiplier (GEM) detector and have studied its response to cosmic rays. A beam test of the system is planned.

ABBOTT, David↗

Silicon strip defects and their impact on electrical performance of readout electronics

Abstract In preparation for the High Luminosity LHC (HL-LHC) runs, the ATLAS inner detector will be completely replaced with an all silicon Inner Tracker (ITk). Hybrid silicon pixel modules will be used for the innermost tracking layers, and silicon micro-strip detectors will be used the outer layers of the tracker. During the production of the detector, the sensors, readout electronics, and other components will undergo a series of quality control (QC) and quality assurance tests. Defects in the fabrication of the sensors will be flagged early in the manufacturer's and ATLAS QC tests. A study of the influence of sensor defects was performed to assess the characteristics of these defects in completed modules, and whether any defect posed a risk to the operation of the front-end readout electronics. All defects were found to have no impact on the performance of the front-end readout electronics for healthy amplifier channels, and defects that short the coupling between the strip implant and the metal readout electrode were only noticeable for strip leakage currents in excess of 250 nA, beyond the end-of-life currents expected for most sensors at the HL-LHC.

Instruments & Instrumentation↗

A Generic High Bandwidth Data Acquisition Card for Physics Experiments

In high energy physics and nuclear physics experiments particularly the ones based on particle accelerator, the data rate from the detector is usually in the order of Terabytes per second. This high throughput data from detector front-end electronics need to be transmitted to the back-end computing farm for high level event selection and building. A Data Acquisition (DAQ) system with features of high-density, scalable, easily upgradeable is crucial to simplify the readout architecture of whole experiment. This paper will introduce the design of a generic high bandwidth PCIe card which can be used as the important input output card in a scalable DAQ system. It can factorize front-end electronics from data handling, and reduce amount of custom hardware in favor of scalable detectorindependent commercial hardware and software. Besides the 48 channels of bidirectional high speed fiber optical links with frontends, it also supports to synchronize with the experiment timing system, and to fanout the clock and trigger information with a fixed latency to the front-end electronics.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Design of a Time-to-Digital Converter ASIC and a mini-DAQ system for the Phase-2 upgrade of the ATLAS Monitored Drift Tube detector

We present the second prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for High-Luminosity LHC operations. Compared to the first prototype, triple modular redundancy has been implemented for the configuration and flow control logic. Here, the total power consumption is increased by less than 10 mW while achieving the same time resolution and channel uniformity. A mini-DAQ system has been built to verify the front-end electronics chain with the new prototype together with other ASICs and boards in triggered mode. Cosmic ray tests with a small-diameter MDT chamber indicate that the configuration and data transmission of the readout electronics perform well. It is expected that this prototype design will be used in the final production.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Electronics for the far-forward CMS muon detector upgrade, ME0

Abstract With the High Luminosity upgrade of the Large Hadron Collider (LHC) we expect increased instantaneous luminosities up to 7.5 × 10 34 cm −2 s −1 , or five times more than the original values. In order to maintain performance of the Compact Muon Solenoid (CMS) experiment under these conditions, ME0 is one of three new muon sub-detectors being added, along with GE1/1 and GE2/1, which use the triple Gas Electron Multiplier (GEM) technology. ME0 is designed to cover the forward region of 2.0 < | η | < 2.8, thus improving muon reconstruction at high background rates by supplementing other overlapping muon subsystems up to | η | = 2.4, while also extending the acceptance for the first time to | η | = 2.8. The readout electronics for ME0 must be designed to accommodate high data rates and be sufficiently radiation hard to operate close to the beamline. The Optohybrid (OH) board for ME0, which reads out data from the front-end VFAT3b ASICs, has therefore been designed to operate without an FPGA (unlike GE1/1 and GE2/1) to ensure radiation hardness. The ME0 OH uses the radiation-hard CERN-designed lpGBT ASIC and VTRx+ optical transceiver module for high bandwidth optical links up to 10.24 Gb/s. The backend system is based on the ATCA standard. The design and development status of the readout electronics for ME0 is presented, along with recent results from integration tests performed using the first prototypes.

Instruments & Instrumentation↗

Integration of the FastIC front-end electronics into the Picosec MicroMegas detector

The Picosec MicroMegas collaboration aims to develop gaseous fast-timing detectors; experimentally, intrinsic time resolutions from around 50 ps to better than 20 ps are obtained, depending on the exact detector configuration. Parts of developments focus on exploring various options of fast-timing multi-channel front-end electronics, to meet the data processing demands of experimental applications. One option is the FastIC, which was developed for reading out positive and negative input polarity sensors with intrinsic amplification. In this paper, the first results from reading out the gaseous Picosec MicroMegas detector with the FastIC are presented. In laboratory studies, a basic description of the data processing chain was performed using a function generator. The results from test beam measurements are used to characterise the timing performance and the charge processing of the combination of FastIC and Picosec MicroMegas, as well as to demonstrate the possibility of a multi-channel detector readout. Although the timing-at-threshold level of the FastIC introduces a time walk of around 1.5 ns, time resolutions of around 50 ps have been achieved.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Cryogenic Front-End ASICs for Low-Noise Readout of Charge Signals

This paper presents design details and measurement results of LArASIC, a front-end application specific integrated circuit (ASIC) designed for low-noise readout of charge signals generated in neutrino study experiments within liquid argon time projection chambers. LArASIC comprises of 16-channels of programmable charge amplification and pulse shaping stages that provide a voltage readout proportional to the input charge and was optimized for operation at liquid argon temperature, i.e., 89 K. The chip was fabricated in a 180 nm CMOS process. Measurements at liquid nitrogen temperature, i.e., 77 K, indicate that the channel outputs have high linearity (INL < 0.1%) within the operating range, an equivalent noise charge of 534 electrons for a peaking time of 1 µs and a detector capacitance of 150 pF, and a worst-case inter-channel cross-talk of 0.35%. The paper also presents design choices made in the process of migrating LArASIC to CHARMS, an ASIC to be fabricated in a 65 nm process that includes all features provided by LArASIC, along with additional digital programmability for improved robustness and flexibility. CHARMS is intended for use in future high-energy physics experiments that require high-resolution charge or light readout with shorter pulse peaking times.

47 OTHER INSTRUMENTATION↗

Quality assurance test of silicon photomultipliers and electronic boards for STAR event plane detector

The event plane detector (EPD), installed in the Solenoid Tracker at the Relativistic Heavy-Ion Collider located at the Brookhaven National Laboratory is a plastic scintillator-based device that measures the reaction centrality and event plane in the forward region of the relativistic heavy-ion collisions. We used silicon photomultiplier (SiPM) arrays to detect the photons produced in the scintillator via the fiber connection. Signals from the SiPM arrays were amplified by the front-end electronic (FEE) board, and sent to the analog-to-digital converter (ADC) boards for further processing via the receiver (RX) board. The full EPD system consisted of 24 super-sectors (SSs); each SS was equipped with two SiPM boards, two FEE boards and two RX boards, and they corresponded to 744 readout channels. All these boards were mass produced at the University of Science and Technology of China, with a dedicated quality assurance (QA) procedures applied to identify any problems before deployment. This article describes the details of the QA method and the related test system. As a result, the QA test results are presented along with the discussions.

EPD↗

Front-End Design for SiPM-Based Monolithic Neutron Double Scatter Imagers

Neutron double scatter imaging exploits the kinematics of neutron elastic scattering to enable emission imaging of neutron sources. Due to the relatively low coincidence detection efficiency of fast neutrons in organic scintillator arrays, imaging efficiency for double scatter cameras can also be low. One method to realize significant gains in neutron coincidence detection efficiency is to develop neutron double scatter detectors which employ monolithic blocks of organic scintillator, instrumented with photosensor arrays on multiple faces to enable 3D position and multi-interaction time pickoff. Silicon photomultipliers (SiPMs) have several advantageous characteristics for this approach, including high photon detection efficiency (PDE), good single photon time resolution (SPTR), high gain that translates to single photon counting capabilities, and ability to be tiled into large arrays with high packing fraction and photosensitive area fill factor. However, they also have a tradeoff in high uncorrelated and correlated noise rates (dark counts from thermionic emissions and optical photon crosstalk generated during avalanche) which may complicate event positioning algorithms. We have evaluated the noise characteristics and SPTR of Hamamatsu S13360-6075 SiPMs with low noise, fast electronic readout for integration into a monolithic neutron scatter camera prototype. The sensors and electronic readout were implemented in a small-scale prototype detector in order to estimate expected noise performance for a monolithic neutron scatter camera and perform proof-of-concept measurements for scintillation photon counting and three-dimensional event positioning.

47 OTHER INSTRUMENTATION↗

Rate-capability of the VMM3a front-end in the RD51 Scalable Readout System

The VMM3a is an Application Specific Integrated Circuit (ASIC), specifically developed for the readout of gaseous detectors. Originally developed within the ATLAS New Small Wheel (NSW) upgrade, it has been successfully integrated into the Scalable Readout System (SRS) of the RD51 collaboration. This allows, to use the VMM3a also in small laboratory set-ups and mid-scale experiments, which make use of Micro-Pattern Gaseous Detectors (MPGDs). As part of the integration of the VMM3a into the SRS, the readout and data transfer scheme was optimised to reach a high rate-capability of the entire readout system and profit from the VMM3a's high single-channel rate-capability of 3.6Mhits/s. The optimisation focused mainly on the handling of the data output stream of the VMM3a, but also on the development of a trigger-logic between the front-end cards and the DAQ computer. In this article, two firmware implementations of the non-ATLAS continuous readout mode are presented, as well as the implementation of the trigger-logic. Afterwards, a short overview on X-ray imaging results is presented, to illustrate the high rate-capability from an application point-of-view.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Event-driven readout development: testing of the EDWARD65P1 chip with integrated event generators

Building on a prototype readout integrated circuit for segmented silicon sensors with the EDWARD event-driven readout architecture, the front-end in each pixel was replaced by a hardware generator to verify readout performance, ensuring no data loss, consistent priority handling, and speed verification. Here, this generator produces Poisson-distributed readout requests with individually tunable rates per pixel via a digitally controlled oscillator. The resulting EDWARD65P1 test ASIC is a 32×32 pixel matrix with a 100 μm pitch, equipped with digital event generators simulating radiation hits at user-defined rates. Test results for this new design are presented.

47 OTHER INSTRUMENTATION↗

Commissioning of the Mu2e tracker DAQ, planning for the Vertical Slice Test and pre-pattern recognition studies

The primary objective of the Mu2e experiment at Fermilab is to search for the neutrino-less coherent $\mu \rightarrow e$ conversion in the field of an aluminum nucleus ($\mu^- \text{Al} \rightarrow e^- \text{Al}$). The signature of this process is a monochromatic Conversion Electron (CE) with an energy of approximately 104.97 MeV \cite{bartoszek2015mu2e}. Within the Standard Model (SM), the branching ratio for this process, including neutrino masses and oscillation, is expected to be less than $\mathcal{O}(10^{-50})$. This value is far beyond current experimental capabilities. However, models of physics beyond the SM predict much higher relative rates, approaching an observable level. The SINDRUM II experiment set an upper limit on muon conversion at $7 \times 10^{-13}$ (90\% CL) on Au target \cite{SINDRUMII:2006dvw}, and the Mu2e collaboration aims to improve this limit by four orders of magnitude. Observing this process would provide a clear evidence of physics beyond the Standard Model. A brief discussion of the theoretical and experimental aspects is provided in Chapter \ref{intr}. Mu2e adopts a sophisticated experimental setup to achieve its goals, further described in Chapter \ref{mu2echapter}. The central part of the Mu2e detector is the tracker, that consists of 18 tracking stations. The tracker must provide excellent momentum resolution, approximately 1 MeV/c, to distinguish the monochromatic CE signal from the background. To minimize the energy losses, a straw tube tracker will be used \cite{bobbb}. Chapter \ref{chaptertrk} provides an overview of the straw tracker design and its working principles. This Thesis presents a comprehensive study of the Mu2e tracker, covering complementary aspects from initial commissioning to optimization and first steps of the calibration processes. My work at Fermilab has been focused on the complete Data Acquisition (DAQ) testing from both hardware and software perspectives. I was involved in the commissioning of the Mu2e DAQ system and the Vertical Slice Test (VST) of the tracker. The VST encompasses the entire testing chain, from the straws to the readout, and to processed data on disk. I was also focused on the offline analysis, especially on pre-pattern recognition studies, to explore the best methods for identifying $\delta$-electrons during the data taking. Chapter \ref{commissioning} details the commissioning of the tracker DAQ system, emphasizing the importance of understanding of the readout process before the data acquisition. This includes validating the readout logic and firmware through Monte Carlo simulations to confirm functionality and buffering, monitoring the quality of the data from the tracker preamplifiers and front-end electronics, and assessing overall DAQ performance to ensure reliability during future calibration and data-taking. Chapter \ref{planning} discusses the initial steps towards the tracker calibration. The ultimate goal is to perform a time calibration of the first assembled station of the tracker using cosmic muons, aiming for a longitudinal hit position resolution better than 4 cm. This involves determining the signal propagation times and channel-to-channel delays. I performed a Monte Carlo study to determine the impact of the station orientation on the quality of the calibration, in particular on the cosmic track reconstruction, focusing on potential biases that could arise. These studies provide essential insights into the operation, optimization, and calibration of the Mu2e tracker system. Given the high data volume expected during Mu2e operations, estimated at approximately 7 PBytes per year, optimizing memory usage and minimizing CPU consumption are critical. A significant challenge lies in effectively flagging $\delta$-electron hits, which are the primary source of hits in the tracker, without compromising the efficiency of CE hit detection and track reconstruction. A detailed study of pre-pattern recognition and a thorough comparison of two $\delta$-electron flagging algorithms is provided in Chapter \ref{delta}. In Chapter \ref{conclusions}, the findings are concisely summarized, offering a comprehensive synthesis of the research and emphasizing the key insights derived from this study.

43 PARTICLE ACCELERATORS↗

Development and construction status of the Mu2e electromagnetic calorimeter mechanical structures

Abstract The Mu2e experiment at Fermilab will search for the CLFV neutrino-less coherent conversion of a muon into an electron in the field of an aluminum nucleus. The observation of this process would be the evidence of physics beyond the Standard Model. Mu2e comprises a straw-tracker, an electromagnetic calorimeter and an external veto for cosmic rays. The calorimeter provides electron identification, a fast trigger and aids track reconstruction. It is a state-of-the-art crystal calorimeter and employs 1340 pure CsI crystals readout by UV-extended SiPM and fast electronics. The design consists of two identical annular disks positioned at the relative distance of 70 cm downstream the target.The hostile Mu2e conditions (total ionizing dose of 12 krad and a neutron fluence of 5 × 10 10 n/cm 2 @ 1 MeVeq (Si)/y, 1 T magnetic field and vacuum level of 10 −4 Torr) posed tight constraints on the mechanical structures and materials choice. The support structure of the two crystal matrices employs two aluminum hollow rings and parts made of open-cell vacuum-compatible carbon fiber. SiPMs and front-end electronics for each crystal are assembled in one mechanical unit inserted in a machined copper holder. The units are supported by a plate made of vacuum-compatible material. The plate integrates the cooling system made of a network of copper lines flowing a low temperature fluid and placed in thermal contact with the copper holders. The DAQ is hosted in aluminum crates positioned on the lateral surface of the disks. The crates also integrate the DAQ electronics cooling system. We review the constraints on the calorimeter structures design, the development of all the structural components, including the simulations that have determined the materials and technological choices and the specifications of the cooling station, components production and quality assurance tests, the procedures for detector assembly, transportation and installation in the experimental area.

Instruments & Instrumentation↗

Large-scale real-time signal processing in physics experiments: the ALICE TPC FPGA pipeline

For LHC Run 3, the ALICE Time Projection Chamber was upgraded to operate in continuous readout mode. Interaction rates of up to 50 kHz in Pb-Pb collisions require real-time processing of more than 3 TB s -1 of raw detector data. This requirement is met by a custom FPGA-based processing pipeline that performs the complete front-end data treatment fully in-stream, including common-mode correction, pedestal subtraction, ion-tail filtering, zero suppression, and dense data packing. A central element of the design is a highly parallel common-mode correction algorithm operating directly on the streaming data. It robustly identifies signal-free readout channels on a time-bin basis and applies pad-dependent scaling to compensate for local variations in capacitive coupling in the GEM readout. In combination with pedestal subtraction and ion-tail filtering, this enables accurate baseline restoration under extreme high-occupancy conditions, preventing signal loss while efficiently suppressing noise prior to zero suppression. The pipeline operates continuously at the full detector bandwidth and reduces the raw input rate of approximately 3 TB s -1 to about 900 GBps for Pb-Pb collisions at the target interaction rate. Overall, it represents a large-scale FPGA-based real-time signal-processing implementation for high-energy physics detector readout.

Digital signal processing (DSP)↗

Design and commissioning of readout electronics for a $K$$^{0}_{L}$ and $μ$ detector at the Belle II experiment

The K-long and muon detector (KLM) constitutes the outer-most volume of the Belle II spectrometer at the interaction region of the SuperKEKB collider in Tsukuba, Japan. The KLM detector was partially upgraded since the Belle experiment by replacing many of its resistive-plate chambers with scintillators containing wavelength-shifting fibers and instrumenting it with silicon photomultipliers. Here, we describe the readout electronics, firmware, and software created to control and acquire data from the scintillators and resistive-plate chambers.

Belle II↗

Overview of the front-end electronics of CMS HGCal - including readout and powering

The end-cap calorimeters of CMS will be upgraded to a single High Granularity Calorimeter (HG-Cal) for the HL-LHC, including both silicon sensors and scintillator tiles with on-tile SiPMs as active elements. The readout of the active elements is performed by an ASIC (HGCROC in 130 nm CMOS technology) that measures the amplitude and arrival time of the signals. The amplitude is measured over a large dynamic range to allow calibration with single particles and the measurement of TeV showers. The time of arrival of high-energy showers will be measured with a precision of around 30 ps. A second pair of “concentrator” ASICs - ECON-T and ECON-D - takes the data from the HGCROC channels and packages them for transmission via optical links to the off-detector electronics. The ECON-T transmits trigger data at 40 MHz, to form part of the level-1 trigger. The ECON-D transmits concentrated data packets at up to 1 MHz, upon reception of a level-1 trigger signal. In addition to these ASICs, HGCal will use modified versions of common HL-LHC electronics developments, for the power chain and the optical control and readout. The dense nature of the HGCal provides additional challenges for the electronic boards and cabling. In this proceedings the overall HGCal front electronics scheme, including the latest performance of the HGCROC and ECON ASICs is presented.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗