Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “device packaging”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS2015

Thermal interface materials selection and application guidelines: in perspective of Xilinx Virtex-5QV thermal management

The heat from high-power microdevices for space, such as Xilinx Virtex 4 and 5 (V4 and V5), has to be removed mainly through conduction in the space vacuum environment. The class-Y type packages are designed to remove the heat from the top of the package, and the most effective method to remove heat from the class-Y type packages is to attach a heat transfer device on the lid of the package and to transfer the heat to frame or chassis. When a heat transfer device is attached to the package lid, the surfaces roughness of the package lid and the heat transfer device reduces the effective contact area between the two. The reduced contact area results in increased thermal contact resistance, and a thermal interface material is required to reduce the thermal contact resistance by filling in the gap between the surfaces of the package lid and the heat transfer device.

Tseng, Stephen↗
NASA NTRS2008

Evaluation of Silicon-on-Insulator HTOP-01 Operational Amplifier for Wide Temperature Operation

Electronics capable of operation under extreme temperatures are required in many of NASA space exploration missions. Aerospace and military applications, as well as some terrestrial industries constitute environments where electronic systems are anticipated to be exposed to extreme temperatures and wide-range thermal swings. Electronics that are able to withstand and operate efficiently in such harsh environments would simplify, if not eliminate, traditional thermal control elements and their associated structures for proper ambient operation. As a result, overall system mass would be reduced, design would be simplified, and reliability would be improved. Electronic parts that are built utilizing silicon-on-insulator (SOI) technology are known to offer better radiation-tolerance compared to their conventional silicon counterparts, provide faster switching, and consume less power. They also exhibit reduced leakage current and, thus, they are often tailored for high temperature operation. These attributes make SOI-based devices suitable for use in harsh environments where extreme temperatures and wide thermal swings are anticipated. A new operational amplifier, based on silicon-on-insulator technology and geared for high temperature well-logging applications, was recently introduced by Honeywell Corporation. This HTOP-01 dual precision operational amplifier is a low power device, operates on a single supply, and has an internal oscillator and an external clocking option [1]. It is rated for operation from -55 C to +225 C with a maximum output current capability of 50 mA. The amplifier chip is designed as a 14-pin, hermetically-sealed device in a ceramic package. Table I shows some of the device manufacturer s specifications.

Patterson, Richard↗
NASA NTRS2008

Vacuum Packaging of MEMS With Multiple Internal Seal Rings

A proposed method of design and fabrication of vacuum-packaged microelectromechanical systems (MEMS) and of individual microelectromechanical devices involves the use of multiple internal seal rings (MISRs) in conjunction with vias (through holes plated with metal for electrical contacts). The proposed method is compatible with mass production in a wafer-level fabrication process, in which the dozens of MEMS or individual microelectromechanical devices on a typical wafer are simultaneously vacuum packaged by bonding a capping wafer before the devices are singulated (cut apart by use of a dicing saw). In addition to being compatible with mass production, the proposed method would eliminate the need for some complex and expensive production steps and would yield more reliable vacuum seals. Conventionally, each MEMS or individual microelectromechanical device is fabricated as one of many identical units on a device wafer. Vacuum packaging is accomplished by bonding the device wafer to a capping wafer with metal seal rings (one ring surrounding each unit) that have been formed on the capping wafer. The electrical leads of each unit are laid out on what would otherwise be a flat surface of the device wafer, against which the seal ring is to be pressed for sealing. The resulting pattern of metal lines and their insulating oxide coverings presents a very rough and uneven surface, upon which it is difficult to pattern the sealing metal. Consequently, the seal is prone to leakage unless additional costly and complex planarization steps are performed before patterning the seal ring and bonding the wafers.

Hayworth, Ken↗
NASA NTRSDate not supplied

Challenges, Considerations, and Opportunities for Exercise and Medical Accommodation Inside a Small Pressurized Rover

Pressurized Rovers (PR) can enable crew to explore away from a lander or surface habitat at distances not possible on foot or even in unpressurized rovers. Sustaining crew for multiple days, they can rove for weeks, independent of other surface elements. Because these are essentially mobile habitats, it is critical that they provide sufficient volume to accommodate the exercise and medical systems to maintain human health in remote, low gravity environments such as the Moon and Mars. This is an area of extensive unknowns as requirements have not yet been developed for exercise or medical systems in pressurized rovers. Yet they must be considered in vehicle sizing studies as they are significant volume drivers, requiring allocation for stowed and deployed hardware inside the rover cabin. Previously flown spacecraft have allocated varying amounts of volume based on the expected crew mission and the state of the art in these systems. NASA-STD-3001 provides high-level requirements for standards of medical care and exercise capabilities. Crew injuries are possible both inside the cabin and on extravehicular activities (EVA), therefore requiring medical capability. Exercise countermeasures are needed to counteract the debilitating effects of lowered gravity. This may include both reconditioning following a lengthy microgravity transit as well as ongoing countermeasures against the effect of low surface gravity. The NASA reference concept for the PR dates back to the Constellation Program and prototypes have been extensively tested in NASA’s Desert Research and Technology Studies (DRATS) program as well as at the NASA Johnson Space Center. The PR cabin is designed to accommodate two crewmembers and is subdivided into a forward cockpit area and a main body for crew habitation. EVAs are accomplished by transitioning through suit ports in the aft bulkhead into spacesuits. While no exercise devices have been developed for the PR, some have been prototyped and demonstrated in DRATS analog missions. A cycle ergometer performed reasonably well in DRATS testing as an aerobic exercise device and recent analysis work has theorized that a combination aerobic and resistive device could be packaged into a form factor similar to the DRATS ergometer. It is therefore suitable for use as an initial volumetric placeholder. No sensorimotor devices have been considered for the PR to aid in adaptation to surface gravity. However, there are commercially available treadmills that at minimum represent examples of the type of exercise system that could potentially be used for such a purpose. A combination of field test data, analysis, and CAD modeling will be used to perform a first pass assessment of whether these exercise devices can be stowed and deployed within the PR. Medical inventories from the International Space Station will be used as a volume placeholder for the PR medical system. A configuration will be discussed for medical deployment, including positioning of caregiver, patient, and medical equipment / supplies.

Pressurized Rover↗
NASA NTRS1977

Parylene coating for circuit components

Inexpensive internal coating improves reliability of plastic-packaged parts. Coating protects device from effects of humidity and heat and acts as barrier between device and harmful substances generated by plastic-packaging material.

Berkebile, M. J.↗
NASA NTRS1992

Self Cooling/Heating Devices

A NASA RTTC assisted International Thermal Packaging (ITP) in the identification of a NASA-developed synthetic polymer that can absorb 1,000 times its weight in water. The desiccant was used in the manufacture of a self-chilling can, a major innovation for packaging food and beverages. The refrigeration device is a small cylinder, fully incorporated into the can. When used in beverage containers, the top of the can is popped, the internal carbonization pressure is relieved, and the self-chilling reaction is induced. Company product line has been expanded to include two related products, and several licensing agreements have been signed.

Source record↗
NASA NTRS2011

Optimization of Indium Bump Morphology for Improved Flip Chip Devices

Flip-chip hybridization, also known as bump bonding, is a packaging technique for microelectronic devices that directly connects an active element or detector to a substrate readout face-to-face, eliminating the need for wire bonding. In order to make conductive links between the two parts, a solder material is used between the bond pads on each side. Solder bumps, composed of indium metal, are typically deposited by thermal evaporation onto the active regions of the device and substrate. While indium bump technology has been a part of the electronic interconnect process field for many years and has been extensively employed in the infrared imager industry, obtaining a reliable, high-yield process for high-density patterns of bumps can be quite difficult. Under the right conditions, a moderate hydrogen plasma exposure can raise the temperature of the indium bump to the point where it can flow. This flow can result in a desirable shape where indium will efficiently wet the metal contact pad to provide good electrical contact to the underlying readout or imager circuit. However, it is extremely important to carefully control this process as the intensity of the hydrogen plasma treatment dramatically affects the indium bump morphology. To ensure the fine-tuning of this reflow process, it is necessary to have realtime feedback on the status of the bumps. With an appropriately placed viewport in a plasma chamber, one can image a small field (a square of approximately 5 millimeters on each side) of the bumps (10-20 microns in size) during the hydrogen plasma reflow process. By monitoring the shape of the bumps in real time using a video camera mounted to a telescoping 12 magnifying zoom lens and associated optical elements, an engineer can precisely determine when the reflow of the bumps has occurred, and can shut off the plasma before evaporation or de-wetting takes place.

Jones, Todd J.↗
NASA NTRS2011

Operation of a New Half-Bridge Gate Driver for Enhancement - Mode GaN FETs, Type LM5113, Over a Wide Temperature Range

A new commercial-off-the-shelf (COTS) gate driver designed to drive both the high-side and the low-side enhancement-mode GaN FETs, National Semiconductor's type LM5113, was evaluated for operation at temperatures beyond its recommended specified limits of -40 C to +125 C. The effects of limited thermal cycling under the extended test temperature, which ranged from -194 C to +150 C, on the operation of this chip as well as restart capability at the extreme cryogenic and hot temperatures were also investigated. The driver circuit was able to maintain good operation throughout the entire test regime between -194 C and +150 C without undergoing any major changes in its outputs signals and characteristics. The limited thermal cycling performed on the device also had no effect on its performance, and the driver chip was able to successfully restart at each of the extreme temperatures of -194 C and +150 C. The plastic packaging of this device was also not affected by either the short extreme temperature exposure or the limited thermal cycling. These preliminary results indicate that this new commercial-off-the-shelf (COTS) halfbridge eGaN FET driver integrated circuit has the potential for use in space exploration missions under extreme temperature environments. Further testing is planned under long-term cycling to assess the reliability of these parts and to determine their suitability for extended use in the harsh environments of space.

Patterson, Richard↗
NASA NTRS1987

APS-Workshop on Characterization of MMIC (Monolithic Microwave Integrated Circuit) Devices for Array Antenna

The IEEE AP-S ADCOM is attempting to expand its educational, tutorial and information exchange activities as a further benefit to all members. To this end, ADCOM will be forming specialized workshops on topics of interest to its members. The first such workshop on Characterization and Packaging of MMIC Devices for Array Antennas was conceived. The workshop took place on June 13, 1986 as part of the 1986 International Symposium sponsored by IEEE AP-S and URSI in Philadelphia, PA, June 9-13, 1986. The workshop was formed to foster the interchange of ideas among MMIC device users and to provide a forum to collect and focus information among engineers experienced and interested in the topic. After brief presentations by the panelists and comments from attendees on several subtopics, the group was divided into working committees. Each committee evaluated and made recommendations on one of the subtopics.

Smetana, Jerry↗
NASA NTRS2015

Single-Event Effects in Silicon Carbide Power Devices

This report summarizes the NASA Electronic Parts and Packaging Program Silicon Carbide Power Device Subtask efforts in FY15. Benefits of SiC are described and example NASA Programs and Projects desiring this technology are given. The current status of the radiation tolerance of silicon carbide power devices is given and paths forward in the effort to develop heavy-ion single-event effect hardened devices indicated.

heavy-ion single-event effects↗
NASA NTRS1997

The Nature of Comet Materials and Attachment to Them

Because cometary surfaces are likely to be far colder and of a different composition and surface topography than other planetary surfaces with which we have experience, there are some new considerations that must be examined in regards to placing and attaching instrumented packages or sample return devices in or on their surfaces. The qualitative analysis of the problem of embedding hardware in a comet icy core is limited to only one of several means for the purposes of this discussion. This means can be characterized as a kinetic impact piercing device. Such kinetic impact piercing device may be used to attach the feet of an instrumented package on the surface or it may be the means for implanting the package in the icy core below the mantle. The functional requirement is to implant a device in the icy core and by mechanical means, prevent the device from being ejected back into space.

Stephens, James↗
NASA NTRS1996

Chip-on-Board Technology 1996 Year-end Report (Design, Manufacturing, and Reliability Study)

The major impetus for flight qualifying Chip-On-Board (COB) packaging technology is the shift in emphasis for space missions to smaller, better, and cheaper spacecraft and satellites resulting from the NASA New Millenium initiative and similar requirements in DoD-sponsored programs. The most important benefit that can potentially be derived from miniaturizing spacecraft and satellites is the significant cost saving realizable if a smaller launch vehicle may be employed. Besides the program cost saving, there are several other advantages to building COB-based space hardware. First, once a well-controlled process is established, COB can be low cost compared to standard Multi-Chip Module (MCM) technology. This cost competitiveness is regarded as a result of the generally greater availability and lower cost of Known Good Die (KGD). Coupled with the elimination of the first level of packaging (chip package), compact, high-density circuit boards can be realized with Printed Wiring Boards (PWB) that can now be made with ever-decreasing feature size in line width and via hole. Since the COB packaging technique in this study is based mainly on populating bare dice on a suitable multi-layer laminate substrate which is not hermetically sealed, die coating for protection from the environment is required. In recent years, significant improvements have been made in die coating materials which further enhance the appeal of COB. Hysol epoxies, silicone, parylene and silicon nitride are desirable because of their compatible Thermal Coefficient of Expansion (TCE) and good moisture resistant capability. These die coating materials have all been used in the space and other industries with varying degrees of success. COB technology, specifically siliconnitride coated hardware, has been flown by Lockheed on the Polar satellite. In addition, DARPA has invested a substantial amount of resources on MCM and COB-related activities recently. With COB on the verge of becoming a dominant player in DoD programs, DARPA is increasing its support of the availability of KGDs which will help decrease their cost. Aside from the various major developments and trends in the space and defense industries that are favorable to the acceptance and widespread use of'COB packaging technology, implementing COB can be appealing in other aspects. Since the interconnection interface is usually the weak link in a system, the overall circuit or system reliability may actually be improved because of the elimination of a level of interconnect/packaging at the chip. With COB, mixing packaging technologies is possible. Because some devices are only available in commercial plastic packages, populating a multi-layer laminate substrate with both bare dice and plastic-package parts is inevitable. Another attractive feature of COB is that re-workability is possible if die coating is applied only on the die top. This method allows local replacement of individual dice that were found to be defective instead of replacing an entire board. In terms of thermal management, unpackaged devices offer a shorter thermal resistance path than their packaged counterparts thereby improving thermal sinking and heat removal from the parts.

Le, Binh Q.↗
NASA NTRS1972

Active seismic experiment

The Apollo 16 active seismic experiment (ASE) was designed to generate and monitor seismic waves for the study of the lunar near-surface structure. Several seismic energy sources are used: an astronaut-activated thumper device, a mortar package that contains rocket-launched grenades, and the impulse produced by the lunar module ascent. Analysis of some seismic signals recorded by the ASE has provided data concerning the near-surface structure at the Descartes landing site. Two compressional seismic velocities have so far been recognized in the seismic data. The deployment of the ASE is described, and the significant results obtained are discussed.

Kovach, R. L.↗
NASA NTRS1978

Preliminary study of the reliability of imaging charge coupled devices

Imaging CCDs are capable of low light level response and high signal-to-noise ratios. In space applications they offer the user the ability to achieve extremely high resolution imaging with minimum circuitry in the photo sensor array. This work relates the CCD121H Fairchild device to the fundamentals of CCDs and the representative technologies. Several failure modes are described, construction is analyzed and test results are reported. In addition, the relationship of the device reliability to packaging principles is analyzed and test data presented. Finally, a test program is defined for more general reliability evaluation of CCDs.

Beall, J. R.↗
NASA NTRS1979

Design, processing and testing of LSI arrays: Hybrid microelectronics task

Mathematical cost factors were generated for both hybrid microcircuit and printed wiring board packaging methods. A mathematical cost model was created for analysis of microcircuit fabrication costs. The costing factors were refined and reduced to formulae for computerization. Efficient methods were investigated for low cost packaging of LSI devices as a function of density and reliability. Technical problem areas such as wafer bumping, inner/outer leading bonding, testing on tape, and tape processing, were investigated.

Himmel, R. P.↗
NASA NTRS1989

The use of aircraft and satellite remote sensing of phytoplankton chlorophyll concentrations in case 2 estuarine waters of the Chesapeake Bay

Two projects using remote sensing of phytoplankton chlorophyll concentrations in the Chesapeake Bay estuary were proposed. The first project used aircraft remote sensing with a compact radiometer system developed at NASA's Goddard Space Flight Center (GSFC), the Ocean Data Acquisition System (ODAS). ODAS includes three radiometers at 460, 490, and 520 nm, an infrared temperature sensor (PRT-5), Loran-C for navigation, and a data acquisition system using a PC and mass storage device. This instrument package can be flown in light aircraft at relatively low expense, permitting regular and frequent flights. Sixteen flights with ODAS were completed using the Virginia Institute of Marine Science's De Havilland 'Beaver'. The goal was to increase spatial and temporal resolution in assaying phytoplankton pigment concentrations in the Chesapeake. At present, analysis is underway of flight data collected between March and July 1989. The second project focused on satellite data gathered with the Nimbus-7 Coastal Zone Color Scanner (CZSC) between late 1978 and mid 1986. The problem in using CZSC data for the Chesapeake Bay is that the optical characteristics of this (and many) coastal and estuarine waters are distinct from those of the open ocean for which algorithms for computing pigment concentrations were developed. The successful use of CZCS data for the estuary requires development of site-specific algorithms and analytical approaches. Of principal importance in developing site-specific procedures is the availability of in-situ data on pigment concentrations. A significant data set was acquired from EPA's Chesapeake Bay Program in Annapolis, Maryland, and clear satellite scenes are being analyzed for which same-day sea truth measurements of pigment were obtained. Both the University of Miami and GSFC Seapak systems are being used in this effort. The main finding to date is an expected one, i.e., the algorithms developed for oceanic waters are inadequate to compute pigment concentrations for the Case 2 waters of the Chesapeake Bay. One reason is the overestimation of aerosol radiances by assuming that water-leaving radiance in Band 4 of CZCS (670 nm) is zero, an assumption that is invalid for the Bay. This prompted any attempts to iterative procedures for estimating the proportion of the Band 4 radiance that is actually attributable to aerosol by estimating the water-leaving component using optical data. A cruise on the Chesapeake the week of 7 August 1989 was conducted to collect additional optical data necessary to this task.

Harding, Lawrence W., Jr.↗