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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Medium Voltage Converter Inductor Insulation Design Considering Grid Insulation Requirements

Medium voltage SiC devices facilitate direct (without 50/60 Hz transformer) connection of the power electronics converter to the medium voltage grid using simple topology. Compared to the insulation design of medium voltage inductors that have been widely used in the power system, the insulation design of directly connected medium voltage converter filter inductors has more challenges. Although some works has been done discussing that, the grid insulation requirements on converter filter inductors are rarely discussed. This paper introduces the insulation design of a grid-side filter inductor for a 13.8 kV power conditioning system converter. The grid insulation requirements, including the short-duration power frequency overvoltage and the lightning impulse voltage, are considered in the design. To meet the requirements, the layer-to-layer insulation, winding-to-core/ground insulation, the air gap discharge between the winding and the core, as well as the local electrical field have been taken into consideration. Experimental tests are provided to validate the design.

Li, Haiguo↗
DOE OSTI2022

A Medium Voltage Testbed for the Performance and Function Tests of a 13.8 kV Power Conditioning System Converter

Medium voltage SiC devices facilitate the development of medium voltage grid-connected power electronics converters. However, it is difficult to test these converters directly on the real medium voltage grid, especially considering abnormal grid conditions, such as grid voltage and frequency variation, and different converter operation modes, such as grid-connected mode and islanded mode. This paper introduces the design and implementation of a medium voltage testbed, which supports tests of medium voltage converters in both grid-connected and islanded mode tests. In the grid-connected mode, the testbed can provide up to 13.8 kV grid voltage, can support the four-quadrant operation, and can emulate different grid conditions, such as voltage and frequency variation. In the islanded mode, the converter under test works as a voltage source and the testbed emulates a three-phase balanced or unbalanced load. Experiment test results are provided to validate the design and capability of the testbed.

Li, Haiguo↗
DOE OSTI2023

A Hydrokinetic Energy Conversion System using Underwater LLC-type Resonant Converter

The hydrokinetic energy of river and ocean currents is a valuable renewable energy resource. Conventional systems for harvesting hydrokinetic energy usually have bulky passive components, lengthy cables connecting the underwater turbine/generator with onshore power converters, and limited control over power generation. This paper presents a new hydrokinetic energy harvesting system using an LLC-type resonant converter that is placed underwater in close proximity to the generator. By using SiC devices and the soft switching characteristic of LLC resonant converter, the converter operates in 10s of kHz, significantly reducing the passive components. In addition, the LLC converter provides flexible power regulation of the system. Furthermore, the underwater placement of the power converter takes advantage of the cooling provided by the water and simplifies the system by reducing its connecting cable length.

Dai, Hang↗
DOE OSTI2021

Modular Design of Receiver Side Power Electronics for 200 kW High Power Dynamic Wireless Charging System

Dynamic wireless power transfer (DWPT) can provide energy to EVs in motion and extend the drive range. By upscaling the charging power to 200 kW (High Power DWPT), the percentage of electrified roadway reduces and the solution becomes cost-effective. However, coil coupling-coefficient variation during vehicle movement fluctuates the transferred power which is unfavorable for vehicle battery. Secondary regulation design can smooth the power but the converter design becomes very challenging due to requirement in high power, high efficiency, fast control, as well as high power density since the unit will be onboard. This paper provides the modular design approach of a 200 kW secondary side unit to achieve high performance and scalability. The DC/DC converter using SiC devices demonstrated 98.3% efficiency.

Xue, Lincoln↗
DOE OSTI2021

Medium Voltage Converter Inductor Insulation Design Considering Grid Requirements

Medium voltage (MV) SiC devices facilitate direct (without 50-/60-Hz transformer) connection of the power electronics converter to the MV grid using simple topology. Compared to the insulation design of MV inductors that have been widely used in the power system, the insulation design of the MV converter filter inductors has new challenges. Particularly, the grid impact on insulation requirements on converter filter inductors is rarely discussed. This article introduces the insulation design of a grid-side filter inductor for a 13.8-kV power conditioning system converter. The grid insulation requirements, including the short-duration power frequency overvoltage and the lightning impulse voltage, are considered in the design. To meet the requirements, the layer-to-layer insulation, winding-to-core/ground insulation, the air gap discharge between the winding and the core, the local electric field, as well as the interturn transient voltage distribution are considered. Furthermore, the designed inductors are validated by the 46 kV (>1 min) dc hi-pot test, 12-kV ac partial discharge test, one-hour single-phase converter full rating test, as well as three-phase converter full rating test.

42 ENGINEERING↗
DOE OSTI2024

Modular Wide-bandgap String Inverters for Low-cost Medium-voltage Transformerless PV Systems

The proposed technology combines advances in wide-bandgap power electronics with breakthroughs in distributed and decentralized control to produce ultra-low-cost medium-voltage transformerless PV inverters that are composed of stackable lightweight blocks. Taken together, the proposed circuit designs and accompanying control strategies will yield integrated control+circuit (C2) blocks, each comprising a converter and local controller, that can be assembled in a modular fashion to obtain distributed conversion interfaces for next-generation commercial and utility-scale PV systems. We will utilize SiC devices to obtain C2 blocks that can individually operate at a voltage and power in excess of 1 kV and 100 kW, respectively, such that ensembles of series-connected blocks perform direct dc to three-phase ac conversion at medium voltages (e.g., 12 kV–35 kV) and at multi-MW power levels.

42 ENGINEERING↗
NASA NTRS1994

Electrical properties of epitaxial 3C- and 6H-SiC p-n junction diodes produced side-by-side on 6H-SiC substrates

3C-SiC (beta-SiC) and 6H-SiC p-n junction diodes have been fabricated in regions of both 3C-SiC and 6H-SiC epitaxial layers which were grown side-by-side on low-tilt-angle 6H-SiC substrates via a chemical vapor deposition (CVD) process. Several runs of diodes exhibiting state-of-the-art electrical characteristics were produced, and performance characteristics were measured and compared as a function of doping, temperature, and polytype. The first 3C-SiC diodes which rectify to reverse voltages in excess of 300 V were characterized, representing a six-fold blocking voltage improvement over experimental 3C-SiC diodes produced by previous techniques. When placed under sufficient forward bias, the 3C-SiC diodes emit significantly bright green-yellow light while the 6H-SiC diodes emit in the blue-violet. The 6H-SiC p-n junction diodes represent the first reported high-quality 6H-SiC devices to be grown by CVD on very low-tilt-angle (less than 0.5 deg off the (0001) silicon face) 6H substrates. The reverse leakage current of a 200 micron diameter circular device at 1100 V reverse bias was less than 20 nA at room temperature, and excellent rectification characteristics were demonstrated at the peak characterization temperature of 400 C.

EPITAXIAL LAYER↗
NASA NTRS2002

Growth of Defect-Free 3C-Sic on 4H- and 6H-SIC Mesas Using Step-Free Surface Heteroepitaxy

A new growth process, herein named step-free surface heteroepitaxy, has achieved 3C-SiC films completely free of double positioning boundaries and stacking faults on 4H-SiC and 6H-SiC substrate mesas. The process is based upon the initial 2-dimensional nucleation and lateral expansion of a single island of 3C-SiC on a 4H- or 6H-SiC mesa surface that is completely free of bilayer surface steps. Our experimental results indicate that substrate-epilayer in-plane lattice mismatch (Delta/a = 0.0854% for 3C/4H) is at least partially relieved parallel to the interface in the initial bilayers of the heterofilm, producing an at least partially relaxed 3C-SiC film without dislocations that undesirably thread through the thickness of the epilayer. This result should enable realization of improved 3C-SiC devices.

Neudeck, Philip G.↗
NASA NTRS2011

Source-Coupled, N-Channel, JFET-Based Digital Logic Gate Structure Using Resistive Level Shifters

A circuit topography is used to create usable, digital logic gates using N (negatively doped) channel junction field effect transistors (JFETs), load resistors, level shifting resistors, and supply rails whose values are based on the DC parametric distributions of these JFETs. This method has direct application to the current state-of-the-art in high-temperature (300 to 500 C and higher) silicon carbide (SiC) device production, and defines an adaptation to the logic gate described in U.S. Patent 7,688,117 in that, by removing the level shifter from the output of the gate structure described in the patent (and applying it to the input of the same gate), a source-coupled gate topography is created. This structure allows for the construction AND/OR (sum of products) arrays that use far fewer transistors and resistors than the same array as constructed from the gates described in the aforementioned patent. This plays a central role when large multiplexer constructs are necessary; for example, as in the construction of memory. This innovation moves the resistive level shifter from the output of the basic gate structure to the front as if the input is now configured as what would be the output of the preceding gate, wherein the output is the two level shifting resistors. The output of this innovation can now be realized as the lone follower transistor with its source node as the gate output. Additionally, one may leave intact the resistive level shifter on the new gate topography. A source-coupled to direct-coupled logic translator will be the result.

Krasowski, Michael J.↗
NASA NTRS2001

Growth of Defect-Free 3C-SiC on 4H- and 6H-SiC Mesas Using Step-Free Surface Heteroepitaxy

A new growth process, herein named step-free surface heteroepitaxy, has achieved 3CSiC films completely free of double positioning boundaries and stacking faults on 4H-SiC and 6H-SiC substrate mesas. The process is based upon the initial 2-dimensional nucleation and lateral expansion of a single island of 3C-SiC on a 4H- or 6H-SiC mesa surface that is completely free of bilayer surface steps. Our experimental results indicate that substrate-epilayer in-plane lattice mismatch (delta a/a = 0.0854% for 3C/4H) is at least partially relieved parallel to the interface in the initial bilayers of the heterofilm, producing an at least partially relaxed 3C-SiC film without dislocations that undesirably thread through the thickness of the epilayer. This result should enable realization of improved 3C-SiC devices.

Neudeck, Philip G.↗
NASA NTRS1983

Production of large-area single-crystal wafers of cubic SiC for semiconductor devices

A reproducible process is described for growing a thick single-crystal layer of cubic SiC on a single-crystal Si wafer by chemical vapor deposition. A buffer layer, grown in situ, is used between the cubic SiC and the Si substrate to minimize the effect of lattice mismatch. Layers of up to 34 microns thick and several sq cm in area have been grown. Wafers are obtained by chemically removing the Si substrates from the grown layers. Excellent electron channeling patterns produced by these wafers indicate very good crystal quality. Preliminary electrical measurements have yielded electron mobilities up to 380 sq cm/Vs.

Nishino, S.↗
NASA NTRS1996

Silicon Carbide Epitaxial Films Studied by Atomic Force Microscopy

Silicon carbide (SiC) holds great potential as an electronic material because of its wide band gap energy, high breakdown electric field, thermal stability, and resistance to radiation damage. Possible aerospace applications of high-temperature, high-power, or high-radiation SiC electronic devices include sensors, control electronics, and power electronics that can operate at temperatures up to 600 C and beyond. Commercially available SiC devices now include blue light-emitting diodes (LED's) and high-voltage diodes for operation up to 350 C, with other devices under development. At present, morphological defects in epitaxially grown SiC films limit their use in device applications. Research geared toward reducing the number of structural inhomogeneities can benefit from an understanding of the type and nature of problems that cause defects. The Atomic Force Microscope (AFM) has proven to be a useful tool in characterizing defects present on the surface of SiC epitaxial films. The in-house High-Temperature Integrated Electronics and Sensors (HTIES) Program at the NASA Lewis Research Center not only extended the dopant concentration range achievable in epitaxial SiC films, but it reduced the concentration of some types of defects. Advanced structural characterization using the AFM was warranted to identify the type and structure of the remaining film defects and morphological inhomogeneities. The AFM can give quantitative information on surface topography down to molecular scales. Acquired, in part, in support of the Advanced High Temperature Engine Materials Technology Program (HITEMP), the AFM had been used previously to detect partial fiber debonding in composite material cross sections. Atomic force microscopy examination of epitaxial SiC film surfaces revealed molecular-scale details of some unwanted surface features. Growth pits propagating from defects in the substrate, and hillocks due, presumably, to existing screw dislocations in the substrates, were imaged. Away from local defects, step bunching was observed to yield step heights of hundreds of angstroms, with possible implications for the uniformity of dopants incorporated in SiC devices during fabrication. The quantitative topographic data from the AFM allow the relevant defect information to be extracted, such as the size and distribution of step bunching and the Burgers vector of screw dislocations. These atomic force microscopy results have furthered the understanding of the dynamic epitaxial SiC growth process. A model describing the observed hillock step bunching has been proposed. This cooperation between researchers involved in crystal growth, electronic device fabrication, and surface structural characterization is likely to continue as atomic force microscopy is used to improve SiC films for high-temperature electronic devices for NASA's advanced turbine engines and space power devices, as well as for future applications in the automotive industry.

Source record↗
NASA NTRS1998

Study of Bulk and Elementary Screw Dislocation Assisted Reverse Breakdown in Low-Voltage (less than 250 V) 4H-SiC p(+)n Junction diodes: DC Properties - Part 1

Given the high density (approx. 10(exp 4)/sq cm) of elementary screw dislocations (Burgers vector = 1c with no hollow core) in commercial SiC wafers and epilayers, all appreciable current (greater than 1 A) SiC power devices will likely contain elementary screw dislocations for the foreseeable future. It is therefore important to ascertain the electrical impact of these defects, particularly in high-field vertical power device topologies where SiC is expected to enable large performance improvements in solid-state high-power systems. This paper compares the DC-measured reverse-breakdown characteristics of low-voltage (less than 250 V) small-area (less than 5 x 10(exp -4)/sq cm) 4H-SiC p(+)n diodes with and without elementary screw dislocations. Compared to screw dislocation-free devices, diodes containing elementary screw dislocations exhibited higher pre-breakdown reverse leakage currents, softer reverse breakdown I-V knees, and highly localized microplasmic breakdown current filaments. The observed localized 4H-SiC breakdown parallels microplasmic breakdowns observed in silicon and other semiconductors, in which space-charge effects limit current conduction through the local microplasma as reverse bias is increased.

Neudeck, Philip G.↗
NASA NTRS1999

Study of Bulk and Elementary Screw Dislocation Assisted Reverse Breakdown in Low-Voltage (<250 V) 4H-SiC p+n Junction Diodes - Part 1: DC Properties

Given the high density (approx. 10(exp 4)/sq cm) of elementary screw dislocations (Burgers vector = lc with no hollow core) in commercial SiC wafers and epilayers, all appreciable current (greater than 1 A) SiC power devices will likely contain elementary screw dislocations for the foreseeable future. It is therefore important to ascertain the electrical impact of these defects, particularly in high-field vertical power device topologies where SiC is expected to enable large performance improvements in solid-state high-power systems. This paper compares the DC-measured reverse-breakdown characteristics of low-voltage (less than 250 V) small-area (less than 5 x 10(exp -4) sq cm) 4H-SiC p(+)n diodes with and without elementary screw dislocations. Compared to screw dislocation-free devices, diodes containing elementary screw dislocations exhibited higher pre-breakdown reverse leakage currents, softer reverse breakdown I-V knees, and highly localized microplasmic breakdown current filaments. The observed localized 4H-SiC breakdown parallels microplasmic breakdowns observed in silicon and other semiconductors, in which space-charge effects limit current conduction through the local microplasma as reverse bias is increased.

Neudeck, Philip G.↗
DOE OSTI2021

Characterization of Highly Thermally Conductive Organic Substrates for a Double-Sided Cooled Power Module

Abstract Silicon-Carbide (SiC) power devices have become a promising option for traditional Silicon (Si) due to the superior material properties. To fully take advantage of the SiC devices, a high-performance power device packaging solution is necessary. This study proposes a cost-effective double-sided cooled (DSC) 1.2 kV SiC half-bridge power module using organic epoxy-resin composite dielectric (ERCD) substrates. The high mechanical and thermal performance of the power module is achieved by the low-modulus, moderate thermal conductivity, and relatively thin (120 μm) layer of ERCD material compared with traditional metal-clad ceramic approaches. This novel organic dielectric can withstand high voltage (5 kV @ 120 μm) and operate up to 250°C continuously, which is indispensable for high power applications. The thermal modeling results show that the equivalent thermal resistance junction-to-case (Rjc_eq) of the DSC power module using dual direct bonded copper (DBC) is 17% higher than the dual ERCD configuration. Furthermore, a non-insulated DSC power module concept is proposed for maximizing thermal performance by considering thermal vias in the ERCD substrate and direct-soldered heat sink. A thought process for optimization of thermal via design is demonstrated and it shows up to 24% of improvement on thermal performance compared with the insulated DSC power module.

Double-sided cooling, epoxy-resin composite dielec↗
NASA NTRS2001

Thermally Stable Ohmic Contacts on Silicon Carbide Developed for High- Temperature Sensors and Electronics

The NASA aerospace program, in particular, requires breakthrough instrumentation inside the combustion chambers of engines for the purpose of, among other things, improving computational fluid dynamics code validation and active engine behavioral control (combustion, flow, stall, and noise). This environment can be as high as 600 degrees Celsius, which is beyond the capability of silicon and gallium arsenide devices. Silicon-carbide- (SiC-) based devices appear to be the most technologically mature among wide-bandgap semiconductors with the proven capability to function at temperatures above 500 degrees Celsius. However, the contact metalization of SiC degrades severely beyond this temperature because of factors such as the interdiffusion between layers, oxidation of the contact, and compositional and microstructural changes at the metal/semiconductor interface. These mechanisms have been proven to be device killers. Very costly and weight-adding packaging schemes that include vacuum sealing are sometimes adopted as a solution.

Okojie, Robert S.↗