Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “SiC”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Electric Drive Technologies Consortium (EDTC)/ Cost competitive, high-Performance, highly Reliable (CPR) Power Devices on 4H-SiC (Final Report)

4H-Silicon carbide (4H-SiC) is a wide bandgap semiconductor that offers superior material properties over silicon, including higher critical electric field, thermal conductivity, and electron saturation velocity. These advantages make 4H-SiC highly attractive for high-voltage, high-efficiency power electronics. However, realizing the full potential of SiC requires device technologies that are not only high-performing but also manufacturable and reliable under real-world operating conditions. This report summarizes the outcomes of a five-year R&D effort funded by the U.S. Department of Energy (DOE) under the Electric Drive Technologies Consortium (EDTC), focused on developing cost-competitive, high-performance, and highly reliable (CPR) power devices on 4H-SiC substrates. The program targeted scalable and manufacturable 1.2 kV-class SiC MOSFETs optimized for next-generation electric vehicles, renewable energy systems, and industrial power conversion. The project delivered transformative advancements in SiC power device performance and ruggedness. Particularly, Specific on-resistance (R on,sp ) was reduced by up to 37%, from ~4.0 m$\Omega \cdot$cm 2 in earlier designs to an industry-leading 2.40 m$\Omega \cdot$cm 2 , driven by optimized doping, refined JFET widths, and layout engineering. Breakdown voltages (BV) exceeded 1600 V, marking improvement over legacy baselines, and demonstrating the robustness of newly implemented junction profiles and edge terminations. Short-circuit withstand time (SCWT) saw a remarkable 4$\times$ increase, from ~2 $\mu$s to over 8 $\mu$s, achieved through the successful deployment of deep P-well structures (~1.8–2.0 $\mu$m) via channeling implantation. This innovative process breakthrough enabled precise junction formation without MeV-class implantation tools, reduced leakage under high field stress, and allowed even the shortest-channel devices (down to 0.3 $\mu$m) to achieve both high BV and excellent ruggedness—breaking the traditional trade-off between conduction efficiency and blocking capability. Several novel architectures pushed the performance envelope further. JBSFETs—featuring embedded Schottky portions—eliminated bipolar degradation and drastically reduced third-quadrant leakage, while Ladder MOSFETs introduced a clever orthogonal conduction path that achieved a 15.4% reduction in R on,sp over standard linear designs. Switching performance reached new benchmarks: short-channel devices showed a 31% reduction in total switching energy compared to 0.5 $\mu$m counterparts, while maintaining manageable gate drive requirements. Layout-optimized structures not only improved transconductance but also accelerated switching transitions, pointing to real-world benefits in converter-level efficiency. The devices also passed rigorous reliability validation. Stress-tested across TDDB, HTGB, HTRB, HVP, and burn-in, the devices screened under 30 V/10 hr and 43 V/1 s protocols consistently exhibited tighter lifetime distributions and long-term oxide robustness. These screening techniques proved effective in identifying latent defects and ensuring deployment-grade reliability. Meanwhile, advanced 3D TCAD simulations revealed and resolved electric field hotspots—particularly in HEXFET corners—where fields exceeding 4.8 MV/cm were mitigated through geometry-aware layout corrections. Overall, the results of this project demonstrate a manufacturable and scalable SiC power device platform that addresses key DOE performance targets for efficient, robust, and reliable 1.2kV 4H-SiC Power Devices. The developed technologies represent a meaningful step forward in the commercial readiness of high-voltage SiC solutions and provide a strong foundation for continued advancement in wide bandgap power electronics.

42 ENGINEERING↗
DOE OSTI2025

SiC cladding R&D execution plan

To advance the development of accident-tolerant fuel cladding for light-water reactors, the Advanced Fuels Campaign actively addresses the R&D gap between the specialized technological progress in SiC-based composite materials, led by industrial partners, and the fundamental scientific understanding of material behavior under reactor operating conditions. The laboratory activities are systematically organized based on the Development Strategy document, which outlines critical barriers to the use of SiC composites in nuclear energy applications for the coming decade and beyond. To complement the strategy, this execution plan specifies a detailed year-by-year work package and establishes key milestones for assessing progress in technological advancement. This plan has been formulated in collaboration with principal investigators at national laboratories, stakeholders, and industry partners with the goal of closing technology gaps and readying SiC-based cladding technologies for full-scale commercial testing. The research conducted at the national laboratories is categorized into three primary subjects: (1) addressing challenges associated with the performance of SiC cladding under normal operating environments, (2) identifying the failure limits of SiC cladding under accident conditions, and (3) modeling fuel performance for SiC cladding systems. Comprehensive laboratory activities integrate the development of advanced modeling tools for SiC-based cladding systems with experimental validation via integrated testing of multiphysics phenomena. This document lays out the laboratory plan to support the development of SiC-based technologies, which have the potential for significant operational and safety benefits for the U.S. nuclear industry. This plan aligns with industry developer needs, relevant Nuclear Energy University Programs, and Nuclear Energy Advanced Modeling and Simulation Programs to ensure SiC cladding technologies are matured as efficiently as possible and will be maintained and updated to accommodate the dynamically evolving progress of development, capability needs, and resource availability.

11 NUCLEAR FUEL CYCLE AND FUEL MATERIALS↗
NASA NTRS1975

Effect of additions of coarse grains and fibers on the densification of a sinterable SiC

This note reports the effects on densification of independent additions of coarse equiaxed SiC grains and fibrous SiC that were mixed with fine beta-SiC to develop a duplex microstructure with improved toughness. The fine-matrix SiC did not contain excess boron and carbon. The equiaxed CVD beta-SiC was introduced in the fine beta-SiC matrix material in amounts of 5 and 10 wt%. Results indicate that the CVD beta-SiC, which is quite coarse, exhibits little indication of sinterability. The effect of these coarse-grained and fibrous additions on the sinterability of fine beta-SiC may result from a geometric type of interaction. This interpretation is reinforced by X-ray diffraction of the powders and sintered pellets via monochromatic CuK-alpha radiation; the diffraction patterns of the sintered composite structures are virtually a combination of those of the components. The addition of nonsinterable SiC to the sinterable material slightly reduces sinterability, the larger particles interacting geometrically with the fine matrix material to prevent complete densification.

Abe, H.↗
NASA NTRS1998

Non-Micropipe Dislocations in 4H-SiC Devices: Electrical Properties and Device Technology Implications

It is well-known that SiC wafer quality deficiencies are delaying the realization of outstandingly superior 4H-SiC power electronics. While efforts to date have centered on eradicating micropipes (i.e., hollow core super-screw dislocations with Burgers vectors greater than or equal to 2c), 4H-SiC wafers and epilayers also contain elementary screw dislocations (i.e., Burgers vector = 1c with no hollow core) in densities on the order of thousands per sq cm, nearly 100-fold micropipe densities. While not nearly as detrimental to SiC device performance as micropipes, it has recently been demonstrated that elementary screw dislocations somewhat degrade the reverse leakage and breakdown properties of 4H-SiC p(+)n diodes. Diodes containing elementary screw dislocations exhibited a 5% to 35% reduction in breakdown voltage, higher pre-breakdown reverse leakage current, softer reverse breakdown I-V knee, and microplasmic breakdown current filaments that were non-catastrophic as measured under high series resistance biasing. This paper details continuing experimental and theoretical investigations into the electrical properties of 4H-SiC elementary screw dislocations. The nonuniform breakdown behavior of 4H-SiC p'n junctions containing elementary screw dislocations exhibits interesting physical parallels with nonuniform breakdown phenomena previously observed in other semiconductor materials. Based upon experimentally observed dislocation-assisted breakdown, a re-assessment of well-known physical models relating power device reliability to junction breakdown has been undertaken for 4H-SiC. The potential impact of these elementary screw dislocation defects on the performance and reliability of various 4H-SiC device technologies being developed for high-power applications will be discussed.

Neudeck, Philip G.↗
NASA NTRS2005

Improved Method of Manufacturing SiC Devices

The phrase, "common-layered architecture for semiconductor silicon carbide" ("CLASSiC") denotes a method of batch fabrication of microelectromechanical and semiconductor devices from bulk silicon carbide. CLASSiC is the latest in a series of related methods developed in recent years in continuing efforts to standardize SiC-fabrication processes. CLASSiC encompasses both institutional and technological innovations that can be exploited separately or in combination to make the manufacture of SiC devices more economical. Examples of such devices are piezoresistive pressure sensors, strain gauges, vibration sensors, and turbulence-intensity sensors for use in harsh environments (e.g., high-temperature, high-pressure, corrosive atmospheres). The institutional innovation is to manufacture devices for different customers (individuals, companies, and/or other entities) simultaneously in the same batch. This innovation is based on utilization of the capability for fabrication, on the same substrate, of multiple SiC devices having different functionalities (see figure). Multiple customers can purchase shares of the area on the same substrate, each customer s share being apportioned according to the customer s production-volume requirement. This makes it possible for multiple customers to share costs in a common foundry, so that the capital equipment cost per customer in the inherently low-volume SiC-product market can be reduced significantly. One of the technological innovations is a five-mask process that is based on an established set of process design rules. The rules provide for standardization of the fabrication process, yet are flexible enough to enable multiple customers to lay out masks for their portions of the SiC substrate to provide for simultaneous batch fabrication of their various devices. In a related prior method, denoted multi-user fabrication in silicon carbide (MUSiC), the fabrication process is based largely on surface micromachining of poly SiC. However, in MUSiC one cannot exploit the superior sensing, thermomechanical, and electrical properties of single-crystal 6H-SiC or 4H-SiC. As a complement to MUSiC, the CLASSiC five-mask process can be utilized to fabricate multiple devices in bulk single-crystal SiC of any polytype. The five-mask process makes fabrication less complex because it eliminates the need for large-area deposition and removal of sacrificial material. Other innovations in CLASSiC pertain to selective etching of indium tin oxide and aluminum in connection with multilayer metallization. One major characteristic of bulk micromachined microelectromechanical devices is the presence of three-dimensional (3D) structures. Any 3D recesses that already exist at a given step in a fabrication process usually make it difficult to apply a planar coat of photoresist for metallization and other subsequent process steps. To overcome this difficulty, the CLASSiC process includes a reversal of part of the conventional flow: Metallization is performed before the recesses are etched.

Okojie, Robert S.↗
NASA NTRS2006

CFD Growth of 3C-SiC on 4H/6H Mesas

This article describes growth and characterization of the highest quality reproducible 3C-SiC heteroepitaxial films ever reported. By properly nucleating 3C-SiC growth on top of perfectly on-axis (0001) 4H-SiC mesa surfaces completely free of atomic scale steps and extended defects, growth of 3C-SiC mesa heterofilms completely free of extended crystal defects can be achieved. In contrast, nucleation and growth of 3C-SiC mesa heterofilms on top of 4H-SiC mesas with atomic-scale steps always results in numerous observable dislocations threading through the 3C-SiC epilayer. High-resolution X-ray diffraction and transmission electron microscopy measurements indicate non-trivial in-plane lattice mismatch between the 3C and 4H layers. This mismatch is somewhat relieved in the step-free mesa case via misfit dislocations confined to the 3C/4H interfacial region without dislocations threading into the overlying 3C-SiC layer. These results indicate that the presence or absence of steps at the 3C/4H heteroepitaxial interface critically impacts the quality, defect structure, and relaxation mechanisms of single-crystal heteroepitaxial 3C-SiC films.

Neudeck, Philip G.↗
DOE OSTI2026

SiC Substrate Composition Effect on TGO Scale Growth in EBC Systems During High‐Temperature Steam Exposure

A systematic investigation was conducted on the oxidation behavior of silicon-bond coats within environmental barrier coating (EBC) systems applied to Si-carbide (SiC) substrates, aiming to understand how different underlying SiC substrates influence the bond coat's thermally grown oxide (TGO) and its properties. The study examined (Y/Yb) 2 Si 2 O 7 /Si coatings on three cost-effective surrogate SiC substrates (chemical vapor deposition [CVD]-grown β-SiC, sintered α-SiC, and reaction-bonded [RB] SiC) for SiC fiber /SiC matrix ceramic matrix composites (CMCs). Discrepancies in TGO growth were observed, with noticeably higher growth rates reported for the coated CMC specimens than for the four monolithic SiC specimens. The CMC samples produce an amorphous TGO, whereas the other monolithic substrates formed a crystalline TGO, which lowered the oxygen permeability through the SiO 2 scale. In conclusion, the vitrification of the TGO in the (Y/Yb) 2 Si 2 O 7 /Si/CMC system resulted from the migration of boron species from the CMC substrate to the SiO 2 scale, leading to network modification via boron doping.

EBC↗
DOE OSTI2026

Review of SiC material development for nuclear fusion applications: Cross-cutting research and emerging opportunities

The SiC-based materials, particularly SiC-fiber-reinforced SiC matrix (SiC/SiC) composites, show strong potential for structural and functional applications in future fusion power plants because they can operate at high temperatures with a range of coolants and breeders, thereby enabling higher energy conversion efficiency. Here, this paper presents recent advancements in the development of SiC-based materials, focusing on processing techniques and material performance and resistance under fusion-relevant environments. The processing activities have emphasized near-net-shape fabrication and the joining of SiC subcomponents, with processing methods and material compositions informed by previous irradiation experiments on various grades of SiC. Research on irradiation effects has remained focused on degradation mechanisms and the microstructural optimization of SiC/SiC composites irradiated to high neutron damage levels. Analysis of irradiation defects in SiC has advanced via the application of cutting-edge characterization methods, among which Raman spectroscopy is becoming a common tool to assess atomic-scale chemical disorder. Fusion–fission crosscutting irradiation research has explored combined effects in SiC/SiC composites with application-relevant geometries, including bowing of SiC/SiC composite channels under neutron flux gradients, stress evolution in SiC/SiC composite tubes under through-thickness temperature gradients, and irradiation-enhanced corrosion in SiC. Finally, research opportunities for component testing and assessment under fusion-relevant conditions, in support of emerging concepts from the private fusion sector, are discussed.

Advanced manufacturing↗
NASA NTRS1996

Epitaxial Growth of beta-Silicon Carbide (SiC) on a Compliant Substrate via Chemical Vapor Deposition (CVD)

Many lattice defects have been attributed to the lattice mismatch and the difference in the thermal coefficient of expansion between SiC and silicon (Si). Stacking faults, twins and antiphase boundaries are some of the lattice defects found in these SiC films. These defects may be a partial cause of the disappointing performance reported for the prototype devices fabricated from beta-SiC films. The objective of this research is to relieve some of the thermal stress due to lattice mismatch when SiC is epitaxially grown on Si. The compliant substrate is a silicon membrane 2-4 microns thick. The CVD process includes the buffer layer which is grown at 1360 C followed by a very thin epitaxial growth of SiC. Then the temperature is raised to 1500 C for the subsequent growth of SiC. Since silicon melts at 1415 C, the SiC will be grown on molten Silicon which is absorbed by a porous graphite susceptor eliminating the SiC/Si interface. We suspect that this buffer layer will yield less stressed material to help in the epitaxial growth of SiC.

Mitchell, Sharanda L.↗
NASA NTRS2000

Packaging Technology Developed for High-Temperature SiC Sensors and Electronics

A ceramic- and thick-film-materials-based prototype electronic package designed for silicon carbide (SiC) high-temperature sensors and electronics has been successfully tested at 500 C in an oxygen-containing air environment for 500 hours. This package was designed, fabricated, assembled, and electronically evaluated at the NASA Glenn Research Center at Lewis Field with an in-house-fabricated SiC semiconductor test chip. High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as space missions to the inner solar system or the emission control electronics and sensors in aeronautical engines. Single-crystal SiC has such excellent physical and chemical material properties that SiC-based semiconductor electronics can operate at temperatures over 600 C, which is significantly higher than the limit for Si-based semiconductor devices. SiC semiconductor chips were recently demonstrated to be operable at temperatures as high as 600 C, but only in the probe station environment because suitable packaging technology for sensors and electronics at temperatures of 500 C and beyond did not exist. Thus, packaging technology for SiC-based sensors and electronics is immediately needed for both application and commercialization of high-temperature SiC sensors and electronics. In response to this need, researchers at Glenn designed, fabricated, and assembled a prototype electronic package for high-temperature electronics, sensors, and microelectromechanical systems (MEMS) using aluminum nitride (AlN) substrate and gold (Au) thick-film materials. This prototype package successfully survived a soak test at 500 C in air for 500 hours. Packaging components tested included thick-film high-temperature metallization, internal wire bonds, external lead bonds, and a SiC diode chip die-attachment. Each test loop, which was composed of thick-film printed wire, wire bond, and lead bond was subjected to a 50-mA direct current for 250 hours at 500 C.

Chen, Liang-Yu↗
NASA NTRS2006

Modeling the Elastic Modulus of 2D Woven CVI SiC Composites

The use of fiber, interphase, CVI SiC minicomposites as structural elements for 2D-woven SiC fiber reinforced chemically vapor infiltrated (CVI) SiC matrix composites is demonstrated to be a viable approach to model the elastic modulus of these composite systems when tensile loaded in an orthogonal direction. The 0deg (loading direction) and 90deg (perpendicular to loading direction) oriented minicomposites as well as the open porosity and excess SiC associated with CVI SiC composites were all modeled as parallel elements using simple Rule of Mixtures techniques. Excellent agreement for a variety of 2D woven Hi-Nicalon(TradeMark) fiber-reinforced and Sylramic-iBN reinforced CVI SiC matrix composites that differed in numbers of plies, constituent content, thickness, density, and number of woven tows in either direction (i.e, balanced weaves versus unbalanced weaves) was achieved. It was found that elastic modulus was not only dependent on constituent content, but also the degree to which 90deg minicomposites carried load. This depended on the degree of interaction between 90deg and 0deg minicomposites which was quantified to some extent by composite density. The relationships developed here for elastic modulus only necessitated the knowledge of the fractional contents of fiber, interphase and CVI SiC as well as the tow size and shape. It was concluded that such relationships are fairly robust for orthogonally loaded 2D woven CVI SiC composite system and can be implemented by ceramic matrix composite component modelers and designers for modeling the local stiffness in simple or complex parts fabricated with variable constituent contents.

Morscher, Gregory N.↗
NASA NTRS1998

SiC Technology

Silicon carbide (SiC)-based semiconductor electronic devices and circuits are presently being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors cannot adequately perform. Silicon carbide's ability to function under such extreme conditions is expected to enable significant improvements to a far-ranging variety of applications and systems. These range from greatly improved high-voltage switching [1- 4] for energy savings in public electric power distribution and electric motor drives to more powerful microwave electronics for radar and communications [5-7] to sensors and controls for cleaner-burning more fuel-efficient jet aircraft and automobile engines. In the particular area of power devices, theoretical appraisals have indicated that SiC power MOSFET's and diode rectifiers would operate over higher voltage and temperature ranges, have superior switching characteristics, and yet have die sizes nearly 20 times smaller than correspondingly rated silicon-based devices [8]. However, these tremendous theoretical advantages have yet to be realized in experimental SiC devices, primarily due to the fact that SiC's relatively immature crystal growth and device fabrication technologies are not yet sufficiently developed to the degree required for reliable incorporation into most electronic systems [9]. This chapter briefly surveys the SiC semiconductor electronics technology. In particular, the differences (both good and bad) between SiC electronics technology and well-known silicon VLSI technology are highlighted. Projected performance benefits of SiC electronics are highlighted for several large-scale applications. Key crystal growth and device-fabrication issues that presently limit the performance and capability of high temperature and/or high power SiC electronics are identified.

Neudeck, Philip G.↗
NASA NTRS2004

Homoepitaxial and Heteroepitaxial Growth on Step-Free SiC Mesas

This article describes the initial discovery and development of new approaches to SiC homoepitaxial and heteroepitaxial growth. These approaches are based upon the previously unanticipated ability to effectively supress two-dimensional nucleation of 3C-SiC on large basal plane terraces that form between growth steps when epitaxy is carried out on 4H- and 6H-SiC nearly on-axis substrates. After subdividing the growth surface into mesa regions, pure stepflow homoeptixay with no terrace nucleation was then used to grow all existing surface steps off the edges of screw-dislocation-free mesas, leaving behind perfectly on-axis (0001) basal plane mesa surfaces completely free of atomic-scale steps. Step-free mesa surfaces as large as 0.4 mm x 0.4 mm were experimentally realized, with the yield and size of step-free mesas being initally limited by substrate screw dislocations. Continued epitaxial growth following step-free surface formation leads to the formation of thin lateral cantilevers that extend the step-free surface area from the top edge of the mesa sidewalls. By selecting a proper pre-growth mesa shape and crystallographic orientation, the rate of cantilever growth can be greatly enhanced in a web growth process that has been used to (1) enlarge step-free surface areas and (2) overgrow and laterally relocate micropipes and screw dislocations. A new growth process, named step-free surface heteroepitaxy, has been developed to achieve 3C-SiC films on 4H- and 6H-SiC substrate mesas completely free of double positioning boundary and stacking fault defects. The process is based upon the controlled terrace nucleation and lateral expansion of a single island of 3C-SiC across a step-free mesa surface. Experimental results indicate that substrateepilayer lattice mismatch is at least partially relieved parallel to the interface without dislocations that undesirably thread through the thickness of the epilayer. These results should enable realization of improved SiC homojunction and heterojunction devices. In addition, these experiments offer important insights into the nature of polytypism during SiC crystal growth.

Neudeck, Philip G.↗
NASA NTRS2006

Recent Results from Epitaxial Growth on Step Free 4H-SiC Mesas

This paper updates recent progress made in growth, characterization, and understanding of high quality homoepitaxial and heteroepitaxial films grown on step-free 4H-SiC mesas. First, we report initial achievement of step-free 4H-SiC surfaces with carbon-face surface polarity. Next, we will describe further observations of how step-free 4H-SiC thin lateral cantilever evolution is significantly impacted by crystal faceting behavior that imposes non-uniform film thickness on cantilever undersides. Finally, recent investigations of in-plane lattice constant mismatch strain relief mechanisms observed for heteroepitaxial growth of 3C-SiC as well as 2H-AlN/GaN heterofilms on step-free 4H-SiC mesas will be reviewed. In both cases, the complete elimination of atomic heterointerface steps on the mesa structure enables uniquely well-ordered misfit dislocation arrays to form near the heterointerfaces with remarkable lack of dislocations threading vertically into the heteroepilayers. In the case of 3C-SiC heterofilms, it has been proposed that dislocation half-loops nucleate at mesa edges and glide laterally along the step-free 3C/4H interfaces. In contrast, 3C-SiC and 2H-AlN/GaN heterofilms grown on 4H-SiC mesas with steps exhibit highly disordered interface misfit dislocation structure coupled with 100X greater density of dislocations threading through the thickness of the heteroepilayers. These results indicate that the presence of steps at the heteroepitaxial interface (i.e., on the initial heteroepitaxial nucleation surface) plays a highly important role in the defect structure, quality, and relaxation mechanisms of single-crystal heteroepitaxial films.

Neudeck, Philip G.↗
DOE OSTI2025

Micromechanical Properties of the SiC and Pyrolytic Carbon Layers in Tristructural-Isotropic Coated Particles

Tristructural isotropic (TRISO) coated particle fuel was initially developed for high temperature gas cooled reactors (HTGR) and has been proposed for several other advanced reactor concepts. The design of TRISO particles focuses on preventing the release of fission products in normal and off-normal reactor conditions. The particle design features an actinide bearing fuel kernel that is surrounded by three pyrolytic carbon (PyC) layers and a silicon carbide layer (SiC). The mechanical stability of the particle and fission product retention for both metallic and gaseous fission products depend on the SiC layer. Post irradiation examination (PIE) of TRISO fuel from the first two US DOE Advanced Gas Reactor Fuel Development and Qualification Program irradiation campaigns, AGR-1 and AGR-2, had identified a low rate of particles exhibiting cracking in the SiC layer that did not propagate across the SiC layer. While cracking in the SiC is rare for test conditions and particles associated with the AGR program, understanding the stress state and mechanical properties of the SiC and PyC layers related to particle architecture can aid predicting thermomechanical response of TRISO fuel under the prescribed operation envelope and beyond as well as aiding in the development of similar fuel concepts for other advanced reactors. The presented investigation shows the relationship of the mechanical properties and mechanical response (e.g., understanding crack propagation) of the SiC and PyC layers relative to position within the particle. Testing was conducted on the inner and outer PyC layers of TRISO particles to quantify differences in mechanical behavior.

Montoya, Katherine [ORNL] (ORCID:0000000326955086)↗
NASA NTRS1998

Breakdown Degradation Associated with Elementary Screw Dislocations in 4H-SiC P(+)N Junction Rectifiers

It is well-known that SiC wafer quality deficiencies are delaying the realization of outstandingly superior 4H-SiC power electronics. While efforts to date have centered on eradicating micropipes (i.e., hollow core super-screw dislocations with Burgers vector greater than 2c), 4H-SiC wafers and epilayers also contain elementary screw dislocations (i.e., Burgers vector = lc with no hollow core) in densities on the order of thousands per sq cm, nearly 100-fold micropipe densities. This paper describes an initial study into the impact of elementary screw dislocations on the reverse-bias current-voltage (I-V) characteristics of 4H-SiC p(+)n diodes. First, Synchrotron White Beam X-ray Topography (SWBXT) was employed to map the exact locations of elementary screw dislocations within small-area 4H-SiC p(+)n mesa diodes. Then the high-field reverse leakage and breakdown properties of these diodes were subsequently characterized on a probing station outfitted with a dark box and video camera. Most devices without screw dislocations exhibited excellent characteristics, with no detectable leakage current prior to breakdown, a sharp breakdown I-V knee, and no visible concentration of breakdown current. In contrast devices that contained at least one elementary screw dislocation exhibited a 5% to 35% reduction in breakdown voltage, a softer breakdown I-V knee, and visible microplasmas in which highly localized breakdown current was concentrated. The locations of observed breakdown microplasmas corresponded exactly to the locations of elementary screw dislocations identified by SWBXT mapping. While not as detrimental to SiC device performance as micropipes, the undesirable breakdown characteristics of elementary screw dislocations could nevertheless adversely affect the performance and reliability of 4H-SiC power devices.

Neudeck, P. G.↗
NASA NTRS2008

SiC JFET Transistor Circuit Model for Extreme Temperature Range

A technique for simulating extreme-temperature operation of integrated circuits that incorporate silicon carbide (SiC) junction field-effect transistors (JFETs) has been developed. The technique involves modification of NGSPICE, which is an open-source version of the popular Simulation Program with Integrated Circuit Emphasis (SPICE) general-purpose analog-integrated-circuit-simulating software. NGSPICE in its unmodified form is used for simulating and designing circuits made from silicon-based transistors that operate at or near room temperature. Two rapid modifications of NGSPICE source code enable SiC JFETs to be simulated to 500 C using the well-known Level 1 model for silicon metal oxide semiconductor field-effect transistors (MOSFETs). First, the default value of the MOSFET surface potential must be changed. In the unmodified source code, this parameter has a value of 0.6, which corresponds to slightly more than half the bandgap of silicon. In NGSPICE modified to simulate SiC JFETs, this parameter is changed to a value of 1.6, corresponding to slightly more than half the bandgap of SiC. The second modification consists of changing the temperature dependence of MOSFET transconductance and saturation parameters. The unmodified NGSPICE source code implements a T(sup -1.5) temperature dependence for these parameters. In order to mimic the temperature behavior of experimental SiC JFETs, a T(sup -1.3) temperature dependence must be implemented in the NGSPICE source code. Following these two simple modifications, the Level 1 MOSFET model of the NGSPICE circuit simulation program reasonably approximates the measured high-temperature behavior of experimental SiC JFETs properly operated with zero or reverse bias applied to the gate terminal. Modification of additional silicon parameters in the NGSPICE source code was not necessary to model experimental SiC JFET current-voltage performance across the entire temperature range from 25 to 500 C.

Neudeck, Philip G.↗
NASA NTRS2011

Fabrication and Characterization of Brazed Joints for SiC-Metallic Systems Utilizing Refractory Metals

Metal to ceramic joining plays a key role for the integration of ceramics into many nuclear, ground and aero based technologies. In order to facilitate these technologies, the active metal brazing of silicon carbide (CVD beta-SiC, 1.1 mm thick, and hot-pressed alpha-SiC, 3 mm thick) to the refractory metals molybdenum and tungsten using active braze alloys was studied. The joint microstructure, composition, and microhardness were evaluated by optical microscopy (OM), scanning electron microscopy (SEM), energy dispersive spectroscopy (EDS), and Knoop hardness testing. The braze alloys, Cusil-ABA, Ticusil and Copper-ABA, all formed sound joints with excellent wetting and chemical bonding with the SiC substrate. Despite the close thermal expansion match between the metal substrates and SiC, hairline cracks formed in alpha-SiC while beta-SiC showed no signs of residual stress cracking. The use of ductile interlayers to reduce the effect from residual stresses was investigated and joints formed with copper as an interlayer produced crack free systems utilizing both CVD and hot-pressed SiC.

Coddington, Bryan↗