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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

NEAMS Milestone Report: M2MS–20OR030102 FW–CADIS PWR Ex-Core Analysis with Shift Through VERA

This report presents the work completed for the NEAMS milestone M2MS–20OR030102 titled "FW–CADIS PWR Ex-Core Analysis with Shift through VERA." The work completed for this milestone includes the implementation, integration, and optimization of memory and performance improvement methods in Shift for fully coupled ex-core calculations through Virtual Environment for Reactor Applications (VERA). Fully coupled in this context means the transfer of moderator boron concentration, pin-wise fission source, depleted compositions, temperatures, and moderator densities from MPACT (with COBRA-TF (CTF)) to Shift. The ability to run ex-core calculations with VERA has been enabled and used for several years by Consortium for Advanced Simulation of Light Water Reactors (CASL) partners. However, this implementation was limited and potentially computationally burdensome. This work has enabled the ability to run higher-fidelity ex-core calculations on moderate computing clusters by focusing on multithreading, domain decomposition, and Forward-Weighted CADIS (FW-CADIS) variance reduction. Tests performed on small cores, a small modular reactor (SMR), and CASL progression problems show very promising memory reduction and computational performance. Recommendations for settings when running fully coupled high-fidelity ex-core calculations with VERA are documented. Without these optimization methods, many processors on a compute node would be left unused for the entire ex-core calculation. Therefore, these methods enable the user to better use the resources available and reduce computation time.

22 GENERAL STUDIES OF NUCLEAR REACTORS↗
DOE OSTI2024

Celeritas R&D Report: Accelerating Geant4

Celeritas is a new Monte Carlo (MC) detector simulation code designed for computationally intensive applications on high-performance heterogeneous architectures. In the past two years Celeritas has advanced from prototyping a Graphics Processing Unit (GPU)-based single physics model in infinite medium to implementing a full set of electromagnetic (EM) physics processes in complex geometries. The current release of Celeritas, version 0.4, has incorporated full device-based navigation, an event loop in the presence of magnetic fields, and detector hit scoring. New functionality incorporates a scheduler to offload electromagnetic physics to the GPU within a Geant4-driven simulation, enabling straightforward integration of Celeritas into the high energy physics (HEP) experimental frameworks CMSSW and ATLAS FullSimLight. On the Perlmutter supercomputer, Celeritas performs EM physics between 3× and 18× faster using the machine’s Nvidia GPUs compared to using only CPUs, corresponding to an electrical power efficiency up to a factor of 5. When running a multithreaded Geant4 ATLAS test beam application with full hadronic physics, using Celeritas to accelerate the EM physics results in an overall simulation speedup of 1.7–2.2× on GPU and 1.2× on CPU. In a CMS test application using tt¯ events and the prototype Run 4 configuration, compared to Geant4 CPU, Celeritas with a Nvidia A100 improves overall throughput up to a factor of 2.7× but cannot be efficiently shared with more than 8 cores.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2026

Developing a GUI for the Robotic Test Stand

The introduction of this poster explains the technology behind DUNE’s far and near detectors and how passing neutrinos generate electrons that drift into a wire grid. I then explain how 3 ASICs manage signals received from electron interception. Next, the poster states how COLDATA chips are undergoing quality control by a Robotic Test Stand using a state machine. I further explained how earlier tests were done via a command line script and the necessity to implement a user-friendly Graphical User Interface with new features a command line can’t implement. For the implementation section, tools and methods for implementation are listed such as Python, tkinter, and GitHub as well as how multithreading and queue implementation was necessary for GUI functionality. Then, I elaborated on the GUIs new features. Finally, I explain how the GUI will be distributed across multiple institutions and future changes planned for the GUI. Photos of the RTS, far detector cave, diagram of anode assembly plane, COLDATA chips, set up tab, result tab, and legacy command line interface are shown.

Gutierrez Villanueva, Jaziel [DuPage Coll.]↗
NASA NTRS1990

Transition flight control room automation

The Workstation Prototype Laboratory is currently working on a number of projects which can have a direct impact on ground operations automation. These projects include: (1) The fuel cell monitoring system (FCMS), which will monitor and detect problems with the fuel cells on the shuttle. FCMS will use a combination of rules (forward/backward) and multithreaded procedures, which run concurrently with the rules, to implement the malfunction algorithms of the EGIL flight controllers. The combination of rule-based reasoning and procedural reasoning allows us to more easily map the malfunction algorithms into a real-time system implementation. (2) A graphical computation language (AGCOMPL) is an experimental prototype to determine the benefits and drawbacks of using a graphical language to design computations (algorithms) to work on shuttle or space station telemetry and trajectory data. (3) The design of a system will allow a model of an electrical system, including telemetry sensors, to be configured on the screen graphically using previously defined electrical icons. This electrical model would then be used to generate rules and procedures for detecting malfunctions in the electrical components of the model. (4) A generic message management (GMM) system is being designed for real-time applications as a message management system which sends advisory messages to a user. The primary purpose of GMM is to reduce the risk of overloading a user with information when multiple failures occur and to assist the developer in the devising an explanation facility. The emphasis of our work is to develop practical tools and techniques, including identification of appropriate software tools to support research, application, and tool building activities, while determining the feasibility of a given approach.

Welborn, Curtis Ray↗
NASA NTRS1993

Avoiding and tolerating latency in large-scale next-generation shared-memory multiprocessors

A scalable solution to the memory-latency problem is necessary to prevent the large latencies of synchronization and memory operations inherent in large-scale shared-memory multiprocessors from reducing high performance. We distinguish latency avoidance and latency tolerance. Latency is avoided when data is brought to nearby locales for future reference. Latency is tolerated when references are overlapped with other computation. Latency-avoiding locales include: processor registers, data caches used temporally, and nearby memory modules. Tolerating communication latency requires parallelism, allowing the overlap of communication and computation. Latency-tolerating techniques include: vector pipelining, data caches used spatially, prefetching in various forms, and multithreading in various forms. Relaxing the consistency model permits increased use of avoidance and tolerance techniques. Each model is a mapping from the program text to sets of partial orders on program operations; it is a convention about which temporal precedences among program operations are necessary. Information about temporal locality and parallelism constrains the use of avoidance and tolerance techniques. Suitable architectural primitives and compiler technology are required to exploit the increased freedom to reorder and overlap operations in relaxed models.

Probst, David K.↗
NASA NTRS1992

A simple modern correctness condition for a space-based high-performance multiprocessor

A number of U.S. national programs, including space-based detection of ballistic missile launches, envisage putting significant computing power into space. Given sufficient progress in low-power VLSI, multichip-module packaging and liquid-cooling technologies, we will see design of high-performance multiprocessors for individual satellites. In very high speed implementations, performance depends critically on tolerating large latencies in interprocessor communication; without latency tolerance, performance is limited by the vastly differing time scales in processor and data-memory modules, including interconnect times. The modern approach to tolerating remote-communication cost in scalable, shared-memory multiprocessors is to use a multithreaded architecture, and alter the semantics of shared memory slightly, at the price of forcing the programmer either to reason about program correctness in a relaxed consistency model or to agree to program in a constrained style. The literature on multiprocessor correctness conditions has become increasingly complex, and sometimes confusing, which may hinder its practical application. We propose a simple modern correctness condition for a high-performance, shared-memory multiprocessor; the correctness condition is based on a simple interface between the multiprocessor architecture and a high-performance, shared-memory multiprocessor; the correctness condition is based on a simple interface between the multiprocessor architecture and the parallel programming system.

Probst, David K.↗
NASA NTRS1992

The University of Hawaii Institute for Astronomy CCD camera control system

The University of Hawaii Institute for Astronomy CCD Camera Control System consists of a NeXT workstation, a graphical user interface, and a fiber optics communications interface which is connected to a San Diego State University CCD controller. The UH system employs the NeXT-resident Motorola DSP 56001 as a real time hardware controller. The DSP 56001 is interfaced to the Mach-based UNIX of the NeXT workstation by DMA and multithreading. Since the SDSU controller also uses the DPS 56001, the NeXT is used as a development platform for the embedded control software. The fiber optic interface links the two DSP 56001's through their Synchronous Serial Interfaces. The user interface is based on the NeXTStep windowing system. It is easy to use and features real-time display of image data and control over all camera functions. Both Loral and Tektronix 2048 x 2048 CCD's have been driven at full readout speeds, and the system is intended to be capable of simultaneous readout of four such CCD's. The total hardware package is compact enough to be quite portable and has been used on five different telescopes on Mauna Kea. The complete CCD control system can be assembled for a very low cost. The hardware and software of the control system has proven to be quite reliable, well adapted to the needs of astronomers, and extensible to increasingly complicated control requirements.

Jim, K. T. C.↗
NASA NTRS1998

Algorithms and Libraries

This exploratory study initiated our inquiry into algorithms and applications that would benefit by latency tolerant approach to algorithm building, including the construction of new algorithms where appropriate. In a multithreaded execution, when a processor reaches a point where remote memory access is necessary, the request is sent out on the network and a context--switch occurs to a new thread of computation. This effectively masks a long and unpredictable latency due to remote loads, thereby providing tolerance to remote access latency. We began to develop standards to profile various algorithm and application parameters, such as the degree of parallelism, granularity, precision, instruction set mix, interprocessor communication, latency etc. These tools will continue to develop and evolve as the Information Power Grid environment matures. To provide a richer context for this research, the project also focused on issues of fault-tolerance and computation migration of numerical algorithms and software. During the initial phase we tried to increase our understanding of the bottlenecks in single processor performance. Our work began by developing an approach for the automatic generation and optimization of numerical software for processors with deep memory hierarchies and pipelined functional units. Based on the results we achieved in this study we are planning to study other architectures of interest, including development of cost models, and developing code generators appropriate to these architectures.

Dongarra, Jack↗
NASA NTRS2000

Performance Assessment of OVERFLOW on Distributed Computing Environment

The aerodynamic computer code, OVERFLOW, with a multi-zone overset grid feature, has been parallelized to enhance its performance on distributed and shared memory paradigms. Practical application benchmarks have been set to assess the efficiency of code's parallelism on high-performance architectures. The code's performance has also been experimented with in the context of the distributed computing paradigm on distant computer resources using the Information Power Grid (IPG) toolkit, Globus. Two parallel versions of the code, namely OVERFLOW-MPI and -MLP, have developed around the natural coarse grained parallelism inherent in a multi-zonal domain decomposition paradigm. The algorithm invokes a strategy that forms a number of groups, each consisting of a zone, a cluster of zones and/or a partition of a large zone. Each group can be thought of as a process with one or multithreads assigned to it and that all groups run in parallel. The -MPI version of the code uses explicit message-passing based on the standard MPI library for sending and receiving interzonal boundary data across processors. The -MLP version employs no message-passing paradigm; the boundary data is transferred through the shared memory. The -MPI code is suited for both distributed and shared memory architectures, while the -MLP code can only be used on shared memory platforms. The IPG applications are implemented by the -MPI code using the Globus toolkit. While a computational task is distributed across multiple computer resources, the parallelism can be explored on each resource alone. Performance studies are achieved with some practical aerodynamic problems with complex geometries, consisting of 2.5 up to 33 million grid points and a large number of zonal blocks. The computations were executed primarily on SGI Origin 2000 multiprocessors and on the Cray T3E. OVERFLOW's IPG applications are carried out on NASA homogeneous metacomputing machines located at three sites, Ames, Langley and Glenn. Plans for the future will exploit the distributed parallel computing capability on various homogeneous and heterogeneous resources and large scale benchmarks. Alternative IPG toolkits will be used along with sophisticated zonal grouping strategies to minimize the communication time across the computer resources.

Djomehri, M. Jahed↗
NASA NTRS2001

Hiding the Disk and Network Latency of Out-of-Core Visualization

This paper describes an algorithm that improves the performance of application-controlled demand paging for out-of-core visualization by hiding the latency of reading data from both local disks or disks on remote servers. The performance improvements come from better overlapping the computation with the page reading process, and by performing multiple page reads in parallel. The paper includes measurements that show that the new multithreaded paging algorithm decreases the time needed to compute visualizations by one third when using one processor and reading data from local disk. The time needed when using one processor and reading data from remote disk decreased by two thirds. Visualization runs using data from remote disk actually ran faster than ones using data from local disk because the remote runs were able to make use of the remote server's high performance disk array.

Ellsworth, David↗
NASA NTRS2003

Propel: Tools and Methods for Practical Source Code Model Checking

The work reported here is an overview and snapshot of a project to develop practical model checking tools for in-the-loop verification of NASA s mission-critical, multithreaded programs in Java and C++. Our strategy is to develop and evaluate both a design concept that enables the application of model checking technology to C++ and Java, and a model checking toolset for C++ and Java. The design concept and the associated model checking toolset is called Propel. It builds upon the Java PathFinder (JPF) tool, an explicit state model checker for Java applications developed by the Automated Software Engineering group at NASA Ames Research Center. The design concept that we are developing is Design for Verification (D4V). This is an adaption of existing best design practices that has the desired side-effect of enhancing verifiability by improving modularity and decreasing accidental complexity. D4V, we believe, enhances the applicability of a variety of V&V approaches; we are developing the concept in the context of model checking. The model checking toolset, Propel, is based on extending JPF to handle C++. Our principal tasks in developing the toolset are to build a translator from C++ to Java, productize JPF, and evaluate the toolset in the context of D4V. Through all these tasks we are testing Propel capabilities on customer applications.

Mansouri-Samani, Massoud↗
NASA NTRS2004

Precise and Efficient Static Array Bound Checking for Large Embedded C Programs

In this paper we describe the design and implementation of a static array-bound checker for a family of embedded programs: the flight control software of recent Mars missions. These codes are large (up to 250 KLOC), pointer intensive, heavily multithreaded and written in an object-oriented style, which makes their analysis very challenging. We designed a tool called C Global Surveyor (CGS) that can analyze the largest code in a couple of hours with a precision of 80%. The scalability and precision of the analyzer are achieved by using an incremental framework in which a pointer analysis and a numerical analysis of array indices mutually refine each other. CGS has been designed so that it can distribute the analysis over several processors in a cluster of machines. To the best of our knowledge this is the first distributed implementation of static analysis algorithms. Throughout the paper we will discuss the scalability setbacks that we encountered during the construction of the tool and their impact on the initial design decisions.

Venet, Arnaud↗
NASA NTRS2004

A Scalable Nonuniform Pointer Analysis for Embedded Program

In this paper we present a scalable pointer analysis for embedded applications that is able to distinguish between instances of recursively defined data structures and elements of arrays. The main contribution consists of an efficient yet precise algorithm that can handle multithreaded programs. We first perform an inexpensive flow-sensitive analysis of each function in the program that generates semantic equations describing the effect of the function on the memory graph. These equations bear numerical constraints that describe nonuniform points-to relationships. We then iteratively solve these equations in order to obtain an abstract storage graph that describes the shape of data structures at every point of the program for all possible thread interleavings. We bring experimental evidence that this approach is tractable and precise for real-size embedded applications.

Venet, Arnaud↗
NASA NTRS2005

Toward a Benchmark for Multi-Threaded Testing Tools

Looking for intermittent bugs is a problem that has been getting prominence in testing. Multi-threaded code is becoming very common, mostly on the server side. As there is no silver bullet solution, research focuses on a variety of partial solutions. We outline a road map for combining the research on the different disciplines of testing multi-threaded programs and on evaluating its quality. The project goals are to create a benchmark that can be used to evaluate different solutions, to create a framework with open API's that enables combining techniques in the multithreading domain, and to create a focus for the research in this area around which a community of people who try to solve similar problems with different techniques, could congregate. The benchmark, apart from containing programs with documented bugs, includes other artifacts, such as traces, that are used for evaluating some of the technologies. We have started creating such a bench mrk and detail the lesson learned in the process. The framework will enable technology developers, for example, race detectors, to concentrate on their components and use other ready made components, (e.g., instrumentor) to create a testing solution.

Eytani, Yaniv↗
NASA NTRS2006

SALT: The Simulator for the Analysis of LWP Timing

With the emergence of new processor architectures that are highly multithreaded, and support features such as full/empty memory semantics and split-phase memory transactions, the need for a processor simulator to handle these features becomes apparent. This paper describes such a simulator, called SALT.

simulation↗
NASA NTRS2008

Program Model Checking: A Practitioner's Guide

Program model checking is a verification technology that uses state-space exploration to evaluate large numbers of potential program executions. Program model checking provides improved coverage over testing by systematically evaluating all possible test inputs and all possible interleavings of threads in a multithreaded system. Model-checking algorithms use several classes of optimizations to reduce the time and memory requirements for analysis, as well as heuristics for meaningful analysis of partial areas of the state space Our goal in this guidebook is to assemble, distill, and demonstrate emerging best practices for applying program model checking. We offer it as a starting point and introduction for those who want to apply model checking to software verification and validation. The guidebook will not discuss any specific tool in great detail, but we provide references for specific tools.

Pressburger, Thomas T.↗
NASA NTRS2008

MACOS Version 3.31

Version 3.31 of Modeling and Analysis for Controlled Optical Systems (MACOS) has been released. MACOS is an easy-to-use computer program for modeling and analyzing the behaviors of a variety of optical systems, including systems that have large, segmented apertures and are aligned with the technology of wavefront sensing and control. Two previous versions were described in "Improved Software for Modeling Controlled Optical Systems" (NPO-19841) NASA Tech Briefs, Vol. 21, No. 12 (December 1997), page 42 and "Optics Program Modified for Multithreaded Parallel Computing" (NPO-40572) NASA Tech Briefs, Vol. 30, No. 1 (January 2006) page 13a. The present version incorporates the following enhancements over prior versions: a) A powerful system-optimization facility includes algorithms for linear, nonlinear, unconstrained, and constrained optimization of optical systems under a variety of settings. b) There is now enhanced capability to perturb optical components individually and on subsystem levels, and to optimize system performance by adjusting selected individual components as well as subsystems. c) Capabilities for modeling a variety of new optical aperture types have been added. d) Effects of multilayer thin-film coats on optical surfaces can now be taken into account when tracing polarized rays. e) Major software-engineering work was performed to make MACOS more reliable, flexible, and manageable for purposes of maintenance and further development.

Redding, David↗
NASA NTRS2006

NASA Tech Briefs, January 2006

Topics covered include: Semiautonomous Avionics-and-Sensors System for a UAV; Biomimetic/Optical Sensors for Detecting Bacterial Species; System Would Detect Foreign-Object Damage in Turbofan Engine; Detection of Water Hazards for Autonomous Robotic Vehicles; Fuel Cells Utilizing Oxygen From Air at Low Pressures; Hybrid Ion-Detector/Data-Acquisition System for a TOF-MS; Spontaneous-Desorption Ionizer for a TOF-MS; Equipment for On-Wafer Testing From 220 to 325 GHz; Computing Isentropic Flow Properties of Air/R-134a Mixtures; Java Mission Evaluation Workstation System; Using a Quadtree Algorithm To Assess Line of Sight; Software for Automated Generation of Cartesian Meshes; Optics Program Modified for Multithreaded Parallel Computing; Programs for Testing Processor-in-Memory Computing Systems; PVM Enhancement for Beowulf Multiple-Processor Nodes; Ion-Exclusion Chromatography for Analyzing Organics in Water; Selective Plasma Deposition of Fluorocarbon Films on SAMs; Water-Based Pressure-Sensitive Paints; System Finds Horizontal Location of Center of Gravity; Predicting Tail Buffet Loads of a Fighter Airplane; Water Containment Systems for Testing High-Speed Flywheels; Vapor-Compression Heat Pumps for Operation Aboard Spacecraft; Multistage Electrophoretic Separators; Recovering Residual Xenon Propellant for an Ion Propulsion System; Automated Solvent Seaming of Large Polyimide Membranes; Manufacturing Precise, Lightweight Paraboloidal Mirrors; Analysis of Membrane Lipids of Airborne Micro-Organisms; Noninvasive Diagnosis of Coronary Artery Disease Using 12-Lead High-Frequency Electrocardiograms; Dual-Laser-Pulse Ignition; Enhanced-Contrast Viewing of White-Hot Objects in Furnaces; Electrically Tunable Terahertz Quantum-Cascade Lasers; Few-Mode Whispering-Gallery-Mode Resonators; Conflict-Aware Scheduling Algorithm; and Real-Time Diagnosis of Faults Using a Bank of Kalman Filters.

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