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At least 73 records · Page 4

Filling the Assurance Gap on Complex Electronics

Many of the methods used to develop software bare a close resemblance to Complex Electronics (CE) development. CE are now programmed to perform tasks that were previously handled by software, such as communication protocols. For example, the James Webb Space Telescope will use Field Programmable Gate Arrays (FPGAs), which can have over a million logic gates, to send telemetry. System-on-chip (SoC) devices, another type of complex electronics, can combine a microprocessor, input and output channels, and sometimes an FPGA for programmability. With this increased intricacy, the possibility of software-like bugs such as incorrect design, logic, and unexpected interactions within the logic is great. Since CE devices are obscuring the hardware/software boundary, mature software methodologies have been proposed, with slight modifications, to develop these devices. By using standardized S/W Engineering methods such as checklists, missing requirements and bugs can be detected earlier in the development cycle, thus creating a development process for CE that can be easily maintained and configurable based on the device used.

Plastow, Richard A.

Remote Memory Access Protocol Target Node Intellectual Property

The MagnetoSpheric Multiscale (MMS) mission had a requirement to use the Remote Memory Access Protocol (RMAP) over its SpaceWire network. At the time, no known intellectual property (IP) cores were available for purchase. Additionally, MMS preferred to implement the RMAP functionality with control over the low-level details of the design. For example, not all the RMAP standard functionality was needed, and it was desired to implement only the portions of the RMAP protocol that were needed. RMAP functionality had been previously implemented in commercial off-the-shelf (COTS) products, but the IP core was not available for purchase. The RMAP Target IP core is a VHDL (VHSIC Hardware Description Language description of a digital logic design suitable for implementation in an FPGA (field-programmable gate array) or ASIC (application-specific integrated circuit) that parses SpaceWire packets that conform to the RMAP standard. The RMAP packet protocol allows a network host to access and control a target device using address mapping. This capability allows SpaceWire devices to be managed in a standardized way that simplifies the hardware design of the device, as well as the development of the software that controls the device. The RMAP Target IP core has some features that are unique and not specified in the RMAP standard. One such feature is the ability to automatically abort transactions if the back-end logic does not respond to read/write requests within a predefined time. When a request times out, the RMAP Target IP core automatically retracts the request and returns a command response with an appropriate status in the response packet s header. Another such feature is the ability to control the SpaceWire node or router using RMAP transactions in the extended address range. This allows the SpaceWire network host to manage the SpaceWire network elements using RMAP packets, which reduces the number of protocols that the network host needs to support.

Haddad, Omar

Design document for the MOODS Data Management System (MDMS), version 1.0

The MOODS Data Management System (MDMS) provides access to the Master Oceanographic Observation Data Set (MOODS) which is maintained by the Naval Oceanographic Office (NAVOCEANO). The MDMS incorporates database technology in providing seamless access to parameter (temperature, salinity, soundspeed) vs. depth observational profile data. The MDMS is an interactive software application with a graphical user interface (GUI) that supports user control of MDMS functional capabilities. The purpose of this document is to define and describe the structural framework and logical design of the software components/units which are integrated into the major computer software configuration item (CSCI) identified as MDMS, Version 1.0. The preliminary design is based on functional specifications and requirements identified in the governing Statement of Work prepared by the Naval Oceanographic Office (NAVOCEANO) and distributed as a request for proposal by the National Aeronautics and Space Administration (NASA).

Source record

Economical Implementation of a Filter Engine in an FPGA

A logic design has been conceived for a field-programmable gate array (FPGA) that would implement a complex system of multiple digital state-space filters. The main innovative aspect of this design lies in providing for reuse of parts of the FPGA hardware to perform different parts of the filter computations at different times, in such a manner as to enable the timely performance of all required computations in the face of limitations on available FPGA hardware resources. The implementation of the digital state-space filter involves matrix vector multiplications, which, in the absence of the present innovation, would ordinarily necessitate some multiplexing of vector elements and/or routing of data flows along multiple paths. The design concept calls for implementing vector registers as shift registers to simplify operand access to multipliers and accumulators, obviating both multiplexing and routing of data along multiple paths. Each vector register would be reused for different parts of a calculation. Outputs would always be drawn from the same register, and inputs would always be loaded into the same register. A simple state machine would control each filter. The output of a given filter would be passed to the next filter, accompanied by a "valid" signal, which would start the state machine of the next filter. Multiple filter modules would share a multiplication/accumulation arithmetic unit. The filter computations would be timed by use of a clock having a frequency high enough, relative to the input and output data rate, to provide enough cycles for matrix and vector arithmetic operations. This design concept could prove beneficial in numerous applications in which digital filters are used and/or vectors are multiplied by coefficient matrices. Examples of such applications include general signal processing, filtering of signals in control systems, processing of geophysical measurements, and medical imaging. For these and other applications, it could be advantageous to combine compact FPGA digital filter implementations with other application-specific logic implementations on single integrated-circuit chips. An FPGA could readily be tailored to implement a variety of filters because the filter coefficients would be loaded into memory at startup.

Kowalski, James E.

Mod-5A wind turbine generator program design report. Volume 4: Drawings and specifications, book 4

The design, development and analysis of the 7.3 MW MOD-5A wind turbine generator are documented. There are four volumes. This volume contains the drawings and specifications that were developed in preparation for building the MOD-5A wind turbine generator. This volume contains 5 books of which this is the fourth, providing drawings 47A380128 through 47A387125. In addition to the parts listing and where-used list, the logic design of the controller software and the code listing of the controller software are provided. Also given are the aerodynamic profile coordinates.

Source record

Evaluation of structural design concepts for an arrow-wing supersonic cruise aircraft

An analytical study was performed to determine the best structural approach for design of primary wing and fuselage structure of a Mach 2.7 arrow wing supersonic cruise aircraft. Concepts were evaluated considering near term start of design. Emphasis was placed on the complex interactions between thermal stress, static aeroelasticity, flutter, fatigue and fail safe design, static and dynamic loads, and the effects of variations in structural arrangements, concepts and materials on these interactions. Results indicate that a hybrid wing structure incorporating low profile convex beaded and honeycomb sandwich surface panels of titanium alloy 6Al-4V were the most efficient. The substructure includes titanium alloy spar caps reinforced with boron polyimide composites. The fuselage shell consists of hat stiffened skin and frame construction of titanium alloy 6Al-4V. A summary of the study effort is presented, and a discussion of the overall logic, design philosophy and interaction between the analytical methods for supersonic cruise aircraft design are included.

Sakata, I. F.

Design study of structural concepts for an arrow-wing supersonic-cruise aircraft

An analytical study was performed to determine the best structural approach for design of primary wing and fuselage structure of a Mach number 2.7 arrow-wing supersonic cruise aircraft. Concepts were evaluated considering near-term start-of-design. Emphasis was placed on the complex interactions between thermal stress, static aeroelasticity, flutter, fatigue and fail-safe design, static and dynamic loads, and the effects of variations in structural arrangements, concepts and materials on these interactions. Results indicate that a hybrid wing structure incorporating low-profile convex-beaded and honeycomb sandwich surface panels of titanium alloy 6Al-4V were the most efficient. The substructure includes titanium alloy spar caps reinforced with Boron-polyimide composites. The fuselage shell is a closed-hat stiffened skin and frame construction of titanium alloy 6Al-4V. This paper presents an executive summary of the study effort, and includes a discussion of the overall study logic, design philosophy and interaction between the analytical methods for supersonic cruise aircraft design.

Sakata, I. F.

5G Energy FRAME Report on 5G for Grid Use Case (Year 3 Final Report)

This report provides an extensive overview of the interrelationships among energy, communication, and computing—especially in the context of decarbonization goals, challenges, and opportunities. Technical examples enabled by 5G technologies and their performance are presented, discussed, based on the experiment performed at Pacific Northwest National Laboratory. This is the first use case focused on using 5G for the U.S. power grid and will be referred to as the 5G for Grid Use Case from here on. Specifically, this use case looks at the workflow, which integrates the performance data of a real-world 5G communication testbed and a grid transmission and distribution co-simulation platform. The cross-domain information flow and logic design are illustrated with a combination of power grid contingencies and events. Lastly, a summary of the project achievement and outcome is provided, along with a technology roadmap envisioned by the project team.

24 POWER TRANSMISSION AND DISTRIBUTION

Evaluation of Real-Time Mitigation Techniques forCyber Security in IEC 61850 / IEC 62351Substations

This paper presents the design logic and implementation aspects of three potential real-time mitigation techniques capable of countering GOOSE-based attacks: (i) IEC 62351-compliant message authentication code (MAC) scheme, (ii) a semantics-enforced rule- based intrusion detection system (IDS), and (iii) a hybrid approach integrating both MAC verification and Intrusion Detection System (IDS). A comparative evaluation of these real-time mitigation approaches is conducted using a cyber-physical system(CPS) security testbed. The results show that the hybrid integration significantly enhances mitigation capability. Furthermore, the processing delays of all three methods remain within the strict delivery requirements of GOOSE communication. The study also identifies limitations that none of the techniques can fully address, highlighting areas for future work.

Liu, Chen-Ching [Virginia Polytechnic Inst. and St

Digital techniques used in the steering apparatus of the GPO steerable aerial at Goonhilly Downs

A discription of the logic design for the digital control equipment is followed by further descriptions of items of particular interest. The means of applying off-sets to the demanded aerial position for over-coming possible inaccuracy of the predicted orbit; and to demand accuratly determined velocities manually; means of conversion from pure binary form to provide displays in terms of angles, and the derivation of analogue voltages for the for the servo-amplifiers are discussed in detail. A critical analysis of the equipment in the light of operational experience concludes the paper.

TRACKING STATION

Washout circuit design for multi-degrees-of-freedom moving base simulators.

A mathematical framework is presented for designing logic to accept motion-dependent parameters from a simulation, attenuating them ('washing them out'), and generating appropriately limited drive signals. This framework is sufficiently general to encompass six-degree-of-freedom simulators with large motion capability. Emphasis is placed on preserving certain motion cue relations (such as those that would be observed in coordinated flight). Strategies for simulating side forces via tilts are shown. Finally, several specific circuits are shown. These circuits have proven to be readily adaptable to a variety of moving-base simulators.

Conrad, B.

Digital adaptive flight controller development

The development of a digital adaptive flight control algorithm is described that combines a weighted least squares estimator with optimal linear regulator control logic designed to minimize a quadratic model following performance index. Very promising results for a typical fighter aircraft's trajectory over six distinct flight conditions are reported.

Kaufman, H.