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68 records · Page 4

All sources NASA NTRS DOE OSTI

DOE OSTI2021

First demonstration of robust tri-gate β-Ga 2 O 3 nano-membrane field-effect transistors

Nano-membrane tri-gate β-gallium oxide (β-Ga 2 O 3 ) field-effect transistors (FETs) on SiO 2 /Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized features can be defined with the footprint channel width of 50 nm. For high-quality interface between β-Ga 2 O 3 and gate dielectric, atomic layer-deposited 15 nm thick aluminum oxide (Al 2 O 3 ) was utilized with tri-methyl-aluminum (TMA) self-cleaning surface treatment. The fabricated devices demonstrate extremely low subthreshold slope (SS) of 61 mV dec –1 , high drain current (I DS ) ON/OFF ratio of 1.5 × 10 9 , and negligible transfer characteristic hysteresis. Furthermore, we also experimentally demonstrated robustness of these devices with current–voltage (I–V) characteristics measured at temperatures up to 400 °C.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

DOE OSTI2026

High-performance nanodevices based on WGe 2⁢ N 4 monolayer

Two-dimensional (2D) 𝑀⁢𝐴 2 ⁢𝑍 4 -family monolayers (MLs) have emerged as promising semiconductors due to their element tunability and rich electronic and optoelectronic properties. In this work, using first-principles calculations, we investigate the electronic, mechanical, transport, and optoelectronic properties of WGe 2⁢ N 4 ML with a small indirect bandgap. Various nanodevices based on WGe 2 ⁢N 4 ML are studied, including pn-junction diodes, pin-junction field-effect transistors (FETs), and phototransistors. The present results reveal that the WGe 2⁢ N 4 ML exhibits high rigidity, thermal stability, and remarkable light absorption. These nanodevices demonstrate excellent performance: (1) the pn-junction diode shows a high rectification ratio and a near-Shockley-limit ideality factor, (2) the pin-junction FET exhibits significant gate voltage modulation capability with subthreshold swing as low as 71 mV/dec (close to the theoretical limit calculated based on the Boltzmann distribution), and (3) the phototransistor displays strong optoelectronic responses in the visible and ultraviolet regions. Furthermore, these findings establish WGe 2 ⁢N 4 ML as a versatile platform for developing high-performance, multifunctional nanoelectronic and optoelectronic devices, significantly expanding the application potential of 𝑀⁢𝐴 2⁢ 𝑍 4 -family materials.

2-dimensional systems↗

DOE OSTI2022

Graphene nanoribbons initiated from molecularly derived seeds

Abstract Semiconducting graphene nanoribbons are promising materials for nanoelectronics but are held back by synthesis challenges. Here we report that molecular-scale carbon seeds can be exploited to initiate the chemical vapor deposition (CVD) synthesis of graphene to generate one-dimensional graphene nanoribbons narrower than 5 nm when coupled with growth phenomena that selectively extend seeds along a single direction. This concept is demonstrated by subliming graphene-like polycyclic aromatic hydrocarbon molecules onto a Ge(001) catalyst surface and then anisotropically evolving size-controlled nanoribbons from the seeds along $$\left\langle 110\right\rangle$$ 110 of Ge(001) via CH 4 CVD. Armchair nanoribbons with mean normalized standard deviation as small as 11% (3 times smaller than nanoribbons nucleated without seeds), aspect ratio as large as 30, and width as narrow as 2.6 nm (tunable via CH 4 exposure time) are realized. Two populations of nanoribbons are compared in field-effect transistors (FETs), with off-current differing by 150 times because of the nanoribbons’ different widths.

36 MATERIALS SCIENCE↗

DOE OSTI2024

Variation Tolerant and Energy-Efficient Charge Domain Compute-in-Memory Array with Binary and Multi-Level Cell Ferroelectric FET

Here, in this work, we present a variation-tolerant and energy-efficient charge-domain Ferroelectric FET (FeFET) based Compute-in-Memory (CiM) array design that is compatible with both binary and multi-level cell memory sensing. We demonstrate that: 1) by exploiting FeFET as a nonvolatile switch, its high ON/OFF ratio in the subthreshold region can suppress the error introduced by the inaccurate ON state conductance, thus realizing robust CiM operations, unlike the current-domain CiM design where the computation results is highly sensitive to the device conductance variation; 2) by leveraging a dense dynamic random access memory (DRAM)-like 1FeFET1C cell structure, the proposed design benefits from the existing high density DRAM establishment while also significantly relaxing the capacitor retention and transistor leakage requirement; 3) the charge-domain CiM supports both binary FeFET with minimum overhead and MLC FeFET with tolerable latency for MLC state sensing, whose efficacy is validated experimentally on both cell-level and array-level; 4) the proposed CiM shows much better device variation resilience than conventional current-domain CiM, and also improves inference accuracy. Macro-level evaluation results demonstrate significantly higher energy efficiency and area efficiency compared to prior CiM works.

Duan, Jiahui [University of Notre Dame, IN (United↗

DOE OSTI2023

Isolated Single-stage Three-phase AC/DC Converter using Bidirectional Switches

The advent of the SiC Bidirectional FET (BiDFET), a monolithic 1.2 kV bidirectional switch, has rendered the single-stage three-phase AC/DC converter topology a promising approach for implementing AC/DC converters. This topology, which integrates a full-bridge converter with a single-phase to three-phase matrix converter via a high-frequency transformer, is particularly suitable for applications requiring galvanic isolation, buck-boost functionality, and bidirectional power flow. The single-stage design eliminates the need for bulky and unreliable electrolytic capacitors, and utilizes a single magnetic component for power transfer. In the matrix converter, bidirectional switches, which were traditionally implemented using combinations of multiple semiconductor devices such as MOSFETs, IGBTs, and diodes, can now be realized using the single-chip solution, BiDFET. This advancement leads to a lower switch count, compact converter implementation, with lower inductance commutation cells, thereby enhancing the overall efficiency and compactness of the system. The paper presents a unified model of the converter, considering all control parameters, including the duty cycles and phase shift of transformer voltages. Detailed expressions for power transfer, transformer currents, and currents at AC and DC ports are provided. Additionally, the paper outlines the conditions necessary for soft-switching of all switches and the commutation schemes required for the practical implementation of the matrix converter modulation scheme. A hardware prototype of a 10 kW, 480 VRMS, LL/ 800 V AC/DC system has been developed, and experimental results are presented to demonstrate its performance.

BiDFET↗

DOE OSTI2023

PV Inverter Systems Enabled by Monolithically Integrated SiC based Four Quadrant Power Switch (4-QPS) [BiDFET]

The purpose of this project was to develop a new breed of Power Conversion Systems (PCS) for PV integration that is enabled by the newly developed 4-Quadrant Single Die SiC Power Semiconductor Switches (4-QPS) or also referred to as “Bidirectional FET (BIDFET)”. This work includes semiconductor die development, advanced packaging, converter design, development, and testing of 4-QPS enabled hardware prototypes at 1 kW (for single phase residential application) and 10 kW (for three phase commercial application). The BiDirectional Field-Effect Transistor (BiDFET) can enable circuit topologies requiring four-quadrant switches, that were earlier designed using discrete combinations of MOSFETs, IGBTs, GaN HEMTs, and PiN diodes. The monolithic nature of the BiDFET allows lower device count, smaller switch volume, lower inductance, and simpler packaging, and hence more reliable and commercially viable implementation in power electronics converters. The matrix converter topologies, now feasible using BiDFETs, can eliminate the bulky and unreliable dc link capacitors or inductors required for conventional voltage-source or current-source converters in ac–ac and ac–dc applications. The 1.2 kV BiDFET has the potential to disrupt all the applications utilizing 1.2 kV switches, including electric vehicle (EV) drivetrain, bidirectional EV chargers, industrial motor drives, solid-state transformers, datacenter power supplies, elevator drives, dc microgrids, energy storage grid integration, solid-state breakers, etc.

24 POWER TRANSMISSION AND DISTRIBUTION↗

DOE OSTI2023

Embedding security into ferroelectric FET array via in situ memory operation

Non-volatile memories (NVMs) have the potential to reshape next-generation memory systems because of their promising properties of near-zero leakage power consumption, high density and non-volatility. However, NVMs also face critical security threats that exploit the non-volatile property. Compared to volatile memory, the capability of retaining data even after power down makes NVM more vulnerable. Existing solutions to address the security issues of NVMs are mainly based on Advanced Encryption Standard (AES), which incurs significant performance and power overhead. In this paper, we propose a lightweight memory encryption/decryption scheme by exploiting in-situ memory operations with negligible overhead. To validate the feasibility of the encryption/decryption scheme, device-level and array-level experiments are performed using ferroelectric field effect transistor (FeFET) as an example NVM without loss of generality. Besides, a comprehensive evaluation is performed on a 128 × 128 FeFET AND-type memory array in terms of area, latency, power and throughput. Compared with the AES-based scheme, our scheme shows ~22.6×/~14.1× increase in encryption/decryption throughput with negligible power penalty. Furthermore, we evaluate the performance of our scheme over the AES-based scheme when deploying different neural network workloads. Our scheme yields significant latency reduction by 90% on average for encryption and decryption processes.

47 OTHER INSTRUMENTATION↗

DOE OSTI2023

Rapid, Sensitive, Label-Free Electrical Detection of SARS-CoV-2 in Nasal Swab Samples

Rapid diagnosis of coronavirus disease 2019 (COVID-19) is key for the long-term control of severe acute respiratory syndrome coronavirus 2 (SARS-CoV-2) amid renewed threats of mutated SARS-CoV-2 around the world. Here, we report on an electrical label-free detection of SARS-CoV-2 in nasopharyngeal swab samples directly collected from outpatients or in saliva-relevant conditions by using a remote floating-gate field-effect transistor (RFGFET) with a 2-dimensional reduced graphene oxide (rGO) sensing membrane. RFGFET sensors demonstrate rapid detection (<5 min), a 90.6% accuracy from 8 nasal swab samples measured by 4 different devices for each sample, and a coefficient of variation (CV) < 6%. Also, RFGFET sensors display a limit of detection (LOD) of pseudo-SARS-CoV-2 that is 10 000-fold lower than enzyme-linked immunosorbent assays, with a comparable LOD to that of reverse transcriptionpolymerase chain reaction (RT-PCR) for patient samples. To achieve this, comprehensive systematic studies were performed regarding interactions between SARS-CoV-2 and spike proteins, neutralizing antibodies, and angiotensin-converting enzyme 2, as either a biomarker (detection target) or a sensing probe (receptor) functionalized on the rGO sensing membrane. Finally, taken together, this work may have an immense effect on positioning FET bioelectronics for rapid SARS-CoV-2 diagnostics.

60 APPLIED LIFE SCIENCES↗

DOE OSTI2022

Paper-based gold nanoparticles decorated SWCNTs chemiresistive sensor for sensitive detection of As(III) based on electrochemical doping

A paper-based chemiresistive sensor consisting of a single-walled carbon nanotubes network with electrodeposited gold nanoparticles (AuNPs-SWCNTs) was developed for the sensitive detection of As(III). A new sensing strategy was also proposed combined with a paper-based device for As(III) chemiresistive detection based on the electrochemical doping of As(0) on the AuNPs-SWCNTs channel. Here, the proposed paper-based chemiresistive sensor was manufactured by wax printing and vacuum deposition using a water-based SWCNTs ink. The sensor sensitivity was enhanced by optimizing the volume of SWCNTs ink used in the formation of the sensing network in the paper and the sweep segment of cyclic voltammetry used for the electrochemical deposition of AuNPs. Additionally, the mechanism of the sensing strategy based on the electrochemical n-doping of As(0) to the AuNPs-SWCNTs sensing channel was investigated using a liquid-ion gated FET system. The As(III) concentration detected by the as-fabricated chemiresistive sensor is as low as 1.35 × 10 -5 μM which is even lower than the maximum permissible concentration in drinking water defined by the WHO. In this paper, we provide a simple strategy for developing paper-based chemiresistive sensors with unique properties for practical As(III) determination.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

DOE OSTI2020

High broadband photoconductivity of few-layered MoS 2 field-effect transistors measured using multi-terminal methods: effects of contact resistance

Among the layered two dimensional semiconductors, molybdenum disulfide (MoS 2 ) is considered to be an excellent candidate for applications in optoelectronics and integrated circuits due to its layer-dependent tunable bandgap in the visible region, high ON/OFF current ratio in field-effect transistors (FET) and strong light–matter interaction properties. In this study, using multi-terminal measurements, we report high broadband photocurrent response ( R ) and external quantum efficiency (EQE) of few-atomic layered MoS 2 phototransistors fabricated on a SiO 2 dielectric substrate and encapsulated with a thin transparent polymer film of Cytop. The photocurrent response was measured using a white light source as well as a monochromatic light of wavelength λ = 400 nm–900 nm. We measured responsivity using a 2-terminal configuration as high as R = 1 × 10 3 A W -1 under white light illumination with an optical power P opt = 0.02 nW. The R value increased to 3.5 × 10 3 A W -1 when measured using a 4-terminal configuration. Using monochromatic light on the same device, the measured values of R were 10 3 and 6 × 10 3 A W -1 under illumination of λ = 400 nm when measured using 2- and 4-terminal methods, respectively. The highest EQE values obtained using λ = 400 nm were 10 5 % and 10 6 % measured using 2- and 4-terminal configurations, respectively. The wavelength dependent responsivity decreased from 400 nm to the near-IR region at 900 nm. The observed photoresponse, photocurrent–dark current ratio (PDCR), detectivity as a function of applied gate voltage, optical power, contact resistances and wavelength were measured and are discussed in detail. The observed responsivity is also thoroughly studied as a function of contact resistance of the device.

36 MATERIALS SCIENCE↗

DOE OSTI2023

Probing the Electronic and Opto-Electronic Properties of Multilayer MoS 2 Field-Effect Transistors at Low Temperatures

Transition metal dichalcogenides (TMDs)-based field-effect transistors (FETs) are being investigated vigorously for their promising applications in optoelectronics. Despite the high optical response reported in the literature, most of them are studied at room temperature. To extend the application of these materials in a photodetector, particularly at a low temperature, detailed understanding of the photo response behavior of these materials at low temperatures is crucial. Here we present a systematic investigation of temperature-dependent electronic and optoelectronic properties of few-layers MoS 2 FETs, synthesized using the mechanical exfoliation of bulk MoS 2 crystal, on the Si/SiO 2 substrate. Our MoS 2 FET show a room-temperature field-effect mobility μ FE ~40 cm 2 ·V -1 ·s -1 , which increases with decreasing temperature, stabilizing at 80 cm 2 ·V -1 ·s -1 below 100 K. The temperature-dependent (50 K < T < 300 K) photoconductivity measurements were investigated using a continuous laser source λ = 658 nm (E = 1.88 eV) over a broad range of effective illuminating laser intensity, P eff (0.02 μW < P eff < 0.6 μW). Photoconductivity measurements indicate a fractional power dependence of the steady-state photocurrent. The room-temperature photoresponsivity (R) obtained in these samples was found to be ~2 AW -1 , and it increases as a function of decreasing temperature, reaching a maximum at T = 75 K. The optoelectronic properties of MoS 2 at a low temperature give an insight into photocurrent generation mechanisms, which will help in altering/improving the performance of TMD-based devices for various applications.

2D materials↗

DOE OSTI2024

Constrained patterning of orientated metal chalcogenide nanowires and their growth mechanism

One-dimensional metallic transition-metal chalcogenide nanowires (TMC-NWs) hold promise for interconnecting devices built on two-dimensional (2D) transition-metal dichalcogenides, but only isotropic growth has so far been demonstrated. Here we show the direct patterning of highly oriented Mo 6 Te 6 NWs in 2D molybdenum ditelluride (MoTe 2 ) using graphite as confined encapsulation layers under external stimuli. The atomic structural transition is studied through in-situ electrical biasing the fabricated heterostructure in a scanning transmission electron microscope. Atomic resolution high-angle annular dark-field STEM images reveal that the conversion of Mo 6 Te 6 NWs from MoTe 2 occurs only along specific directions. Combined with first-principles calculations, we attribute the oriented growth to the local Joule-heating induced by electrical bias near the interface of the graphite-MoTe 2 heterostructure and the confinement effect generated by graphite. Using the same strategy, we fabricate oriented NWs confined in graphite as lateral contact electrodes in the 2H-MoTe 2 FET, achieving a low Schottky barrier of 11.5 meV, and low contact resistance of 43.7 Ω µm at the metal-NW interface. Our work introduces possible approaches to fabricate oriented NWs for interconnections in flexible 2D nanoelectronics through direct metal phase patterning.

36 MATERIALS SCIENCE↗

DOE OSTI2022

On the Feasibility of 1T Ferroelectric FET Memory Array

To fully exploit the ferroelectric field effect transistor (FeFET) as compact embedded nonvolatile memory for various computing and storage applications, it is desirable to use a single FeFET (1T) as a unit cell and arrange the cells into an array. However, many write mechanisms for an 1T FeFET array reported in the literature are yet to be validated experimentally. In this work, we performed a comprehensive experimental characterization on the write operations in an 1T- NOR and 1T- AND array using n-channel bulk FeFETs. We discovered that: 1) the source/drain contact can only supply minority carriers (i.e., electrons) to the channel for polarization screening during the low- V TH state programming; 2) the body contact can not only supply majority carriers (i.e., holes) for efficient high- V TH state write, but also depletion charge for low- V TH state programming, though with lower efficiency; and 3) during the low/high- V TH programming, only the path that can supply negative/positive screening charges, respectively, need to respond, which necessitates the application of proper write biases on the corresponding terminal. Based on the understanding of these write mechanisms, we show the importance of localized body contact or column-wise body contact for the successful high- V TH state programming. We also show that the previously proposed C- AND write scheme fails to program the FeFET to the low- V TH state for our devices. Finally, we propose several write schemes for both 1T- AND and 1T- NOR arrays for various scenarios providing insights for choosing the appropriate write scheme, which will facilitate the adoption of 1T FeFET memory arrays for emerging applications.

FeFET↗

DOE OSTI2023

Bidirectional Three-phase Current Source Converter based Buck-boost AC/DC System using Bidirectional Switches

The 1.2 kV 4H-SiC BiDirectional Field Effect Transistor (BiDFET) is the first monolithic SiC bidirectional switch, which offers a lower voltage drop and semiconductor devices count alternative to the reverse-voltage-blocking (RB) switch used in the current-source converters (CSC). The bidirectional switch based CSC also allows DC-link current reversal for bidirectional power flow and provides multiple system-level benefits in a buck-boost AC/DC system consisting of buck-type DC/DC converter and CSC. This paper discusses the selection of buck converter duty cycle and CSC modulation index for the system’s buck-boost operation with a wide variation in DC voltage. CSC modulation schemes categorized based on the number of hard-turn-on transitions per switching cycle are also analyzed along with the three-step and four-step commutation schemes that are essential for the CSC commutation cells. Finally, the different schemes are evaluated and compared through the experimental results of a 10 kW, 480 VRMS, LL/ (400 − 800) V AC/DC system.

Bidirectional switches, four-quadrant switches, cu↗