Error correction for deep space network teletype circuits
Error detection codes and correction devices for Deep Space Network /DSN/ teletypewriter systems
Fredricksen, H.↗
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Low-overhead transversal fault tolerance for universal quantum computation
Fast, reliable logical operations are essential for realizing useful quantum computers. By redundantly encoding logical qubits into many physical qubits and using syndrome measurements to detect and correct errors, we can achieve low logical error rates. However, for many practical quantum error correction codes such as the surface code, owing to syndrome measurement errors, standard constructions require multiple extraction rounds—of the order of the code distance d—for fault-tolerant computation, particularly considering fault-tolerant state preparation. Here we show that logical operations can be performed fault-tolerantly with only a constant number of extraction rounds for a broad class of quantum error correction codes, including the surface code with magic state inputs and feedforward, to achieve ‘transversal algorithmic fault tolerance’. Through the combination of transversal operations7 and new strategies for correlated decoding, despite only having access to partial syndrome information, we prove that the deviation from the ideal logical measurement distribution can be made exponentially small in the distance, even if the instantaneous quantum state cannot be made close to a logical codeword because of measurement errors. We supplement this proof with circuit-level simulations in a range of relevant settings, demonstrating the fault tolerance and competitive performance of our approach. Furthermore, our work sheds new light on the theory of quantum fault tolerance and has the potential to reduce the space–time cost of practical fault-tolerant quantum computation by over an order of magnitude.
Zhou, Hengyun [QuEra Computing, Boston, MA (United↗
Processing and Archiving Camera Data Effectively for Operando Neutron Measurement of Metal Additive Manufacturing
As the name suggests, The Operando Neutron Measurement of Metal Additive Manufacturing project conducted by ORNL’s Manufacturing Demonstration Facility (MDF) is experimenting with advanced additive metal manufacturing techniques while analyzing the process using the Spallation Neutron Source’s (SNS) beamline. As part of this experiment, the MDF is seeking to employ 2 XIMEA visible light cameras and a single infrared camera to analyze and correct manufacturing in real-time. The MDF requires a solution for capturing the high-resolution data feed from the cameras with compression while preserving enough detail for their software to detect and correct errors in real time. Our solution was to develop a Robot Operating System (ROS) driver to feed the camera data into ROS. From ROS, the feed is compressed and temporarily stored locally to a stripped 4 NVMe SSD RAID array. Post-experiment, the data is transitioned to long-term storage for archival purposes.
36 MATERIALS SCIENCE↗
Coding - An engineering tool for the digital telemetry link.
Digital telemetry link coding as English language analogy, developing block code scheme combining bit, word and block error detection and correction methods
Muller, R. M.↗
Self testing and repairing computer - A concept
STAR computer has five redundant modular function units, fixed store, arithmetic, memory, input, and output. Each unit is connected to a diagnostic control unit, each is coded for error detection and error correction. Separation into function units permits assembly of many different systems from the set of units.
Avizienis, A. A.↗
Digital fault diagnosis by low-cost arithmetical coding techniques
Error detecting and correcting codes for locating logic faults in digital computers
Avizienis, A.↗
Development and testing of the infrared interferometer spectrometer for the Mariner Mars 1971 spacecraft
The design, development and testing of the infrared interferometer spectrometer is reported with emphasis on the unique features of the Mariner instrument as compared to previous IRIS instruments flown on the Nimbus meteorological research satellites. The interferometer functions in the spectral range from 50 microns to 6.3 microns. A noise equivalent radiance of 0.5 X 10 to the -7th power W/sq cm/ster/cm has been achieved. Major improvements that were implemented included the cesium iodide beamsplitter and electronic features to suppress the effect of vibration on the Michelson mirror motion and digital filtering through the summation of increased sampling of the infrared signal. A bit error detection and correction scheme was also implemented in order to recover the science data with a higher level of confidence over the telecommunication link.
Hanel, R. H.↗
A fault-tolerant information processing concept for space vehicles.
A distributed fault-tolerant information processing system is proposed, comprising a central multiprocessor, dedicated local processors, and multiplexed input-output buses connecting them together. The processors in the multiprocessor are duplicated for error detection, which is felt to be less expensive than using coded redundancy of comparable effectiveness. Error recovery is made possible by a triplicated scratchpad memory in each processor. The main multiprocessor memory uses replicated memory for error detection and correction. Local processors use any of three conventional redundancy techniques: voting, duplex pairs with backup, and duplex pairs in independent subsystems.
Hopkins, A. L., Jr.↗
Shift register generators and applications to coding
The most important properties of shift register generated sequences are exposed. The application of shift registers as multiplication and division circuits leads to the generation of some error correcting and detecting codes.
Morakis, J. C.↗
Interleaved cyclic codes
Analytical approach for development burst error correction and detection cyclic codes does not require shortening techniques.
Hockenberger, R. W.↗
Fault tolerant computing: A preamble for assuring viability of large computer systems
The need for fault-tolerant computing is addressed from the viewpoints of (1) why it is needed, (2) how to apply it in the current state of technology, and (3) what it means in the context of the Phoenix computer system and other related systems. To this end, the value of concurrent error detection and correction is described. User protection, program retry, and repair are among the factors considered. The technology of algebraic codes to protect memory systems and arithmetic codes to protect memory systems and arithmetic codes to protect arithmetic operations is discussed.
Lim, R. S.↗
The proposed coding standard at GSFC
As part of the continuing effort to introduce standardization of spacecraft and ground equipment in satellite systems, NASA's Goddard Space Flight Center and other NASA facilities have supported the development of a set of standards for the use of error control coding in telemetry subsystems. These standards are intended to ensure compatibility between spacecraft and ground encoding equipment, while allowing sufficient flexibility to meet all anticipated mission requirements. The standards which have been developed to date cover the application of block codes in error detection and error correction modes, as well as short and long constraint length convolutional codes decoded via the Viterbi and sequential decoding algorithms, respectively. Included are detailed specifications of the codes, and their implementation. Current effort is directed toward the development of standards covering channels with burst noise characteristics, channels with feedback, and code concatenation.
Morakis, J. C.↗
Evaluation of the SPAR thermal analyzer on the CYBER-203 computer
The use of the CYBER 203 vector computer for thermal analysis is investigated. Strengths of the CYBER 203 include the ability to perform, in vector mode using a 64 bit word, 50 million floating point operations per second (MFLOPS) for addition and subtraction, 25 MFLOPS for multiplication and 12.5 MFLOPS for division. The speed of scalar operation is comparable to that of a CDC 7600 and is some 2 to 3 times faster than Langley's CYBER 175s. The CYBER 203 has 1,048,576 64-bit words of real memory with an 80 nanosecond (nsec) access time. Memory is bit addressable and provides single error correction, double error detection (SECDED) capability. The virtual memory capability handles data in either 512 or 65,536 word pages. The machine has 256 registers with a 40 nsec access time. The weaknesses of the CYBER 203 include the amount of vector operation overhead and some data storage limitations. In vector operations there is a considerable amount of time before a single result is produced so that vector calculation speed is slower than scalar operation for short vectors.
Robinson, J. C.↗
Undetected error probability and throughput analysis of a concatenated coding scheme
The performance of a proposed concatenated coding scheme for error control on a NASA telecommand system is analyzed. In this scheme, the inner code is a distance-4 Hamming code used for both error correction and error detection. The outer code is a shortened distance-4 Hamming code used only for error detection. Interleaving is assumed between the inner and outer codes. A retransmission is requested if either the inner or outer code detects the presence of errors. Both the undetected error probability and the throughput of the system are analyzed. Results indicate that high throughputs and extremely low undetected error probabilities are achievable using this scheme.
Costello, D. J.↗
High-density digital recording
The problems associated with high-density digital recording (HDDR) are discussed. Five independent users of HDDR systems and their problems, solutions, and insights are provided as guidance for other users of HDDR systems. Various pulse code modulation coding techniques are reviewed. An introduction to error detection and correction head optimization theory and perpendicular recording are provided. Competitive tape recorder manufacturers apply all of the above theories and techniques and present their offerings. The methodology used by the HDDR Users Subcommittee of THIC to evaluate parallel HDDR systems is presented.
Kalil, F.↗
Reliability and throughput analysis of a concatenated coding scheme
The performance of a concatenated coding scheme for error control in ARQ systems is analyzed for both random-noise and burst-noise channels. In particular, the probability of undetected error and the system throughput are calculated. In this scheme, the inner code is used for both error correction and error detection, and the outer code is used for error detection only. Interleaving/deinterleaving is assumed within the outer code. A retransmission is requested if either the inner code or the outer code detects the presence of errors. Various coding examples are considered. The results show that concatenated coding can provide extremely high system reliability (i.e., low probability of undetected error) and high system throughput.
Deng, Robert H.↗
Pitch-Learning Algorithm For Speech Encoders
Adaptive algorithm detects and corrects errors in sequence of estimates of pitch period of speech. Algorithm operates in conjunction with techniques used to estimate pitch period. Used in such parametric and hybrid speech coders as linear predictive coders and adaptive predictive coders.
Bhaskar, B. R. Udaya↗
Local area network with fault-checking, priorities, and redundant backup
This invention is a redundant error detecting and correcting local area networked computer system having a plurality of nodes each including a network connector board within the node for connecting to an interfacing transceiver operably attached to a network cable. There is a first network cable disposed along a path to interconnect the nodes. The first network cable includes a plurality of first interfacing transceivers attached thereto. A second network cable is disposed in parallel with the first cable and, in like manner, includes a plurality of second interfacing transceivers attached thereto. There are a plurality of three position switches each having a signal input, three outputs for individual selective connection to the input, and a control input for receiving signals designating which of the outputs is to be connected to the signal input. Each of the switches includes means for designating a response address for responding to addressed signals appearing at the control input and each of the switches further has its signal input connected to a respective one of the input/output lines from the nodes. Also, one of the three outputs is connected to a repective one of the plurality of first interfacing transceivers. There is master switch control means having an output connected to the control inputs of the plurality of three position switches and an input for receiving directive signals for outputting addressed switch position signals to the three position switches as well as monitor and control computer means having a pair of network connector boards therein connected to respective ones of one of the first interfacing transceivers and one of the second interfacing transceivers and an output connected to the input of the master switch means for monitoring the status of the networked computer system by sending messages to the nodes and receiving and verifying messages therefrom and for sending control signals to the master switch to cause the master switch to cause respective ones of the nodes to use a desired one of the first and second cables for transmitting and receiving messages and for disconnecting desired ones of the nodes from both cables.
Morales, Sergio↗