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At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS1984

Coaxial carbon plasma gun deposition of amorphous carbon films

A unique plasma gun employing coaxial carbon electrodes was used in an attempt to deposit thin films of amorphous diamond-like carbon. A number of different structural, compositional, and electrical characterization techniques were used to characterize these films. These included scanning electron microscopy, scanning transmission electron microscopy, X ray diffraction and absorption, spectrographic analysis, energy dispersive spectroscopy, and selected area electron diffraction. Optical absorption and electrical resistivity measurements were also performed. The films were determined to be primarily amorphous, with poor adhesion to fused silica substrates. Many inclusions of particulates were found to be present as well. Analysis of these particulates revealed the presence of trace impurities, such as Fe and Cu, which were also found in the graphite electrode material. The electrodes were the source of these impurities. No evidence of diamond-like crystallite structure was found in any of the film samples. Details of the apparatus, experimental procedure, and film characteristics are presented.

Sater, D. M.↗
NASA NTRS1990

Silicon carbide semiconductor device fabrication and characterization

A number of basic building blocks i.e., rectifying and ohmic contacts, implanted junctions, MOS capacitors, pnpn diodes and devices, such as, MESFETs on both alpha and beta SiC films were fabricated and characterized. Gold forms a rectifying contact on beta SiC. Since Au contacts degrade at high temperatures, these are not considered to be suitable for high temperature device applications. However, it was possible to utilize Au contact diodes for electrically characterizing SiC films. Preliminary work indicates that sputtered Pt or Pt/Si contacts on beta SiC films are someways superior to Au contacts. Sputtered Pt layers on alpha SiC films form excellent rectifying contacts, whereas Ni layers following anneal at approximately 1050 C provide an ohmic contact. It has demonstrated that ion implantation of Al in substrates held at 550 C can be successfully employed for the fabrication of rectifying junction diodes. Feasibility of fabricating pnpn diodes and platinum gated MESFETs on alpha SiC films was also demonstrated.

Davis, R. F.↗
NASA NTRS1990

Low frequency electrical noise across contacts between a normal conductor and superconducting bulk YBa2Cu3O7

Virtually every device that makes use of the new ceramic superconductors will need normal conductor to supercondutor contacts. The current-voltage and electrical noise characteristics of these contacts could be become important design considerations. I-V and low frequency electrical noise measurements are presented on contacts between a normal conductor and superconducting polycrystalline YBa2Cu3O7. The contacts were formed by first sputtering gold palladium pads onto the surface of the bulk superconductor and then using silver epoxy to attach a wire(s) to each pad. Voltage across the contacts was found for small current densities. The voltage spectral density, S sub v(f), a quanity often used to characterize electrical noise, very closely followed an empirical relationship given by, S sub v(f) = C(VR)sq/f, where V is the DC voltage across the contact, R is the contact resistance, F is frequency, and C is a contant found to be 2 x 10(exp -10)/Omega sq at 78 K. This relationship was found to be independent of contact area, contact geometry, sample fabrication technique, and sample density.

Hall, J.↗
NASA NTRS1991

Low frequency electrical noise across contacts between a normal conductor and superconducting bulk YBa2Cu3O7

Virtually every device that makes use of the new ceramic superconductors will need normal conductor to superconductor contacts. The current-voltage and electrical noise characteristics of these contacts could become important design considerations. I-V and low frequency electrical noise measurements are presented on contacts between a normal conductor and superconducting polycrystalline YBa2Cu3O7. The contacts were formed by first sputtering gold palladium pads onto the surface of the bulk superconductor and then using silver epoxy to attach a wire(s) to each pad. Voltage across the contacts was found for small current densities. The voltage spectral density, S sub v(f), a quantity often used to characterize electrical noise, very closely followed an empirical relationship given by S sub v(f) = C(VR)sq/f, where V is the DC voltage across the contact, R is the contact resistance, F is frequency, and C is a contant found to be 2 x 10(exp -10)/Omega sq at 78 K. This relationship was found to be independent of contact area, contact geometry, sample fabrication technique, and sample density.

Hall, J.↗
NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Electronic packaging↗
NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500 C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550 C. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500 C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500 C are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Chen, Liang-Yu↗
NASA NTRS2012

Characterization of the Vectron PX-570 Crystal Oscillator for Use in Harsh Environments

Computing hardware, data-acquisition systems, communications systems, and many electronic control systems require well-controlled timing signals for proper and accurate operation. These signals are, in most cases, provided by circuits that employ crystal oscillators due to availability, cost, ease of operation, and accuracy. In some cases, the electronic systems are expected to survive and operate under harsh conditions that include exposure to extreme temperatures. These applications exist in terrestrial systems as well as in aerospace products. Well-logging, geothermal systems, and industrial process control are examples of ground-based applications, while distributed jet engine control in aircraft, space-based observatories (such as the James Webb Space Telescope), satellites, and lunar and planetary landers are typical environments where electronics are exposed to harsh operating conditions. To ensure these devices produce reliable results, the digital heartbeat from the oscillator must deliver a stable signal that is not affected by external temperature or other conditions. One such solution is a recently introduced commercial-off-the-shelf (COTS) oscillator, the PX-570 series from Vectron International. The oscillator was designed for high-temperature applications and as proof, the crystal oscillator was subjected to a wide suite of tests to determine its ruggedness for operation in harsh environments. The tests performed by Vectron included electrical characterization under wide range of temperature, accelerated life test/aging, shock and vibration, internal moisture analysis, ESD threshold, and latch-up testing. The parametric evaluation was performed on the oscillator's frequency, output signal rise and fall times, duty cycle, and supply current over the temperature range of -125 C to +230 C. The evaluations also determined the effects of thermal cycling and the oscillator's re-start capability at extreme hot and cold temperatures. These thermal cycling and restart tests were performed at the NASA Glenn Research Center. Overall, the crystal oscillator performed well and demonstrated very good frequency stability. This paper will discuss the test procedures and present details of the performance results.

Li, Jacob↗
NASA NTRS1974

Basic memory module

Construction and electrical characterization of the 4096 x 2-bit Basic Memory Module (BMM) are reported for the Space Ultrareliable Modular Computer (SUMC) program. The module uses four 2K x 1-bit N-channel FET, random access memory chips, called array chips, and two sense amplifier chips, mounted and interconnected on a ceramic substrate. Four 5% tolerance power supplies are required. At the Module, the address, chip select, and array select lines require a 0-8.5 V MOS signal level. The data output, read-strobe, and write-enable lines operate at TTl levels. Although the module is organized as 4096 x 2 bits, it can be used in a 8196 x 1-bit application with appropriate external connections. A 4096 x 1-bit organization can be obtained by depopulating chips.

Tietze, F. C.↗
NASA NTRS1977

Silicon ribbon growth by a capillary action shaping technique

Substantial improvements in ribbon surface quality are achieved with a higher melt meniscus than that attainable with the film-fed (EFG) growth technique. A capillary action shaping method is described in which meniscus shaping for the desired ribbon geometry occurs at the vertex of a wettable die. As ribbon growth depletes the melt meniscus, capillary action supplies replacement material. Topics discussed cover experimental apparatus and growth procedures; die materials investigations, fabrication and evaluation; process development for 25 mm, 38 mm, 50 mm and 100 mm silicon ribbons; and long grain direct solidification of silicon. Methods for the structural and electrical characterization of cast silicon ribbons are assessed as well as silicon ribbon technology for the 1978 to 1986 period.

Schwuttke, G. H.↗
NASA NTRS1976

Single crystal and polycrystalline GaAs solar cells using AMOS technology

A description is given of current technology for fabricating single AMOS (antireflection-coated metal oxide semiconductor) solar cells, with attention given to thermal, plasma, and anodic oxidation, native oxide stripping, and X-ray photoelectron spectroscopy results. Some preliminary results are presented on the chemistry and electrical characterization of such cells, and the characteristics of cells fabricated on sliced polycrystalline GaAs wafers are examined. Consideration is also given to the recrystallization of evaporated Ge films for use as low-cost substrates for polycrystalline GaAs solar cells.

Stirn, R. J.↗
NASA NTRS1979

Materials and techniques for spacecraft static charge control 2

Results of exploratory development on the design, fabrication and testing of transparent conductive coatings, conductive bulk materials and grounding techniques for application to high resistivity spacecraft dielectric materials to obtain control of static charge buildup are presented. Deposition techniques for application of indium oxide, indium/tin oxide and other metal oxide films on Kapton, FEP Teflon, OSR and solar cell coverglasses discussed include RF and Magnetron sputtering and vapor deposition. Development, fabrication and testing of conductive glass tiles for OSR and solar cell coverglass applications is discussed. Several grounding techniques for rapid charge dissipation from the conductively coated polymer and glass dielectrics which were developed and tested in thermal cycled and electron plasma environments are described. The optical and electrical characterization and aging effects of these coatings, bulk materials and grounding techniques are reviewed as they apply to the performance of their design functions in a geosynchronous orbit environment.

Schmidt, R. E.↗
NASA NTRS1979

Electrical Evaluation of RCA MWS5501D Random Access Memory, Volume 2, Appendix a

The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. The address access time, address readout time, the data hold time, and the data setup time are some of the results surveyed.

Klute, A.↗
NASA NTRS1979

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 3, Appendix B

The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. The test values for the output voltage, average input current, the supply current and the leakage current are presented.

Klute, A.↗
NASA NTRS1979

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 4, Appendix C

The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Statistical analysis data is supplied along with write pulse width, read cycle time, write cycle time, and chip enable time data.

Klute, A.↗
NASA NTRS1979

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 5, Appendix D

The electrical characterization and qualification test results are presented for the RCA MWS 5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Average input high current, worst case input high current, output low current, and data setup time are some of the results presented.

Klute, A.↗
NASA NTRS1980

Electrical, thermal and abusive tests on lithium thionyl chloride cells

Electrical characterizations, thermal characterizations, and outer limits tests of lithium thionyl chloride cells are discussed. Graphs of energy density vs power density and heat rate vs time are presented along with results of forced reversal and high rate discharge tests.

Frank, H. A.↗
NASA NTRS1981

Development and fabrication of a solar cell junction processing system

Modifications to the ground plane, to insure a good electrical return path during the pulse discharge, were made using a ring of beryllium copper finger stock attached to the underside of the aluminum ground plate. Experiments on annealing of wafers with ion implantation damage continued. The entire surface of 100 mm diameter wafers were annealed by one pulse for the standard implant (10 keV, phosphorus, 2x10 to the 15th power ions/sq cm). While samples are being fabricated into solar cells for electrical characterization, work is continuing on improvement of the electron beam uniformity and the optimization of the diode parameters. The engineering design was completed and the manufacturing detail drawings were released for fabrication. Assembly of the subcomponents for the exit and entrance locks is almost complete. These components include the cassettes, the indexing mechanisms, main doors, and wafer carrier transfer modules. The 'Y' track and three phase transition track sections are under final assembly and test.

Giesling, R.↗
NASA NTRS1982

Positive electrode processing for Hughes NiH2 cells

The basic procedures were developed for the manufacture of nickel cadmium batteries. An electrochemical impregnation in an aqueous ethanol solution is used in this process. Several additional controls were instituted for production of flight electrodes, including a Hughes controlled MCD, a solution reserved exclusively for the impregnation of Hughes positive electrodes a system of complete traceability for individual electrodes, an electrical characterization test to provide information on weight and capacity at the plaque level, and a stress test to provide data on capacity, weight, and physical parameters at the electrode level.

Bleser, C. A.↗