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At least 73 records · Page 4

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NASA NTRS1982

Dynamic mechanical analysis and organization/storage of data for polymetric materials

Dynamic mechanical analysis was performed on a variety of temperature resistant polymers and composite resin matrices. Data on glass transition temperatures and degree of cure attained were derived. In addition a laboratory based computer system was installed and data base set up to allow entry of composite data. The laboratory CPU termed TYCHO is based on a DEC PDP 11/44 CPU with a Datatrieve relational data base. The function of TYCHO is integration of chemical laboratory analytical instrumentation and storage of chemical structures for modeling of new polymeric structures and compounds

Rosenberg, M.↗

NASA NTRS1984

Efficient spares matrix multiplication scheme for the CYBER 203

This work has been directed toward the development of an efficient algorithm for performing this computation on the CYBER-203. The desire to provide software which gives the user the choice between the often conflicting goals of minimizing central processing (CPU) time or storage requirements has led to a diagonal-based algorithm in which one of three types of storage is selected for each diagonal. For each storage type, an initialization sub-routine estimates the CPU and storage requirements based upon results from previously performed numerical experimentation. These requirements are adjusted by weights provided by the user which reflect the relative importance the user places on the resources. The three storage types employed were chosen to be efficient on the CYBER-203 for diagonals which are sparse, moderately sparse, or dense; however, for many densities, no diagonal type is most efficient with respect to both resource requirements. The user-supplied weights dictate the choice.

Lambiotte, J. J., Jr.↗

NASA NTRS1984

Comprehensive silicon solar cell computer modeling

The development of an efficient, comprehensive Si solar cell modeling program that has the capability of simulation accuracy of 5 percent or less is examined. A general investigation of computerized simulation is provided. Computer simulation programs are subdivided into a number of major tasks: (1) analytical method used to represent the physical system; (2) phenomena submodels that comprise the simulation of the system; (3) coding of the analysis and the phenomena submodels; (4) coding scheme that results in efficient use of the CPU so that CPU costs are low; and (5) modularized simulation program with respect to structures that may be analyzed, addition and/or modification of phenomena submodels as new experimental data become available, and the addition of other photovoltaic materials.

Lamorte, M. F.↗

NASA NTRS1984

An emulator for minimizing computer resources for finite element analysis

A computer code, SCOPE, has been developed for predicting the computer resources required for a given analysis code, computer hardware, and structural problem. The cost of running the code is a small fraction (about 3 percent) of the cost of performing the actual analysis. However, its accuracy in predicting the CPU and I/O resources depends intrinsically on the accuracy of calibration data that must be developed once for the computer hardware and the finite element analysis code of interest. Testing of the SCOPE code on the AMDAHL 470 V/8 computer and the ELAS finite element analysis program indicated small I/O errors (3.2 percent), larger CPU errors (17.8 percent), and negligible total errors (1.5 percent).

Melosh, R.↗

NASA NTRS1983

Large array VLSI filter

A 35 by 35 element pipelined convolutional kernel is being fabricated using VLSI chips, each containing a 5 by 1 segment of the kernel. Three levels of printed circuitry are used: the first level is used for the VLSI chips, the second level connects seven chips together on one platform, and the third level connects seven platforms with associated delay lines, all fitting on one board. Therefore, on each board there are seven rows of the kernel containing 245 multipliers and adders, and five such boards complete the kernel array. Each multiplier accepts an 8 bit picture element which is multiplied by a 16 bit weight. A truncated 22 bit product is added to a previously stored product sum and the results are shifted to the following multiplier as the next picture element is read in. The multiplier uses a modified Booth algorithm to reduce the number of shift add operations nearly in half. The filter box is presently configured as an ancillary box to a VAX 11/780, but can be connected to essentially any CPU. The I/O bandwidth is easily compatible with most CPU devices.

Nathan, R.↗

NASA NTRS1985

Vector computer memory bank contention

A number of vector supercomputers feature very large memories. Unfortunately the large capacity memory chips that are used in these computers are much slower than the fast central processing unit (CPU) circuitry. As a result, memory bank reservation times (in CPU ticks) are much longer than on previous generations of computers. A consequence of these long reservation times is that memory bank contention is sharply increased, resulting in significantly lowered performance rates. The phenomenon of memory bank contention in vector computers is analyzed using both a Markov chain model and a Monte Carlo simulation program. The results of this analysis indicate that future generations of supercomputers must either employ much faster memory chips or else feature very large numbers of independent memory banks.

Bailey, D. H.↗

NASA NTRS1987

Vector computer memory bank contention

Bailey, David H.↗

NASA NTRS1988

An efficient sparse matrix multiplication scheme for the CYBER 205 computer

This paper describes the development of an efficient algorithm for computing the product of a matrix and vector on a CYBER 205 vector computer. The desire to provide software which allows the user to choose between the often conflicting goals of minimizing central processing unit (CPU) time or storage requirements has led to a diagonal-based algorithm in which one of four types of storage is selected for each diagonal. The candidate storage types employed were chosen to be efficient on the CYBER 205 for diagonals which have nonzero structure which is dense, moderately sparse, very sparse and short, or very sparse and long; however, for many densities, no diagonal type is most efficient with respect to both resource requirements, and a trade-off must be made. For each diagonal, an initialization subroutine estimates the CPU time and storage required for each storage type based on results from previously performed numerical experimentation. These requirements are adjusted by weights provided by the user which reflect the relative importance the user places on the two resources. The adjusted resource requirements are then compared to select the most efficient storage and computational scheme.

Lambiotte, Jules J., Jr.↗

NASA NTRS1989

Upwind relaxation methods for the Navier-Stokes equations using inner iterations

A supersonic and subsonic test problem is solved using an upwind line relaxation algorithm for the Navier-Stokes equations which employs inner iterations. In the supersonic test case, the inner iteration method was found to require only about 65 percent of the CPU time which was required by the most efficient line relaxation method without inner iterations. In the subsonic test case, poor matrix conditioning resulted in less efficiency than line relaxation methods employing a more conventional CPU-saving strategy.

Taylor, Arthur C., III↗

NASA NTRS1990

Distributed simulation of network protocols

Simulations of high speed network protocols are very CPU intensive operations requiring very long run times. Very high speed network protocols (Gigabit/sec rates) require longer simulation runs in order to reach a steady state, while at the same time requiring additional CPU processing for each unit of time because of the data rates for the traffic being simulated. As protocol development proceeds and simulations provide insights into any problems associated with the protocol, the simulation model often must be changed to generate additional or finer statistical performance information. Iterating on this process is very time consuming due to the required run times for the simulation models. The results of the efforts to distribute a high speed ring network protocol, Carrier Sensed Multiple Access/Ring Network (CSMA/RN), are presented.

Paterra, Frank↗

NASA NTRS1990

Two-dimensional Euler and Navier-Stokes Time accurate simulations of fan rotor flows

Two numerical methods are presented which describe the unsteady flow field in the blade-to-blade plane of an axial fan rotor. These methods solve the compressible, time-dependent, Euler and the compressible, turbulent, time-dependent, Navier-Stokes conservation equations for mass, momentum, and energy. The Navier-Stokes equations are written in Favre-averaged form and are closed with an approximate two-equation turbulence model with low Reynolds number and compressibility effects included. The unsteady aerodynamic component is obtained by superposing inflow or outflow unsteadiness to the steady conditions through time-dependent boundary conditions. The integration in space is performed by using a finite volume scheme, and the integration in time is performed by using k-stage Runge-Kutta schemes, k = 2,5. The numerical integration algorithm allows the reduction of the computational cost of an unsteady simulation involving high frequency disturbances in both CPU time and memory requirements. Less than 200 sec of CPU time are required to advance the Euler equations in a computational grid made up of about 2000 grid during 10,000 time steps on a CRAY Y-MP computer, with a required memory of less than 0.3 megawords.

Boretti, A. A.↗

NASA NTRS1989

TranAir: Recent advances and applications

TranAir is a computer code which solves the full-potential equation for transonic flow about very general and complex configurations. Piecewise flat surface panels are used to describe the surface geometry. This paneled definition is then embedded in an unstructured cartesian flow field grid. Finite elements are used in the discretization of the flow field grid in a manner which is fully conservative and second-order accurate. Since geometries may be defined with relative ease, and since the user is not involved in the generation of the flow field grid, computational results may be generated rather quickly for a wide range of geometries. For transonic cases in the cruise angle-of-attack range, TranAir has generated results which are in generally good agreement with both Euler results and wind tunnel data. A typical transonic case runs in 1 to 2 CPU hours on a Cray X-MP. For subcritical cases, the code runs in 15 to 30 CPU minutes, even for geometries in which several thousand surface panels are used in the definition. This ability to rapidly and accurately provide both subsonic and transonic predictions about very complex aircraft configurations gives TranAir the potential of being a very powerful and widely used design tool.

Madson, Michael D.↗

NASA NTRS1991

Input/output behavior of supercomputing applications

The collection and analysis of supercomputer I/O traces and their use in a collection of buffering and caching simulations are described. This serves two purposes. First, it gives a model of how individual applications running on supercomputers request file system I/O, allowing system designer to optimize I/O hardware and file system algorithms to that model. Second, the buffering simulations show what resources are needed to maximize the CPU utilization of a supercomputer given a very bursty I/O request rate. By using read-ahead and write-behind in a large solid stated disk, one or two applications were sufficient to fully utilize a Cray Y-MP CPU.

Miller, Ethan L.↗

NASA NTRS1991

Gigaflop performance on a CRAY-2: Multitasking a computational fluid dynamics application

The methodology is described for converting a large, long-running applications code that executed on a single processor of a CRAY-2 supercomputer to a version that executed efficiently on multiple processors. Although the conversion of every application is different, a discussion of the types of modification used to achieve gigaflop performance is included to assist others in the parallelization of applications for CRAY computers, especially those that were developed for other computers. An existing application, from the discipline of computational fluid dynamics, that had utilized over 2000 hrs of CPU time on CRAY-2 during the previous year was chosen as a test case to study the effectiveness of multitasking on a CRAY-2. The nature of dominant calculations within the application indicated that a sustained computational rate of 1 billion floating-point operations per second, or 1 gigaflop, might be achieved. The code was first analyzed and modified for optimal performance on a single processor in a batch environment. After optimal performance on a single CPU was achieved, the code was modified to use multiple processors in a dedicated environment. The results of these two efforts were merged into a single code that had a sustained computational rate of over 1 gigaflop on a CRAY-2. Timings and analysis of performance are given for both single- and multiple-processor runs.

Tennille, Geoffrey M.↗

NASA NTRS1991

Generalized conjugate-gradient methods for the Navier-Stokes equations

A generalized conjugate-gradient method is used to solve the two-dimensional, compressible Navier-Stokes equations of fluid flow. The equations are discretized with an implicit, upwind finite-volume formulation. Preconditioning techniques are incorporated into the new solver to accelerate convergence of the overall iterative method. The superiority of the new solver is demonstrated by comparisons with a conventional line Gauss-Siedel Relaxation solver. Computational test results for transonic flow (trailing edge flow in a transonic turbine cascade) and hypersonic flow (M = 6.0 shock-on-shock phenoena on a cylindrical leading edge) are presented. When applied to the transonic cascade case, the new solver is 4.4 times faster in terms of number of iterations and 3.1 times faster in terms of CPU time than the Relaxation solver. For the hypersonic shock case, the new solver is 3.0 times faster in terms of number of iterations and 2.2 times faster in terms of CPU time than the Relaxation solver.

Ajmani, Kumud↗

NASA NTRS1992

Development of iterative techniques for the solution of unsteady compressible viscous flows

A research effort was initiated at Georgia Tech in February 1991 on the development of efficient techniques for the computation of 2-D and 3-D unsteady compressible flow problems. It was found that in 2-D unsteady viscous flow applications, the generalized minimal residual (GMRES) scheme was able to significantly improve the accuracy and stability characteristics of an existing 2-D ADI (Alternating Direction Implicit) time marching scheme. That is, the GMRES/ADI combination allowed 10 to 20 times larger time steps compared to an ADI scheme. Because the GMRES algorithm requires 5 to 10 times the CPU work compared to the ADI scheme, the combined GMRES/ADI scheme yields a net factor of 2 savings in CPU cost. During the past year, we also experimented with GMRES/multigrid/ADI combination. The purpose of this combination was to compute the low frequency components of the change in the flow properties from one time step to the next on a coarse grid. This strategy reduces the memory requirements of the GMRES method roughly by a factor of 4-8 for steady flow problems.

Sankar, Lakshmi N.↗

NASA NTRS1992

Upwind relaxation methods for the Navier-Stokes equations using inner iterations

A subsonic and a supersonic problem are respectively treated by an upwind line-relaxation algorithm for the Navier-Stokes equations using inner iterations to accelerate steady-state solution convergence and thereby minimize CPU time. While the ability of the inner iterative procedure to mimic the quadratic convergence of the direct solver method is attested to in both test problems, some of the nonquadratic inner iterative results are noted to have been more efficient than the quadratic. In the more successful, supersonic test case, inner iteration required only about 65 percent of the line-relaxation method-entailed CPU time.

Taylor, Arthur C., III↗

NASA NTRS1993

Interfacing a high performance disk array file server to a Gigabit LAN

Our previous prototype, RAID-1, identified several bottlenecks in typical file server architectures. The most important bottleneck was the lack of a high-bandwidth path between disk, memory, and the network. Workstation servers, such as the Sun-4/280, have very slow access to peripherals on busses far from the CPU. For the RAID-2 system, we addressed this problem by designing a crossbar interconnect, Xbus board, that provides a 40MB/s path between disk, memory, and the network interfaces. However, this interconnect does not provide the system CPU with low latency access to control the various interfaces. To provide a high data rate to clients on the network, we were forced to carefully and efficiently design the network software. A block diagram of the system hardware architecture is given. In the following subsections, we describe pieces of the RAID-2 file server hardware that had a significant impact on the design of the network interface.

Seshan, Srinivasan↗