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At least 703 records · Page 39

A Cost Effective System Design Approach for Critical Space Systems

NASA-JSC required an avionics platform capable of serving a wide range of applications in a cost-effective manner. In part, making the avionics platform cost effective means adhering to open standards and supporting the integration of COTS products with custom products. Inherently, operation in space requires low power, mass, and volume while retaining high performance, reconfigurability, scalability, and upgradability. The Universal Mini-Controller project is based on a modified PC/104-Plus architecture while maintaining full compatibility with standard COTS PC/104 products. The architecture consists of a library of building block modules, which can be mixed and matched to meet a specific application. A set of NASA developed core building blocks, processor card, analog input/output card, and a Mil-Std-1553 card, have been constructed to meet critical functions and unique interfaces. The design for the processor card is based on the PowerPC architecture. This architecture provides an excellent balance between power consumption and performance, and has an upgrade path to the forthcoming radiation hardened PowerPC processor. The processor card, which makes extensive use of surface mount technology, has a 166 MHz PowerPC 603e processor, 32 Mbytes of error detected and corrected RAM, 8 Mbytes of Flash, and I Mbytes of EPROM, on a single PC/104-Plus card. Similar densities have been achieved with the quad channel Mil-Std-1553 card and the analog input/output cards. The power management built into the processor and its peripheral chip allows the power and performance of the system to be adjusted to meet the requirements of the application, allowing another dimension to the flexibility of the Universal Mini-Controller. Unique mechanical packaging allows the Universal Mini-Controller to accommodate standard COTS and custom oversized PC/104-Plus cards. This mechanical packaging also provides thermal management via conductive cooling of COTS boards, which are typically designed for convection cooling methods.

Abbott, Larry Wayne↗

Signalling design and architecture for a proposed mobile satellite network

In a frequency-division/demand-assigned multiple-access (FD/DAMA) architecture, each mobile subscriber must make a connection request to the Network Management Center before transmission for either open-end or closed-end services. Open-end services are for voice calls and long file transfer and are processed on a blocked-call-cleared basis. Closed-end services are for transmitting burst data and are processed on a first-come first-served basis. This paper presents the signalling design and architecture for non-voice services of an FD/DAMA mobile satellite network. The connection requests are made through the recently proposed multiple channel collision resolution scheme which provides a significantly higher throughput than the traditional slotted ALOHA scheme. For non-voice services, it is well known that retransmissions are necessary to ensure the delivery of a message in its entirety from the source to destination. Retransmission protocols for open-end and closed-end data transfer are investigated. The signal structure for the proposed network is derived from X-25 standards with appropriate modifications. The packet types and their usages are described in this paper.

Yan, T.-Y.↗

The aerodynamic design and performance of the NASA/GE E3 low pressure turbine

The aerodynamic design and scaled rig test results of the low pressure turbine (LPT) component for the NASA/General Electric Energy Efficient Engine (E3) are presented. The low pressure turbine is a highly loaded five-stage design featuring high outer wall slope, controlled vortex aerodynamics, low stage flow coefficient, and reduced clearances. An assessment of its performance has been made based on a series of scaled air turbine tests which were divided into two phases: Block I (March through August, 1979) and Block II (June through September, 1981). Results from the Block II five-stage test, summarized in the paper, indicate that the E3 LPT will attain an efficiency level of 91.5 percent at the Mach 0.8/35,000 ft. max. climb altitude design point. This is relative to program goals of 91.1 percent for the E3 demonstrator engine and 91.7 percent for a fully developed flight propulsion system LPT.

Cherry, D. G.↗

Concept of Operations for a Prospective "Proving Ground" in the Lunar Vicinity

NASA is studying a "Proving Ground" near the Moon to conduct human space exploration missions in preparation for future flights to Mars. This paper describes a concept of operations ("conops") for activities in the Proving Ground, focusing on the construction and use of a mobile Cislunar Transit Habitat capable of months-long excursions within and beyond the Earth-Moon system. Key elements in the conops include the Orion spacecraft (with mission kits for docking and other specialized operations) and the Space Launch System heavy-lift rocket. Potential additions include commercial launch vehicles and logistics carriers, solar electric propulsion stages to move elements between different orbits and eventually take them on excursions to deep space, a node module with multiple docking ports, habitation and life support blocks, and international robotic and piloted lunar landers. The landers might include reusable ascent modules which could remain docked to in-space elements between lunar sorties. The architecture will include infrastructure for launch preparation, communication, mission control, and range safety. The conops describes "case studies" of notional missions chosen to guide the design of the architecture and its elements. One such mission is the delivery of a ~10-ton pressurized element, co-manifested with an Orion on a Block 1B Space Launch System rocket, to the Proving Ground. With a large solar electric propulsion stage, the architecture could enable a year-long mission to land humans on a near-Earth asteroid. In the last case, after returning to near-lunar space, two of the asteroid explorers could join two crewmembers freshly arrived from Earth for a Moon landing, helping to safely quantify the risk of landing deconditioned crews on Mars. The conops also discusses aborts and contingency operations. Early return to Earth may be difficult, especially during later Proving Ground missions. While adding risk, limited-abort conditions provide needed practice for Mars, from which early return is likely to be impossible.

Love, Stanley G.↗

Theoretical and subjective bit assignments in transform picture

It is shown that all combinations of symmetrical input distributions with difference distortion measures give a bit assignment rule identical to the well-known rule for a Gaussian input distribution with mean-square error. Published work is examined to show that the bit assignment rule is useful for transforms of full pictures, but subjective bit assignments for transform picture coding using small block sizes are significantly different from the theoretical bit assignment rule. An intuitive explanation is based on subjective design experience, and a subjectively obtained bit assignment rule is given.

Jones, H. W., Jr.↗

Application handbook for a Standardized Control Module (SCM) for DC-DC converters, volume 1

The standardized control module (SCM) was developed for application in the buck, boost and buck/boost DC-DC converters. The SCM used multiple feedback loops to provide improved input line and output load regulation, stable feedback control system, good dynamic transient response and adaptive compensation of the control loop for changes in open loop gain and output filter time constraints. The necessary modeling and analysis tools to aid the design engineer in the application of the SCM to DC-DC Converters were developed. The SCM functional block diagram and the different analysis techniques were examined. The average time domain analysis technique was chosen as the basic analytical tool. The power stage transfer functions were developed for the buck, boost and buck/boost converters. The analog signal and digital signal processor transfer functions were developed for the three DC-DC Converter types using the constant on time, constant off time and constant frequency control laws.

Lee, F. C.↗

Grid generation and compressible flow computations about a high-speed civil transport configuration

Techniques and software are discussed for generating grids about a high-speed civil transport configuration. The configuration is defined by a computer-aided design system in wing, fuselage, tail and engine-nacelle components. Grid topology and the surfaces outlining the blocks of the topology are computed with interactive software. The volume grid is computed using software based on transfinite interpolation and Lagrangian blending functions. Several volume grids for inviscid and viscous flow have been generated using this system of codes. Demonstration flowfields around this vehicle are described.

Abolhassani, J. S.↗

Modeling ESA's TT/C systems

After a brief introduction on the need for simulation packages for the analysis and design of satellite communications systems, the software tool developed for the European Space Agency (ESA), its main objectives and the design choices made during the development are presented. A very concise description of the available communications and measurement block follows. The ESA standard Telemetry, Tracking and Command (TT&C) system simulator is then introduced along with a description of the ESA standard modulation and coding schemes. As an example, the simulation of the ranging system which is a non-standard communications block, is described in details. Several examples of TT&C simulations outputs are given and compared with measurement results or theoretical approximations, when available. Finally, future developments like the support of advanced modulation schemes and the dynamic satellite link simulation are presented.

Vassallo, Enrico↗

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing, a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study, which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating, and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RNI subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a hi ch data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second(Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high- speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗

Performance Testing of a Lightweight, High Efficiency 95 K Cryocooler

Performance data are presented for a flight-like, lightweight, high efficiency pulse tube cryogenic cooler. The cooler has a mass of less than 4.0 kg, and an efficiency of 12 W/W, which is 18% of Carnot at 95 K, nearly double the efficiency of previous cooler designs, The mass of the cooler has been reduced by approximately a factor of three. The design point cooling power is 10 watts at 95 K at a heat rejection temperature of 300 K. The no-load temperature is 45 K. The compressor is built by Hymatic Engineering, UK, and is of a horizontally opposed piston design using flexure bearings. The vertical pulse tube is built by TRW with the heat exchanger or cold block located approximately mid-way along the tube. The final assembly and integration is also performed by TRW. The inertance tube and dead volume are contained within one of the compressor end caps. The cooler was developed by TRW under a joint NASA-DOD program, and has a goal of 10 yr operating lifetime. Potential NASA applications will focus on using coolers of this type in Zero boil off (ZBO) cryogen storage topologies for next generation launch vehicles. Zero boil off systems will feature significant reductions in tank size and Initial Mass to Low Earth Orbit (IMLEO), thereby significantly reducing the cost of access to space, and enabling future missions. The coolers can be used directly in liquid oxygen (LOx) or liquid methane ZBO systems, as shield coolers in liquid hydrogen tanks, or as first stage coolers in two-stage liquid hydrogen (LH2) ZBO cooler systems. Finally, the coolers could find applications in exploration missions where either propellants or breathable oxygen are extracted from the planetary atmosphere using a Sabatier or similar process. The gases could then be liquefied for storage either directly in return vehicle propellant tanks or on the planetary surface. Data presented were taken with the cooler operating in a vacuum of 10 (exp -5) torr, at controlled rejection temperatures from 300 K down to 275 K using a cold water heat exchanger bolted to the cooler. Heat loads were varied between 0.5 W and 15 W by supplying current to a 50 omega resistor mounted on a copper cold plate which was bolted to the cooler cold block. Silicon diodes mounted on both the cold plate and the heat exchanger provided accurate temperature measurement to within plus or minus 0.25 K and plus or minus 0.5 K respectively, up to 100 K with plus or minus 1% accuracy above 100 K. Input power to the compressor was limited to 180 W, corresponding to a maximum stroke of 80%.

Salerno, Lou↗

Home Insulation With the Stroke of a Brush

Hy-Tech Thermal Solutions, LLC, of Melbourne, Florida, is producing a very complex blend of ceramic vacuum-filled refractory products designed to minimize the path of hot air transfer through ceilings, walls, and roofs. The insulating ceramic technology blocks the transfer of heat outward when applied to paint on interior walls and ceilings, and prevents the transfer of heat inward when used to paint exterior walls and roofs, effectively providing year-round comfort in the home. As a manufacturer and marketer of thermal solutions for residential, commercial, and industrial applications, Hy-Tech Thermal Solutions attributes its success to the high performance insulating ceramic microsphere originally developed from NASA thermal research at Ames Research Center. Shaped like a hollow ball so small that it looks as if it is a single grain of flour to the naked eye (slightly thicker than a human hair), the microsphere is noncombustible and fairly chemical-resistant, and has a wall thickness about 1/10 of the sphere diameter, a compressive strength of about 4,000 pounds per square inch, and a softening point of about 1,800 C. Hy-Tech Thermal Solutions improved upon these properties by removing all of the gas inside and creating a vacuum. In effect, a 'mini thermos bottle' is produced, acting as a barrier to heat by reflecting it away from the protected surface. When these microspheres are combined with other materials, they enhance the thermal resistance of those materials. In bulk, the tiny ceramic 'beads' have the appearance of a fine talcum powder. Their inert, nontoxic properties allow them to mix easily into any type of paint, coating, adhesive, masonry, or drywall finish. Additionally, their roundness causes them to behave like ball bearings, rolling upon each other, and letting the coatings flow smoothly. When applied like paint to a wall or roof, the microsphere coating shrinks down tight and creates a dense film of the vacuum cells. The resulting ceramic layer improves fire resistance, protects from ultraviolet rays, repels insects such as termites, and shields from the destructive forces of nature.

Source record↗

A mutation in protein phosphatase 2A regulatory subunit A affects auxin transport in Arabidopsis

The phytohormone auxin controls processes such as cell elongation, root hair development and root branching. Tropisms, growth curvatures triggered by gravity, light and touch, are also auxin-mediated responses. Auxin is synthesized in the shoot apex and transported through the stem, but the molecular mechanism of auxin transport is not well understood. Naphthylphthalamic acid (NPA) and other inhibitors of auxin transport block tropic curvature responses and inhibit root and shoot elongation. We have isolated a novel Arabidopsis thaliana mutant designated roots curl in NPA (rcn1). Mutant seedlings exhibit altered responses to NPA in root curling and hypocotyl elongation. Auxin efflux in mutant seedlings displays increased sensitivity to NPA. The rcn1 mutation was transferred-DNA (T-DNA) tagged and sequences flanking the T-DNA insert were cloned. Analysis of the RCN1 cDNA reveals that the T-DNA insertion disrupts a gene for the regulatory A subunit of protein phosphatase 2A (PP2A-A). The RCN1 gene rescues the rcn1 mutant phenotype and also complements the temperature-sensitive phenotype of the Saccharomyces cerevisiae PP2A-A mutation, tpd3-1. These data implicate protein phosphatase 2A in the regulation of auxin transport in Arabidopsis.

Non-NASA Center↗

Development of a Cryogenic Thermal Distortion Measurement Facility for Testing the James Webb Space Telescope Instrument Support Integration Module 2-D Test Assemblies

The James Webb Space Telescope Instrument Support Integration Module (ISIM) is being designed and developed at the Goddard Space Flight Center. The ISM Thermal Distortion Testing (ITDT) program was started with the primary objective to validate the ISM mechanical design process. The ITDT effort seeks to establish confidence and demonstrate the ability to predict thermal distortion in composite structures at cryogenic temperatures using solid element models. This-program's goal is to better ensure that ISIM meets all the mechanical and structural requirements by using test results to verify or improve structural modeling techniques. The first step to accomplish the ITDT objectives was to design, and then construct solid element models of a series 2-D test assemblies that represent critical building blocks of the ISIM structure. Second, the actual test assemblies consisting of composite tubes and invar end fittings were fabricated and tested for thermal distortion. This paper presents the development of the GSFC Cryo Distortion Measurement Facility (CDMF) to meet the requirements of the ISIM 2-D test. assemblies, and other future ISIM testing needs. The CDMF provides efficient cooling with both a single, and two-stage cryo-cooler. Temperature uniformity of the test assemblies during thermal transients and at steady state is accomplished by using sapphire windows for all of the optical ports on the radiation shields and by using .thermal straps to cool the test assemblies. Numerical thermal models of the test assemblies were used to predict the temperature uniformity of the parts during cooldown and at steady state. Results of these models are compared to actual temperature data from the tests. Temperature sensors with a 0.25K precision were used to insure that test assembly gradients did not exceed 2K lateral, and 4K axially. The thermal distortions of two assemblies were measured during six thermal cycles from 320K to 35K using laser interferometers. The standard deviation for all of the distortion measurements is less than 0.5 microns, which falls within the ISIM requirement of 3 microns.

Miller, Franklin↗

Nutritional Status Assessment During the Phase IIA and Phase III Lunar/Mars Life Support Test Project

Nutrition is a critical concern for extended-duration space missions (Smith and Lane, 1999). Loss of body weight is a primary consequence of altered nutrition, and is frequently observed during space flight (Smith and Lane; 1999). Other existing dietary concerns for space flight include excessive intakes of sodium and iron, and insufficient intakes of water and vitamin D (Smith and Lane, 1999). Furthermore, dependence on closed or semi-closed food systems increases the likelihood of inadequate intakes of key nutrients. This is a significant concern for extended-duration space missions. Space nutrition research often necessitates detailed recording of all food consumption. While this yields extremely accurate data, it requires considerable time and effort, and thus is not suitable for routine medical monitoring during space flight. To alleviate this problem, a food frequency questionnaire (FFQ) was designed to provide a quick and easy, yet reasonably accurate, method for crewmembers to provide dietary intake information to the ground. We report here a study which was designed to assess nutritional status before, during, and after the 60-d and 91-d chamber stays. An additional goal of the study was to validate a food frequency questionnaire designed specifically for use with space flight food systems.

Smith, Scott M.↗