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At least 703 records · Page 39

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NASA NTRS1995

Automatic selection of dynamic data partitioning schemes for distributed memory multicomputers

For distributed memory multicomputers such as the Intel Paragon, the IBM SP-2, the NCUBE/2, and the Thinking Machines CM-5, the quality of the data partitioning for a given application is crucial to obtaining high performance. This task has traditionally been the user's responsibility, but in recent years much effort has been directed to automating the selection of data partitioning schemes. Several researchers have proposed systems that are able to produce data distributions that remain in effect for the entire execution of an application. For complex programs, however, such static data distributions may be insufficient to obtain acceptable performance. The selection of distributions that dynamically change over the course of a program's execution adds another dimension to the data partitioning problem. In this paper, we present a technique that can be used to automatically determine which partitionings are most beneficial over specific sections of a program while taking into account the added overhead of performing redistribution. This system is being built as part of the PARADIGM (PARAllelizing compiler for DIstributed memory General-purpose Multicomputers) project at the University of Illinois. The complete system will provide a fully automated means to parallelize programs written in a serial programming model obtaining high performance on a wide range of distributed-memory multicomputers.

Palermo, Daniel J.↗

NASA NTRS2010

Flexible Peripheral Component Interconnect Input/Output Card

The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.

Bigelow, Kirk K.↗

NASA NTRS1989

A comparison of select image-compression algorithms for an electronic still camera

This effort is a study of image-compression algorithms for an electronic still camera. An electronic still camera can record and transmit high-quality images without the use of film, because images are stored digitally in computer memory. However, high-resolution images contain an enormous amount of information, and will strain the camera's data-storage system. Image compression will allow more images to be stored in the camera's memory. For the electronic still camera, a compression algorithm that produces a reconstructed image of high fidelity is most important. Efficiency of the algorithm is the second priority. High fidelity and efficiency are more important than a high compression ratio. Several algorithms were chosen for this study and judged on fidelity, efficiency and compression ratio. The transform method appears to be the best choice. At present, the method is compressing images to a ratio of 5.3:1 and producing high-fidelity reconstructed images.

Nerheim, Rosalee↗

NASA NTRS1989

FFTs in external or hierarchical memory

A description is given of advanced techniques for computing an ordered FFT on a computer with external or hierarchical memory. These algorithms (1) require as few as two passes through the external data set, (2) use strictly unit stride, long vector transfers between main memory and external storage, (3) require only a modest amount of scratch space in main memory, and (4) are well suited for vector and parallel computation. Performance figures are included for implementations of some of these algorithms on Cray supercomputers. Of interest is the fact that a main memory version outperforms the current Cray library FFT routines on the Cray-2, the Cray X-MP, and the Cray Y-MP systems. Using all eight processors on the Cray Y-MP, this main memory routine runs at nearly 2 Gflops.

Bailey, David H.↗

NASA NTRS1992

Fabrication of silicon-based shape memory alloy micro-actuators

Thin film shape memory alloy has been integrated with silicon in a new actuation mechanism for microelectromechanical systems. This paper compares nickel-titanium film with other actuators, describes recent results of chemical milling processes developed to fabricate shape memory alloy microactuators in silicon, and describes simple actuation mechanisms which have been fabricated and tested.

Johnson, A. David↗

NASA NTRS1995

Distributed state-space generation of discrete-state stochastic models

High-level formalisms such as stochastic Petri nets can be used to model complex systems. Analysis of logical and numerical properties of these models of ten requires the generation and storage of the entire underlying state space. This imposes practical limitations on the types of systems which can be modeled. Because of the vast amount of memory consumed, we investigate distributed algorithms for the generation of state space graphs. The distributed construction allows us to take advantage of the combined memory readily available on a network of workstations. The key technical problem is to find effective methods for on-the-fly partitioning, so that the state space is evenly distributed among processors. In this paper we report on the implementation of a distributed state-space generator that may be linked to a number of existing system modeling tools. We discuss partitioning strategies in the context of Petri net models, and report on performance observed on a network of workstations, as well as on a distributed memory multi-computer.

Ciardo, Gianfranco↗

NASA NTRS1987

Measurement-based analysis of error latency

This paper demonstrates a practical methodology for the study of error latency under a real workload. The method is illustrated with sampled data on the physical memory activity, gathered by hardware instrumentation on a VAX 11/780 during the normal workload cycle of the installation. These data are used to simulate fault occurrence and to reconstruct the error discovery process in the system. The technique provides a means to study the system under different workloads and for multiple days. An approach to determine the percentage of undiscovered errors is also developed and a verification of the entire methodology is performed. This study finds that the mean error latency, in the memory containing the operating system, varies by a factor of 10 to 1 (in hours) between the low and high workloads. It is found that of all errors occurring within a day, 70 percent are detected in the same day, 82 percent within the following day, and 91 percent within the third day. The increase in failure rate due to latency is not so much a function of remaining errors but is dependent on whether or not there is a latent error.

Chillarege, Ram↗

NASA NTRS2014

Single-Event Effect Response of a Commercial ReRAM

We show heavy ion test results of a commercial production-level ReRAM. The memory array is robust to bit upsets. However the ReRAM system is vulnerable to SEFIs due to upsets in peripheral circuits, including the sense amplifier.

commercial-off-the-shelf (COT)↗

NASA NTRS1982

Computer program for post-flight evaluation of a launch vehicle upper-stage on-off reaction control system

This report describes a FORTRAN IV coded computer program for post-flight evaluation of a launch vehicle upper stage on-off reaction control system. Aerodynamic and thrust misalignment disturbances are computed as well as the total disturbing moments in pitch, yaw, and roll. Effective thrust misalignment angle time histories of the rocket booster motor are calculated. Disturbing moments are integrated and used to estimate the required control system total inpulse. Effective control system specific inpulse is computed for the boost and coast phases using measured control fuel useage. This method has been used for more than fifteen years for analyzing the NASA Scout launch vehicle second and third-stage reaction control system performance. The computer program is set up in FORTRAN IV for a CDC CYBER 175 system. With slight modification it can be used on other machines having a FORTRAN compiler. The program has optional CALCOMP plotting output. With this option the program requires 19K words of memory and has 786 cards. Running time on a CDC CYBER 175 system is less than three (3) seconds for a typical problem.

Knauber, R. N.↗

NASA NTRS1986

Identification of nonlinear system parameters in joints using the force-state mapping technique

A procedure is presented for identifying the potentially strong nonlinear properties of structural members, such as joints, by expressing the force transmitted by the member as a function of its mechanical state. By explicitly including position and rate dependent effects, the surface of transmitted force versus state, the force-state map, has distinct, unique, superposable features for common structural nonlinearities, even those which appear to indicate hysteresis on a force-stroke presentation. An analysis is performed on the influence of true memory effects, transient response, and uncertainty in the measurements and system mass on the precision of the procedure. The successful identification of simulated data verifies the accuracy of the identification algorithm. Tests are then conducted on three actual joint models, with incomplete state measurements typical of an actual testing environment. The ability of the procedure to estimate the complete state vector and to analyze and reconstruct the measured nonlinear characteristics is demonstrated.

Crawley, E. F.↗

NASA NTRS2009

Multi-Core Processor Memory Contention Benchmark Analysis Case Study

Multi-core processors dominate current mainframe, server, and high performance computing (HPC) systems. This paper provides synthetic kernel and natural benchmark results from an HPC system at the NASA Goddard Space Flight Center that illustrate the performance impacts of multi-core (dual- and quad-core) vs. single core processor systems. Analysis of processor design, application source code, and synthetic and natural test results all indicate that multi-core processors can suffer from significant memory subsystem contention compared to similar single-core processors.

Simon, Tyler↗

NASA NTRS1985

Features of the solar array drive mechanism for the space telescope

The solar array drive mechanism for the Space Telescope embodies several features not customarily found on solar array drives. Power and signal transfer is achieved by means of a flexible wire harness for which the chosen solution, consisting of 168 standard wires, is described. The torque performance data of the harness over its temperature range are presented. The off load system which protects the bearings from the launch loads is released by a trigger made from Nitinol, the memory alloy. The benefits of memory alloy and the caveats for the design are briefly discussed. The design of the off load system is described and test experience is reported.

Hostenkamp, R. G.↗

NASA NTRS2014

A Morphing Radiator for High-Turndown Thermal Control of Crewed Space Exploration Vehicles

Spacecraft designed for missions beyond low earth orbit (LEO) face a difficult thermal control challenge, particularly in the case of crewed vehicles where the thermal control system (TCS) must maintain a relatively constant internal environment temperature despite a vastly varying external thermal environment and despite heat rejection needs that are contrary to the potential of the environment. A thermal control system may be required to reject a higher heat load to warm environments and a lower heat load to cold environments, necessitating a relatively high turndown ratio. A modern thermal control system is capable of a turndown ratio of on the order of 12:1, but crew safety and environment compatibility have constrained these solutions to massive multi-loop fluid systems. This paper discusses the analysis of a unique radiator design that employs the behavior of shape memory alloys (SMAs) to vary the turndown of, and thus enable, a single-loop vehicle thermal control system for space exploration vehicles. This design, a morphing radiator, varies its shape in response to facesheet temperature to control view of space and primary surface emissivity. Because temperature dependence is inherent to SMA behavior, the design requires no accommodation for control, instrumentation, or power supply in order to operate. Thermal and radiation modeling of the morphing radiator predict a turndown ranging from 11.9:1 to 35:1 independent of TCS configuration. Coupled thermal-stress analyses predict that the desired morphing behavior of the concept is attainable. A system level mass analysis shows that by enabling a single loop architecture this design could reduce the TCS mass by between 139 kg and 225 kg. The concept has been demonstrated in proof-of-concept benchtop tests.

Cognata, Thomas J.↗

NASA NTRS2015

A Morphing Radiator for High-Turndown Thermal Control of Crewed Space Exploration Vehicles

Spacecraft designed for missions beyond low earth orbit (LEO) face a difficult thermal control challenge, particularly in the case of crewed vehicles where the thermal control system (TCS) must maintain a relatively constant internal environment temperature despite a vastly varying external thermal environment and despite heat rejection needs that are contrary to the potential of the environment. A thermal control system is in other words required to reject a higher heat load to warm environments and a lower heat load to cold environments, necessitating a quite high turndown ratio. A modern thermal control system is capable of a turndown ratio of on the order of 12:1, but for crew safety and environment compatibility these are massive multi-loop fluid systems. This paper discusses the analysis of a unique radiator design which employs the behavior of shape memory alloys (SMA) to vary the turndown of, and thus enable, a single-loop vehicle thermal control system for space exploration vehicles. This design, a morphing radiator, varies its shape in response to facesheet temperature to control view of space and primary surface emissivity. Because temperature dependence is inherent to SMA behavior, the design requires no accommodation for control, instrumentation, nor power supply in order to operate. Thermal and radiation modeling of the morphing radiator predict a turndown ranging from 11.9:1 to 35:1 independent of TCS configuration. Stress and deformation analyses predict the desired morphing behavior of the concept. A system level mass analysis shows that by enabling a single loop architecture this design could reduce the TCS mass by between 139 kg and 225 kg. The concept is demonstrated in proof-of-concept benchtop tests.

Cognata, Thomas J.↗

NASA NTRS2006

Real-Time Rocket/Vehicle System Integrated Health Management Laboratory For Development and Testing of Health Monitoring/Management Systems

Pratt & Whitney Rocketdyne has developed a real-time engine/vehicle system integrated health management laboratory, or testbed, for developing and testing health management system concepts. This laboratory simulates components of an integrated system such as the rocket engine, rocket engine controller, vehicle or test controller, as well as a health management computer on separate general purpose computers. These general purpose computers can be replaced with more realistic components such as actual electronic controllers and valve actuators for hardware-in-the-loop simulation. Various engine configurations and propellant combinations are available. Fault or failure insertion capability on-the-fly using direct memory insertion from a user console is used to test system detection and response. The laboratory is currently capable of simulating the flow-path of a single rocket engine but work is underway to include structural and multiengine simulation capability as well as a dedicated data acquisition system. The ultimate goal is to simulate as accurately and realistically as possible the environment in which the health management system will operate including noise, dynamic response of the engine/engine controller, sensor time delays, and asynchronous operation of the various components. The rationale for the laboratory is also discussed including limited alternatives for demonstrating the effectiveness and safety of a flight system.

Aguilar, R.↗

NASA NTRS1976

The Mount Wilson solar magnetograph - Scanning and data system

The paper describes a computer-operated image-scanning and data-collection system for the magnetograph at the Mt. Wilson 150-foot Tower telescope. The system is based on a minicomputer with a 32K word core memory and a generalized interface unit for controlling image motion, a keyboard, and an associated television screen. Operation of the solar image guider and the data-collection assembly is outlined along with the observation and data-reduction procedures. Advantages of the system include the ability to move the image in almost any conceivable fashion, a wide choice of integration times, and increased accuracy in magnetic and Doppler calibrations as well as in setting of the magnetic zero level.

Howard, R.↗

NASA NTRS1993

Integrating Software Modules For Robot Control

Reconfigurable, sensor-based control system uses state variables in systematic integration of reusable control modules. Designed for open-architecture hardware including many general-purpose microprocessors, each having own local memory plus access to global shared memory. Implemented in software as extension of Chimera II real-time operating system. Provides transparent computing mechanism for intertask communication between control modules and generic process-module architecture for multiprocessor realtime computation. Used to control robot arm. Proves useful in variety of other control and robotic applications.

Volpe, Richard A.↗

NASA NTRS1994

Managing People's Data

Just imagine a mass storage system that consists of a machine with 2 CPUs, 1 Gigabyte (GB) of memory, 400 GB of disk space, 16800 cartridge tapes in the automated tape silos, 88,000 tapes located in the vault, and the software to manage the system. This system is designed to be a data repository; it will always have disk space to store all the incoming data. Currently 9.14 GB of new data per day enters the system with this rate doubling each year. To assure there is always disk space available for new data, the system. has to move data reside from the expensive disk to a much less expensive medium such as the 3480 cartridge tapes. Once the data is archived to tape, it should be able to move back to disk when someone wants to access it and the data movement should be transparent to the user. Now imagine all the tasks that a system administrator must perform to keep this system running 24 hour a day, 7 days a week. Since the filesystem maintains the illusion of unlimited disk space, data that comes to the system must get moved to tapes in an efficient manner. This paper will describe the mass storage system running at the Numerical Aerodynamic Simulation (NAS) at NASA Ames Research Center in both software and hardware aspects, then it will describe all of the tasks the system administrator has to perform on this system.

Le, Diana↗