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Large positive and negative Hall coefficients achievable. Family of Hall-effect devices made from multilayer metal films instead of semiconductor materials. Metal films easier to fabricate; formed by deposition on variety of substrates, and leads readily attached to them. Fabricated with larger areas, potentially more reliable, and less affected by impurities. Also used to measure magnetic fields. Devices especially useful at low temperatures.
Key issues are discussed that must be overcome in order to apply commercial semiconductor technologies in space, emphasizing ways to test and qualify devices so they meet radiation hardness requirements.
Semiconductor bolometers that are capable of detecting electromagnetic radiation over most or all of the infrared spectrum and that give background-limited performance at operating temperatures from 20 to 300 K have been invented. The term background-limited performance as applied to a bolometer, thermopile, or other infrared detector signifies that the ability to detect infrared signals that originate outside the detector is limited primarily by thermal noise attributable to the background radiation generated external to the bolometer. The signal-to-noise ratios and detectivities of the bolometers and thermopiles available prior to this invention have been lower than those needed for background-limited performance by factors of about 100 and 10, respectively. Like other electrically resistive bolometers, a device according to the invention exhibits an increase in electrical resistance when heated by infrared radiation. Depending on whether the device is operated under the customary constant- current or constant-voltage bias, the increase in electrical resistance can be measured in terms of an increase in voltage across the device or a decrease in current through the device, respectively. In the case of a semiconductor bolometer, it is necessary to filter out visible and shorter-wavelength light that could induce photoconductivity and thereby counteract all or part of the desired infrared- induced increase in resistance. The basic semiconductor material of a bolometer according to the invention is preferably silicon doped with one or more of a number of elements, each of which confers a different variable temperature coefficient of resistance. Suitable dopants include In, Ga, S, Se, Te, B, Al, As, P, and Sb. The concentration of dopant preferably lies in the range between 0.1 and 1,000 parts per billion.
A three-dimensional (3-D) numerical model has been developed to study the fluid flow and heat transfer through a manifold-microchannel (MMC) heat sink, a microfluidic cooling system designed as a heat dissipation solution for compact, high-powered electronic systems. An MMC consists of a 3-D manifold structure that distributes working fluid through alternating inlet and outlet manifold channels that guide the fluid to and from the microchannels, shortening the flow length and thereby, reducing the pressure drop across the system. Wide bandgap semiconductors such as silicon carbide (SiC) are increasingly utilized due to their ability to enable smaller electronic devices and components to operate more efficiently at higher frequencies. These semiconductors can greatly benefit from the MMC, which can extract all the heat produced by compact, high-powered electronics, enabling them to achieve optimal performance. The MMC also utilizes an embedded cooling approach which allows for fabrication directly within SiC-based electronics, resulting in significant mass and weight savings and lower thermal resistance than conventional heat sink designs. This paper outlines the methods used to conduct fluid and thermal analysis of different MMC configurations for flow parameters such as flow rate and inlet flow conditions. This study involves both steady state and transient thermal analysis as a gradually increasing heat flux is applied to the system over time, which is representative of the heat dissipation from the electronics over a given period. Results from the analysis show that the MMC is capable of effectively dissipating heat flux of ~100 W/cm2 while maintaining considerably low pressure drop (< 1 kPa) and thermal resistance (< 1 K/W) for certain single-phase working fluids.
A three-dimensional (3-D) numerical model has been developed to study the fluid flow and heat transfer through a manifold-microchannel (MMC) heat sink, a microfluidic cooling system designed as a heat dissipation solution for compact, high-powered electronic systems. An MMC consists of a 3-D manifold structure that distributes working fluid through alternating inlet and outlet manifold channels that guide the fluid to and from the microchannels, shortening the flow length and thereby, reducing the pressure drop across the system. Wide bandgap semiconductors such as silicon carbide (SiC) are increasingly utilized due to their ability to enable smaller electronic devices and components to operate more efficiently at higher frequencies. These semiconductors can greatly benefit from the MMC, which can extract all the heat produced by compact, high-powered electronics, enabling them to achieve optimal performance. The MMC also utilizes an embedded cooling approach which allows for fabrication directly within SiC-based electronics, resulting in significant mass and weight savings and lower thermal resistance than conventional heat sink designs. This paper outlines the methods used to conduct fluid and thermal analysis of different MMC configurations for flow parameters such as flow rate and inlet flow conditions. This study involves both steady state and transient thermal analysis as a gradually increasing heat flux is applied to the system over time, which is representative of the heat dissipation from the electronics over a given period. Results from the analysis show that the MMC is capable of effectively dissipating heat flux of ~100 W/cm2 while maintaining considerably low pressure drop (< 1 kPa) and thermal resistance (< 1 K/W) for certain single-phase working fluids.
Significant advances in the development of high electron-mobility field-effect transistors (HEMT's) have resulted in cryogenic, low-noise amplifiers (LNA's) whose noise temperatures are within an order of magnitude of the quantum noise limit (hf/k). Further advances in HEMT technology at cryogenic temperatures may eventually lead to the replacement of maser and superconducting insulator superconducting front ends in the 1- to 100-GHz frequency band. Key to identification of the best HEMT's and optimization of cryogenic LNA's are accurate and repeatable device measurements at cryogenic temperatures. This article describes the design and operation of a cryogenic coplanar waveguide probe system for the characterization and modeling of advanced semiconductor transistors at cryogenic temperatures. Results on advanced HEMT devices are presented to illustrate the utility of the measurement system.
An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.
An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.
There is an emerging technology of photonic (or optoelectronic) integrated circuits (PICs or OEICs). In PICs, optical and electronic components are grown together on the same chip. rib build such devices and subsystems, one needs to model the entire chip. Accurate computer modeling of electromagnetic wave propagation in semiconductors is necessary for the successful development of PICs. More specifically, these computer codes would enable the modeling of such devices, including their subsystems, such as semiconductor lasers and semiconductor amplifiers in which there is femtosecond pulse propagation. Here, the computer simulations are made by solving the full vector, nonlinear, Maxwell's equations, coupled with the semiconductor Bloch equations, without any approximations. The carrier is retained in the description of the optical pulse, (i.e. the envelope approximation is not made in the Maxwell's equations), and the rotating wave approximation is not made in the Bloch equations. These coupled equations are solved to simulate the propagation of femtosecond optical pulses in semiconductor materials. The simulations describe the dynamics of the optical pulses, as well as the interband and intraband.
It is noted that complementary metal oxide semiconductor (CMOS) microcircuits are inherently latchup prone. The four-layer n-p-n-p structures formed from the parasitic pnp and npn transistors make up a silicon controlled rectifier. If properly biased, this rectifier may be triggered 'ON' by electrical transients, ionizing radiation, or a single heavy ion. This latchup phenomenon might lead to a loss of functionality or device burnout. Results are presented from tests on 19 different device types from six manufacturers which investigate their latchup sensitivity with argon and krypton beams. The parasitic npnp paths are identified in general, and a qualitative rationale is given for latchup susceptibility, along with a latchup cross section for each type of device. Also presented is the correlation between bit-flip sensitivity and latchup susceptibility.
Electronic circuits and systems designed for deep space missions need to operate reliably and efficiently in harsh environments that include very low temperatures. Spacecraft that operate in such cold environments carry a large number of heaters so that the ambient temperature for the onboard electronics remains near 20 C. Electronics that can operate at cryogenic temperatures will simplify system design and reduce system size and weight by eliminating the heaters and their associated structures. As a result, system development and launch cost will be reduced. At the NASA Glenn Research Center, an ongoing program is focusing on the development of power electronics geared for deep space low-temperature environments. The research and development efforts include electrical components design, circuit design and construction, and system integration and demonstration at cryogenic temperatures. Investigations are being carried out on circuits and systems that are targeted for use in NASA missions where low temperatures will be encountered: devices such as ceramic and tantalum capacitors, metal film resistors, semiconductor switches, magnetics, and integrated circuits including dc/dc converters, operational amplifiers, voltage references, and motor controllers. Test activities cover a wide range of device and circuit performance under simple as well as complex test conditions, such as multistress and thermal cycling. The effect of low-temperature conditions on the switching characteristics of an advanced silicon-on-insulator field effect transistor is shown. For gate voltages (VGS) below 2.6 V, drain currents at -190 C are lower than drain currents at room temperature (20 C).
Solid state bulk and semiconductor junction phenomena evaluated for advanced NASA sensors and transducers
The device considered in this study is a semiconductor waveguide isolator consisting of a hollow column of a semiconductor mounted coaxially in a circular waveguide in a longitudinal dc magnetic field. An elementary and physical analysis based on the excitation of plane waves in the guide and a more rigorous mode-matching analysis (MMA) are presented. These theoretical predictions are compared with experimental results for an InSb isolator at 94 GHz and 75 K.
Tested devices were manufactured by Semtech and Micro Semiconductor. Failure rate of Semtech diodes exceeded 50% in all three test groups. Failure mode could not be precisely determined.
Reliability analysis of the transistor JANTX2N4150 manufactured by General Semiconductor and Transitron is reported. The discrete devices were subjected to power and temperature step stress tests and then to electrical tests after completing the power/temperature step stress point. Control sample units were maintained for verification of the electrical parametric testing. Results are presented.
The operating characteristics of the semiconductor spark gap ignitor plug used to initiate the discharge in a pulsed plasma thruster are investigated. Current and voltage waveform measurements for the ignitor plug alone, and for the plug mounted in the thruster cathode indicate an average dynamic impedance of 0.2 ohms for a wide range of operating conditions, and a trigger circuit energy transfer efficiency to the plug on the order of 25%. Two modes of trigger ignition are found which are related to the rise time of the applied voltage pulse. Analysis of plasma characteristics reveals plug erosion to occur primarily in the semiconductor and anode regions, by mechanisms including plug metal embrittlement, plasma sputtering and vaporization caused by the discharge current pulse. Measurements also indicate a plume velocity on the order of 1580,000 cm/sec which increases with trigger circuit stored energy. The results establish levels of performance for future applications of semiconductor spark gap ignitor plugs in plasma devices.
Device suitable for molecular epitaxial formation of semiconductor components. Improved electrostatic lens system uses cylindrical mirror as central element between two tubular lenses. Abberations introduced by mirror tend to cancel those introduced by tubular lenses. Result is order-of-magnitude improvement in chromatic or spherical compensation.
Effects on the internal spacecraft electronics due to exposure to the natural and enhanced space radiation environment will be reviewed. The emphasis will be placed on the description of the nature of both the exposure environment and failure mechanisms in semiconductors. Understanding both the system environment and device effects is critical in the use of laboratory simulation environments to obtain the data necessary to design and qualify components for successful application.