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A prototype coaxial cable bus communication system used in the Trend Monitoring System to interconnect intelligent graphics terminals to a host minicomputer is described. The terminals and host are connected to the bus through a microprocessor-based RF modem termed a Bus Interface Unit (BIU). The BIU hardware and the Carrier Sense Multiple Access Listen-While-Talk protocol used on the network are described.
The Interchange No. NCC2-5149 deals with the emerging technology of photonic (or optoelectronic) integrated circuits (PICs or OEICs). In PICs, optical and electronic components are grown together on the same chip. To build such devices and subsystems, one needs to model the entire chip. PICs are useful for building components for integrated optical transmitters, integrated optical receivers, optical data storage systems, optical interconnects, and optical computers. For example, the current commercial rate for optical data transmission is 2.5 gigabits per second, whereas the use of shorter pulses to improve optical transmission rates would yield an increase of 400 to 1000 times. The improved optical data transmitters would be used in telecommunications networks and computer local-area networks. Also, these components can be applied to activities in space, such as satellite to satellite communications, when the data transmissions are made at optical frequencies. The research project consisted of developing accurate computer modeling of electromagnetic wave propagation in semiconductors. Such modeling is necessary for the successful development of PICs. More specifically, these computer codes would enable the modeling of such devices, including their subsystems, such as semiconductor lasers and semiconductor amplifiers in which there is femtosecond pulse propagation. Presently, there are no computer codes that could provide this modeling. Current codes do not solve the full vector, nonlinear, Maxwell's equations, which are required for these short pulses and also current codes do not solve the semiconductor Bloch equations, which are required to accurately describe the material's interaction with femtosecond pulses. The research performed under NCC2-5149 solves the combined Maxwell's and Bloch's equations.
High performance multi-GPU computing becomes an inevitable trend due to the ever-increasing demand on computation capability in emerging domains such as deep learning, big data and planet-scale simulations. However, the lack of deep understanding on how modern GPUs can be connected and the real impact of state-of-the-art interconnect technology on multi-GPU application performance become a hurdle. In this paper, we fill the gap by conducting a thorough evaluation on five latest types of modern GPU interconnects: PCIe, NVLink-V1, NVLink-V2, NVLink-SLI and NVSwitch, from six high-end servers and HPC platforms: NVIDIA P100-DGX-1, V100-DGX-1, DGX-2, OLCF’s SummitDev and Summit supercomputers, as well as an SLI-linked system with two NVIDIA Turing RTX-2080 GPUs. Based on the empirical evaluation, we have observed four new types of GPU communication network NUMA effects: three are triggered by NVLink’s topology, connectivity and routing, while one is caused by PCIe chipset design issue. These observations indicate that, for a multi-GPU application running in a multi-GPU node, choosing the right GPU combination can impose considerable impact on GPU communication efficiency, as well as an application’s overall performance. Our evaluation can be leveraged in building practical multi-GPU performance models, which are vital for GPU task allocation, scheduling and migration in a shared environment (e.g., AI cloud and HPC centers), as well as communication-oriented performance tuning.
With the rapid digitization of the world, an increasing number of real-world applications are turning to nonEuclidean data, modeled as graphs. Due to their intrinsic high complexity and irregularity, learning from graph data demands tremendous computational power. Recently, CMOS-compatible Ising machines, i.e., dynamic systems composed of CMOS components, have emerged as a new approach that harnesses the inherent power of natural annealing within dynamic systems to efficiently resolve binary optimization problems and have been adopted for traditional graph computation, such as max-cut. However, when performing complex Graph Learning (GL) tasks, Ising machines face significant hurdles: (i) they are inherently binary and thus ill-suited for real-valued problems; (ii) their expensive all-to-all coupling network that guarantees effective natural annealing poses daunting scalability concerns. To address these challenges, this paper proposes a nature-powered graph learning framework dubbed DS-GL, which is the first effort to transform the process of solving graph learning problems into the natural annealing process within a parameterized dynamic system embodied as a CMOS chip. To tackle the two major hurdles, DS-GL first augments the Ising machine architecture to modify the self-reaction term of its Hamiltonian function from linear to quadratic, effectively serving as an energy regulator. This adjustment maintains the system’s original physical interpretation while enabling it to process continuous, real-valued data. Second, to address the scaling issue, DS-GL further upgrades the real-valued dense Ising machine by decomposing it into a mesh-based multi-PE dynamic system that supports efficient distributed spatial-temporal co-annealing across different PEs through sparse interconnects. By exploiting the inherent sparsity and component structures in real-world graphs, DS-GL is able to map complex graph learning tasks onto the scalable dynamic system while maintaining high accuracy. Evaluations with three diverse GL applications across six real-world datasets, including traffic flow and COVID-19 prediction, show that DS-GL can deliver from 102× to 106× speedups and 500× energy reduction over Graph Neural Networks on GPUs, with 5% - 20% accuracy enhancement.
Escalating deployment of PV and grid-edge devices on the distribution grid has increased the sustainability and efficiency of the electric grid. However, the increasing number of distributed energy resources (DERs) deployed creates a heightened cyber-physical interdependency on the distribution grid and thus creates more vectors for cyber-attacks to exploit through information and communication technology (ICT) systems and networks. For example, control signal packets can be modified, intercepted, or corrupted due to vulnerabilities in communication protocols used by microgrid controllers and grid edge devices for power control. Therefore, to mitigate and prevent cyber-attacks on grid edge devices and the inverter-based resources connected to the distribution grid, the U.S. Department of Solar Energy Technologies Office (SETO) awarded funding to the National Renewable Energy Laboratory and Sandia National Laboratory (SNL) to research, develop, and harmonize cybersecurity standards for Photovoltaic (PV) systems and for other kinds of DERs. To help develop a standard for DER cybersecurity, NREL established certification recommendations and test cases, in consensus with the solar industry and UL, for ensuring intrinsic design security for DERs. These recommendations were developed to bolster the cybersecure functionalities such as TLS, MAC, CRL, session resumption/renegotiation, and password, system, and service security management within the DER devices. The proposed test cases verify authentication, authorization, confidentiality, and data integrity for data and communications of DERs that use Transmission Control Protocol/Internet Protocol (TCP/IP). They were also developed to protect DER communications from eavesdropping, replay, man-in-the-middle, denial of service (DoS), spoofing through security certificates, least-privilege violation, and brute-force credentials. This report, which has been validated and reviewed by UL, expands upon those test cases to provide DER cybersecurity certification recommendations which increase DER resiliency and help to mitigate cyber-attacks. UL's collaboration with NREL and approval of this document will accelerate the adoption of a UL standard for DER cybersecurity.
Fail-safe computing refers to computing systems that revert to a non-operational safe state when a fault occurs. In this paper, we investigate a circuit level technique as mitigation for single event upsets (SEUs) and fault injection attacks on field programmable gate arrays (FPGAs), and analyze the effectiveness of the technique as a fail-safe monitor for an encryption algorithm. The propagation of fault effects through FPGA primitives including lookup tables (LUTs) and programmable interconnect points (PIPs) is assessed within an FPGA architecture created using an open source tool, and validated using fault injection experiments on an FPGA. The analysis reveals additional vulnerabilities exist within reconfigurable architectures over those in equivalent fail-safe application specific integrated circuit (ASIC), thus requiring a more elaborate network of redundant circuits and checking logic. The configuration memory bits (CMBs), which configure routing and designate logic functions within the LUTs of the FPGA, add complexity to fail-safe design strategies by introducing additional fault conditions and fault propagation paths. A resource-efficient fail-safe circuit design technique called DEsign for Fail-safe in reCONfigurable systems (DEFCON) is proposed. The benefits and limitations associated with DEFCON are described in the context of fault injection experiments carried out as simulations and in FPGA hardware.
The deep underground neutrino experiment (DUNE) is a next-generation neutrino experiment that will probe the properties of these elusive particles with unparalleled precision. It will also act as an observatory for neutrino bursts caused by nearby supernovae, in the event that one occurs, while the experiment is in operation. Given these goals, the DUNE trigger and DAQ system must be able to maintain extremely high uptime and provide a path for full readout of the detectors for very long times (up to 100 s). To achieve these ends, we have designed the DUNE DAQ system around a flexible “application framework,” which provides a modular interface for specific tasks while handling the interconnections between them. The application framework collects modules into applications, which can then be interacted with as units by the control, configuration, and monitoring systems. One of the key features of the framework is its communication abstraction layer, which allows for modules to interact with both internal queues and external network connections with a single transport-agnostic interface. We will report on the architecture and features of the framework.
The Deep Underground Neutrino Experiment (DUNE) is a next-generation neutrino experiment that will probe the properties of these elusive particles with unparalleled precision. It will also act as an observatory for neutrino bursts caused by nearby supernovae, in the event that one occurs while the experiment is in operation. Given these goals, the DUNE trigger and DAQ system must be able to maintain extremely high uptime and provide a path for full readout of the detectors for very long times (up to 100s). To achieve these ends, we have designed the DUNE DAQ system around a flexible “application framework”, which provides a modular interface for specific tasks while handling the interconnections between them. The application framework collects modules into applications which can then be interacted with as units by the control, configuration and monitoring systems. One of the key features of the framework is its communications abstraction layer, which allows for modules to interact with both internal queues and external network connections with a single transport-agnostic interface. We will report on the architecture and features of the framework.
The purpose of this project is to design and evaluate the FDDI Fiber Optics Network for Ethernets, VAX's, and Ingraph work stations. From the KSC Headquarters communication requirement, it would be necessary to develop the FDDI network based on IEEE Standards outlined in the ANSI X3T9.5, Standard 802.3 and 802.5 topology - direct link via intermediate concentrator and bridge/router access. This analysis should examine the major factors that influence the operating conditions of the Headquarters Fiber plant. These factors would include, but are not limited to the interconnecting devices such as repeaters, bridges, routers and many other relevant or significant FDDI characteristics. This analysis is needed to gain a better understanding of overall FDDI performance.
Lightweight and tough engineered materials are often designed with three-dimensional hierarchy and interconnected structural members whose junctions are detrimental to their performance because they serve as stress concentrations for damage accumulation and lower mechanical resilience. We introduce a previously unexplored class of architected materials, whose components are interwoven and contain no junctions, and incorporate micro-knots as building blocks within these hierarchical networks. Tensile experiments, which show close quantitative agreements with an analytical model for overhand knots, reveal that knot topology allows a new regime of deformation capable of shape retention, leading to a ~92% increase in absorbed energy and an up to ~107% increase in failure strain compared to woven structures, along with an up to ~11% increase in specific energy density compared to topologically similar monolithic lattices. Our exploration unlocks knotting and frictional contact to create highly extensible low-density materials with tunable shape reconfiguration and energy absorption capabilities.
Reliability is a serious concern for future extreme-scale high-performance computing (HPC) systems. Projections based on the current generation of HPC systems and technology roadmaps suggest the prevalence of very high fault rates in future systems. The errors resulting from these faults will propagate and generate various kinds of failures, which may result in outcomes ranging from result corruptions to catastrophic application crashes. Therefore, the resilience challenge for extreme-scale HPC systems requires coordination between various hardware and software technologies that are capable of handling a broad set of fault models at accelerated fault rates. Also, due to practical limits on power consumption in future HPC systems, they are likely to embrace innovative architectures, increasing the levels of hardware and software complexities. Therefore, the techniques that seek to improve resilience must navigate the complex trade-off space between resilience and the overheads to power consumption and performance. While the HPC community has developed various resilience solutions, application-level techniques as well as system-based solutions, the solution space of HPC resilience techniques remains fragmented. There are no formal methods to integrate the various HPC resilience techniques into composite solutions, nor are there methods to holistically evaluate the adequacy and efficacy of such solutions in terms of their protection coverage, and their performance & power efficiency characteristics. Additionally, few implementations of current resilience solutions are portable to newer architectures and software environments that will be deployed on future systems. We developed a new structured approach to the management of HPC resilience using the concept of resilience-based design patterns. In general, a design pattern is a repeatable solution to a commonly occurring problem. We identified the well-known solutions that are commonly used to deal with faults, errors and failures in HPC systems. In the initial design patterns specification (version 1.0), we described the various solutions, which address specific problems in the design of resilient HPC environments, in the form of patterns. Each pattern describes a problem caused by a fault, error or failure event in an HPC environment, and then describes the core of the solution of the problem in such a way that this solution may be adapted to different systems and implemented at different layers of the system stack. The catalog of these resilience design patterns provides designers with a collection of design elements. To construct complete resilience solutions using combinations of various patterns, we defined a framework that enhances HPC designers' understanding of the important constraints and the opportunities for the design patterns to be implemented and deployed at various layers of the system stack. The design framework is also useful for establishing interfaces and mechanisms to coordinate flexible fault management across hardware and software components, as well as to consider the trade-off between performance, resilience, and power consumption when constructing a solution. The resilience design patterns specification version 1.1 included more detailed explanations of the pattern solutions, the context in which the patterns are applicable, and the implications for hardware or software design. It also provided several additional examples and detailed case studies to demonstrate the use of patterns to build realistic solutions. In version 1.2 of the specification document, we have improved the pattern descriptions, including graphical representations of the pattern components. These improvements are largely based on critical comments, feedback and suggestions received from pattern experts and readers of the previous versions of the specification. The pattern classification has been modified to further clarify the relationships between pattern categories. This version of the specification also introduces a pattern language for resilience design patterns. The pattern language presents the patterns in the catalog as a network, revealing the relations among the resilience patterns. The language provides designers with the means to explore alternative techniques for handling a specific fault model that may have different efficiency and complexity characteristics. Using the pattern language also enables the design and implementation of comprehensive resilience solutions as a set of interconnected resilience patterns that can be instantiated across layers of the system stack. The overall goal of this work is to provide hardware and software designers, as well as the users and operators of HPC systems, a systematic methodology for the design and evaluation of resilience technologies in HPC systems that keep scientific applications running to a correct solution in a timely and cost-efficient manner despite frequent faults, errors, and failures of various types. Version 2.0 expands the resilience design pattern classification and catalog to include self-stabilization patterns and reliability, availability and performance models for each structural pattern.
The share of renewable and distributed energy resources (DERs), like wind turbines, solar photovoltaics and grid-connected batteries, interconnected to the electric grid is rapidly increasing due to reduced costs, rising efficiency, and regulatory requirements aimed at incentivizing a lower-carbon electricity system. These distributed energy resources differ from traditional generation in many ways including the use of many smaller devices connected primarily (but not exclusively) to the distribution network, rather than few larger devices connected to the transmission network. DERs being installed today often include modern communication hardware like cellular modems and WiFi connectivity and, in addition, the inverters used to connect these resources to the grid are gaining increasingly complex capabilities, like providing voltage and frequency support or supporting microgrids. To perform these new functions safely, communications to the device and more complex controls are required. The distributed nature of DER devices combined with their network connectivity and complex controls interfaces present a larger potential attack surface for adversaries looking to create instability in power systems. To address this area of concern, the steps of a cyberattack on DERs have been studied, including the security of industrial protocols, the misuse of the DER interface, and the physical impacts. These different steps have not previously been tied together in practice and not specifically studied for grid-connected storage devices. In this work, we focus on grid-connected batteries. We explore the potential impacts of a cyberattack on a battery to power system stability, to the battery hardware, and on economics for various stakeholders. We then use real hardware to demonstrate end-to-end attack paths exist when security features are disabled or misconfigured. Our experimental focus is on control interface security and protocol security, with the initial assumption that an adversary has gained access to the network to which the device is connected. We provide real examples of the effectiveness of certain defenses. This work can be used to help utilities and other grid-connected battery owners and operators evaluate the severity of different threats and the effectiveness of defense strategies so they can effectively deploy and protect grid-connected storage devices.
Electricity grids are challenged to maintain reliability during more intense and frequent extreme weather events due to climate change. This challenge is exacerbated by multi-sector electrification and power sector decarbonization through increased reliance on variable renewable energy, which necessitates the expansion of transmission infrastructure. However, transmission expansion planning is often complicated by intertwined planning authorities and jurisdictions, and allocation of large capital investment needs. These factors cause authorities to manage transmission investments individually (i.e., only/mostly intraregional planning), which can lead to suboptimal transmission networks. This study investigates the potential benefits of cooperative transmission expansion planning (i.e., both intraregional and interregional planning that optimizes transmission investments across the entire physical system). Using sectoral and economic optimization, and machine learning models, it analyzes the impact of different levels of cooperation among transmission planning regions within U.S. Western Interconnection in 2019 and 2059 via an iterative investment process. Furthermore, it examines the effects of future climate change on transmission cooperation by simulating historical heat waves from 2019 under conditions of 2059. The results indicate that cooperative transmission planning leads to lower wholesale electricity prices, decreased energy outages, and reduced greenhouse gas emissions. However, the advantages of collaboration diminish during widespread heat waves, despite remaining beneficial especially for regions like California Independent System Operator with substantial solar installations. The study underscores the importance of transmission cooperation in reducing costs and enhancing reliability, emphasizing the need for strategic investments in storage to address challenges posed by future extreme weather events with varying spatial scales.
The National Aeronautics and Space Administration’s (NASA) Laser Communications Relay Demonstration (LCRD) completed the first 18 months of its Experiment Program in December 2023. The LCRD geosynchronous payload includes two laser communications terminals interconnected via an onboard electronic switch. The payload can relay information between any two of a set of three ground stations. Two optical ground stations are located in California and Hawaii, and an RF ground station is located in New Mexico. Experiments to date have included demonstration of optimetrics, demonstrations of Delay/Disruption Tolerant Networking (DTN), and measurements of the effects of the atmosphere (turbulence, weather) on the performance and availability of lasercom (pointing, tracking, communications, and adaptive optics). Furthermore, future operational scenarios including robotic and exploration missions with various network service configurations have been emulated. This paper provides an overview and highlights of the first 18 months of LCRD experiments, and a preview of the upcoming experiments, including relaying data to and from the Integrated LCRD Low-Earth Orbit (LEO) User Modem and Amplifier Terminal (ILLUMA-T) on the International Space Station. LCRD is a joint project involving NASA Goddard Space Flight Center (GSFC), the California Institute of Technology Jet Propulsion Laboratory (JPL), and Massachusetts Institute of Technology Lincoln Laboratory (MIT LL).
The investigation of how climate change and water level fluctuations impact variable and interconnected ecosystems, like the interfaces between terrestrial and aquatic environments, requires the collection and integration of many data types. We describe an integrative and autonomous environmental monitoring approach that uses environmental sensors and data loggers to monitor surface water, groundwater, soil, and vegetation changes and generate essential data for predictive models. We established the network at seven sites along the Chesapeake Bay and Lake Erie coastlines, including a large-scale flood manipulation experiment, collectively generating over three million observations per month. Such sensor networks hold great promise for tracking and comprehending environmental changes where land and water intersect. The sensor system and overall approach to sensor management that we have designed is intended to be widely accessible for research teams spanning in size from an individual investigator to large multi-institution projects. This dataset shows example data generated by the sensor network described above. Data output for data loggers connected to groundwater water quality sondes measuring dissolved oxygen, pH, oxidative redox potential (ORP), groundwater elevation, groundwater salinity and temperature, and groundwater elevation; replicate soil moisture and conductivity probes installed at 10 and 30 cm below the ground surface; rainfall and solar radiation; and mean sap flow from 8 replicate probes. Sensors are installed at upland forest (UP), wetlands (W), and transitional locations between these ecosystems (TR). Example datasets are from Goodwin Islands in the Chesapeake Bay and Portage River along the Lake Erie coastline.
This paper proposes a measurement-informed dynamic aggregation methodology in order to create equivalent representations of distribution systems that are compatible with large-scale transmission analysis. By optimizing an equivalent feeder parameters using time-series measurements of active power, reactive power, and voltage at the Point of Interconnection (POI), the approach yields simplified yet dynamically accurate equivalents. Implemented in PSCAD with models of photovoltaic–battery systems, three-phase motors, and static loads, the method employs hybrid differential evolution and bounded least-squares optimization laying the foundation for for real-time state estimation and optimized sensor placement in distribution networks.
As the DER penetration level has risen significantly in recent times, parameter settings and configuration of installed DERs are having direct impact on local electric distribution utilities as well as bulk power systems during normal and abnormal grid conditions. On the other hand, all grid-connected DERs in the United States of America must conform to the interconnection requirements prescribed in the IEEE Std 1547-2018. Because of these reasons, it is crucial to understand the expected DER performance during abnormal grid conditions considering the requirements of the IEEE Std 1547-2018. The aim of this document is twofold: (1) to summarize requirements in IEEE Std 1547-2018 having direct implications in distribution network protection, and (2) to provide the reader with knowledge and information that will be required for users to apply the requirements specified. Since the focus of this document is on distribution network protection in the presence of DERs, it is assumed that the readers have basic understanding of distribution network protection as well as working principles of DERs. This document starts with a brief introduction on protection systems for distribution network followed by a discussion on the impact of DER on the protection systems. Current practices to provide network protection in the presence of DER is briefly discussed. The document then explores the DER performance requirements in IEEE Std. 1547-2018; especially on those related to distribution network protection. Section 6.1 in IEEE Std. 1547-2018 provides an overview of capabilities and control requirements for DER under abnormal operating conditions. This section also introduces abnormal operating performance categories I, II, III. The DER response to various types of faults and grid conditions such as short-circuit faults and open phase conditions are discussed in section 6.2 in the standard while requirements for coordination with the Area EPS reclosing scheme are provided in section 6.3. Section 6.4 in the IEEE Std 1547-2018 specifies requirements for mandatory voltage tripping and ride-through requirements during low and high voltage disturbances and section 6.5 specifies similar requirements for low and high frequency disturbances. IEEE Std. 1547 requires that the conformance of the DERs to IEEE Std 1547-2018 requirements should be verified in accordance with IEEE Std. 1547. 1. There are several parameters and settings of DERs that need to be properly selected for reliable operation during abnormal grid condition while applying the requirements of IEEE Std 1547-2018. Key decisions for proper selections of parameter and settings are: 1. Determination of required DER abnormal operating performance category, 2. Determination of DER response (shall trip) to abnormal voltages and 3. Determination of DER response (shall trip) to abnormal frequency.
Mesoscale meteorological measurements, analysis and prediction are some of the principal areas of research in the Department of Meteorology at Penn State. In anticipation of a staged turn-on of the three systems during the Summer and Fall of 1984, the nonconstruction-related efforts have focused on the software development necessary to allow essentially immediate use of network data. A 16-bit microcomputer has been programmed to serve as the network controller, communications interface and, at least for real-time purposes, the operational display system. Insofar as possible we have in this task built upon our substantial accumulated experience in working with the processing and display of Doppler sodar system signals. Once the radar-derived wind and turbulence profiles are communicated to the various interconnected Departmental computers they become just one component of a comprehensive data base which can be applied to a diverse set of ongoing basic and operational research programs.