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At least 685 records · Page 38

Accurate Consensus-based Distributed Averaging with Variable Time Delay in Support of Distributed Secondary Control Algorithms

We report that distributed secondary control has been widely used in hierarchical control structures, where multiple distributed generators (DGs) need to coordinate to regulate system voltage and frequency. In these systems, consensus algorithms determine the average of a group of dynamic states (e.g. voltages measured by a group of DGs). To be useful, consensus algorithms must be computationally efficient, stable and accurate. In practice, numerous practical implementation challenges significantly affect the consensus equilibrium. In this paper, we quantify the accuracy deviations of the distributed average observer algorithms proposed in the literature to demonstrate the problems with the state-of-the-art distributed averaging techniques. A novel approach is proposed that achieves accurate average tracking in the presence of time-varying communication delays among agents. In our implementation, time synchronization of all distributed controllers is enabled by a novel software platform, called Resilient Information Architecture Platform for the Smart Grid (RIAPS). The proposed distributed average observer is implemented on hardware controllers and its effectiveness is validated in a controller hardware-in-the-loop testbed.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Real-Time Testbed for Smart Grid Recloser Controller

The growing need for a low voltage recloser has become apparent due to the rise in requirements for a smart grid. This includes more detailed management of power flow forward (towards load) and backward (towards generation), source synchronization in real time, more indepth fault responses, and the use of green energy. The SEL-651R-2 relay is a device that can manage these needs, especially in fault response and synchronization, and is commonly used in systems called microgrids. Microgrids are distribution level systems that are able to operate separated from the main grid, are typically installed much closer to the load(s), and are fed by distributed energy resources (DERs), such as wind, solar or diesel generators. The SEL-651R-2 is normally used in the field with presets operative settings, but the Western Michigan University (WMU) Center for Interdisciplinary Research on Secure, Efficient and Sustainable Energy Technology (WMU InterEnergy Center) wished to test this device in its range of capabilities for microgrid application. A Hardware-In-the-Loop (HIL) testbed was implemented and used through the Real Time Digital Simulator (RTDS) using the RSCAD software to test the SEL-651R-2's use cases and functions. The testbed includes a microgrid with interconnection to a larger main grid, and the relay is meant to control the recloser at the point of common coupling (PCC) between the main grid and microgrid. The testbed shows how basic protections, reclosing, and synchronization checks function when handling faults that affect both the microgrid and the main grid.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Towards Automatic and Agile AI/ML Accelerator Design with End-to-End Synthesis

Domain-specific designs offer greater energy efficiency and performance gain than general-purpose processors. For this reason, modern system-on-chips have a significant portion of their silicon area with custom accelerators. However, designing hardware by hand is laborious and time-consuming, given the large design space and the performance, power, and area constraints that are not realized in the software. Moreover, domain-specific algorithms (e.g., machine learning models) are evolving quickly, challenging the accelerator design further. To address these issues, this paper presents SODA Synthesizer, an automated open-source high-level ML framework to Verilog modular compiler targeting AI/ML Application-Specific Integrated Circuits (ASICs) accelerators. SODA tightly couples the Multi- Level Intermediate Representation (MLIR) compiler infrastructure [24] and open-source HLS approaches. Thus, SODA can support various ML frameworks and algorithms and can perform optimizations that combine specialized architecture templates and conventional HLS to generate the hardware modules. In addition, SODA’s closed-loop design space exploration (DSE) engine allows developers to perform end-to-end design space explorations on different metrics and technology nodes.

Zhang, Jeff↗

Particle-Tracking Proton Computed Tomography—Data Acquisition, Preprocessing, and Preconditioning

Proton CT (pCT) is a promising new imaging technique that can reconstruct relative stopping power (RSP) more accurately than x-ray CT in each cubic millimeter voxel of the patient. This, in turn, will result in better proton range accuracy and, therefore, smaller planned tumor volumes (PTV). The hardware description and some reconstructed images have previously been reported. In a series of two contributions, we focus on presenting the software algorithms that convert pCT detector data to the final reconstructed pCT images for application in proton treatment planning. There were several options on how to accomplish this, and we will describe our solutions at each stage of the data processing chain. In the first paper of this series, we present the data acquisition with the pCT tracking and energy-range detectors and how the data are preprocessed, including the conversion to the well-formatted track information from tracking data and water-equivalent path length from the data of a calibrated multi-stage energy-range detector. These preprocessed data are then used for the initial image formation with an FDK cone-beam CT algorithm. The output of data acquisition, preprocessing, and FDK reconstruction is presented along with illustrative imaging results for two phantoms, including a pediatric head phantom. The second paper in this series will demonstrate the use of iterative solvers in conjunction with the superiorization methodology to further improve the images resulting from the upfront FDK image reconstruction and the implementation of these algorithms on a hybrid CPU/GPU computer cluster.

42 ENGINEERING↗

Improving Thermal Management Strategies for Data Centers: A Physical Testbed Incorporating Small Modular Reactor and Microreactor Technology

This study aims to accelerate the demonstration of various thermal management systems for data centers using nuclear-generated heat to enhance energy and grid reliability. Utilizing mobile containerized and stationary test beds at INL's High Performance Computing (HPC) facility, this project integrates with various nuclear-related energy systems testing facilities. Key components include immersion cooling apparatus, absorption chillers, and adjustable thermal management simulators. Tasks involve acquiring necessary hardware, sensors, and cooling apparatus, engaging with data center industry stakeholders, and providing a testing platform for algorithms, models, tools, and software. The objective is to expedite the deployment of nuclear-powered data centers, thereby improving energy reliability and affordability.

21 - SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLAN↗

Enabling a Physical Twin for Control Methods Evaluation

Advanced nuclear reactors play an important role in the energy future of the United States and the rest of the world. They are designed and operated based on a different model than that of the current operating fleet, thus enabling deployment in remote locations and allowing for safe semi-autonomous or autonomous operations. Such characteristics require the development of a new reactor control paradigm. A significant factor in the development of control technologies and methods is integration of the various technologies and methods with each other and with hardware (both reactor system hardware and control hardware). A recent workshop on control of advanced reactors identified the lack of a flexible, expandable software/hardware infrastructure to enable such integration as a key gap. A previous phase of the current effort involved developing and demonstrating the Control and Optimization Modular Modeling Application for Nuclear Deployment (COMMAND) platform, which is capable of integrating autonomous-control-enabling technologies and methods, without the constraints imposed by existing software solutions. This platform will enable advanced reactor developers to deploy and test any developed technologies and methods by employing a common framework, and to couple them with their own models and hardware. The present phase of this effort entails using the Microreactor Automated Control System (MACS) platform, which was developed by the U.S. Department of Energy (DOE) Microreactor Program, to serve as a control method testbed. MACS can be used by advanced reactor developers to integrate their control related research activities with any reactor system. For the present effort, MACS was customized to mirror Idaho National Laboratory (INL)’s Microreactor Applications Research Validation and Evaluation (MARVEL) microreactor, and COMMAND was leveraged to enable MACS to emulate the physics of MARVEL, thus positioning MACS as a physical twin of MARVEL.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

ZFP Hardware Implementation

As core counts increase in new HPC systems with comparatively little increase in memory bandwidth, the trend is an effective decrease in memory bandwidth per core. Other bandwidth limitations in HPC systems exist between CPU and GPU memory, between system nodes, and between node memory and storage. Compression of floating-point data has the potential to reduce data movement and pressure across these communication channels. Furthermore, it has the potential to reduce the footprint of floating-point arrays stored in memory. ZFP, implemented in software, is gaining traction as an effective method in floating-point compression; however, performance gains are limited to the spare compute cycles available before reaching the bandwidth limitations of the communication channel. A hardware implementation of ZFP has the potential to raise the bar on performance. From the inception of ZFP, it was designed to accommodate a hardware implementation.

42 ENGINEERING↗

End-to-End Workflow for Machine-Learning-Based Qubit Readout With QICK and hls4ml

In this article, we present an end-to-end workflow for superconducting qubit readout that embeds codesigned neural networks into the quantum instrumentation control kit (QICK). Capitalizing on the custom firmware and software of the QICK platform, which is built on Xilinx radiofrequency system-on-chip field-programmable gate arrays (FPGAs), we aim to leverage machine learning (ML) to address critical challenges in qubit readout accuracy and scalability. The workflow utilizes the hls4ml package and employs quantization-aware training to translate ML models into hardware-efficient FPGA implementations via user-friendly Python application programming interfaces. We experimentally demonstrate the design, optimization, and integration of an ML algorithm for single transmon qubit readout, achieving 96% single-shot fidelity with a latency of 32.25 ns and less than 16% FPGA lookup table resource utilization. Our results offer the community an accessible workflow to advance ML-driven readout and adaptive control in quantum information processing applications.

42 ENGINEERING↗

hPIC2: A hardware-accelerated, hybrid particle-in-cell code for dynamic plasma-material interactions

The exascale era of high performance computing promises to bring the field of computational plasma physics ever closer to the goal of accurate multiscale modeling. Such computers will rely on hardware acceleration to offload work to dedicated components, notably general-purpose graphics processing units (GPUs). However, devices from different manufacturers require software to be written with different parallel programming models, greatly increasing the code maintenance burden of applications designed to perform on more than one such device. hPIC2 is a hybrid plasma simulation code developed with the Kokkos performance portability framework to target the architectures that will drive exascale computing for the foreseeable future. As a hybrid simulation code, hPIC2 investigates the simultaneous use of various plasma models on the same domain, at the same time. hPIC2 also optionally couples to RustBCA, which accurately models ion-material interactions using the binary collision approximation (BCA) method. In conclusion, hPIC2 therefore achieves scalable performance on a variety of computing architectures when simulating complex and diverse plasmas, particularly near plasma-material interfaces.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

Assembly and Analysis of Cell-Scale Membrane Envelopes

The march toward exascale computing will enable routine molecular simulation of larger and more complex systems, for example, simulation of entire viral particles, on the scale of approximately billions of atoms-a simulation size commensurate with a small bacterial cell. Anticipating the future hardware capabilities that will enable this type of research and paralleling advances in experimental structural biology, efforts are currently underway to develop software tools, procedures, and workflows for constructing cell-scale structures. Herein, we describe our efforts in developing and implementing an efficient and robust workflow for construction of cell-scale membrane envelopes and embedding membrane proteins into them. A new approach for construction of massive membrane structures that are stable during the simulations is built on implementing a subtractive assembly technique coupled with the development of a structure concatenation tool (fastmerge), which eliminates overlapping elements based on volumetric criteria rather than adding successive molecules to the simulation system. Using this approach, we have constructed two "protocells" consisting of MARTINI coarse-grained beads to represent cellular membranes, one the size of a cellular organelle and another the size of a small bacterial cell. The membrane envelopes constructed here remain whole during the molecular dynamics simulations performed and exhibit water flux only through specific proteins, demonstrating the success of our methodology in creating tight cell-like membrane compartments. Extended simulations of these cell-scale structures highlight the propensity for nonspecific interactions between adjacent membrane proteins leading to the formation of protein microclusters on the cell surface, an insight uniquely enabled by the scale of the simulations. We anticipate that the experiences and best practices presented here will form the basis for the next generation of cell-scale models, which will begin to address the addition of soluble proteins, nucleic acids, and small molecules essential to the function of a cell.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Characterizing Output Bottlenecks of a Production Supercomputer: Analysis and Implications

This article studies the I/O write behaviors of the Titan supercomputer and its Lustre parallel file stores under production load. The results can inform the design, deployment, and configuration of file systems along with the design of I/O software in the application, operating system, and adaptive I/O libraries.We propose a statistical benchmarking methodology to measure write performance across I/O configurations, hardware settings, and system conditions. Moreover, we introduce two relative measures to quantify the write-performance behaviors of hardware components under production load. In addition to designing experiments and benchmarking on Titan, we verify the experimental results on one real application and one real application I/O kernel, XGC and HACC IO, respectively. These two are representative and widely used to address the typical I/O behaviors of applications.In summary, we find that Titan’s I/O system is variable across the machine at fine time scales. This variability has two major implications. First, stragglers lessen the benefit of coupled I/O parallelism (striping). Peak median output bandwidths are obtained with parallel writes to many independent files, with no striping or write sharing of files across clients (compute nodes). I/O parallelism is most effective when the application—or its I/O libraries—distributes the I/O load so that each target stores files for multiple clients and each client writes files on multiple targets in a balanced way with minimal contention. Second, our results suggest that the potential benefit of dynamic adaptation is limited. In particular, it is not fruitful to attempt to identify “good locations” in the machine or in the file system: component performance is driven by transient load conditions and past performance is not a useful predictor of future performance. For example, we do not observe diurnal load patterns that are predictable.

97 MATHEMATICS AND COMPUTING↗

SwitchX : Gmin-Gmax Switching for Energy-efficient and Robust Implementation of Binarized Neural Networks on ReRAM Xbars

Memristive crossbars can efficiently implement Binarized Neural Networks (BNNs) wherein the weights are stored in high-resistance states (HRS) and low-resistance states (LRS) of the synapses. We propose SwitchX mapping of BNN weights onto ReRAM crossbars such that the impact of crossbar non-idealities, that lead to degradation in computational accuracy, are minimized. Essentially, SwitchX maps the binary weights in such a manner that a crossbar instance comprises of more HRS than LRS synapses. We find BNNs mapped onto crossbars with SwitchX to exhibit better robustness against adversarial attacks than the standard crossbar mapped BNNs, the baseline. Finally, we combine SwitchX with state-aware training (that further increases the feasibility of HRS states during weight mapping) to boost the robustness of a BNN on hardware. We find that this approach yields stronger defense against adversarial attacks than adversarial training, a state-of the-art software defense. We perform experiments on a VGG16 BNN with benchmark datasets (CIFAR-10, CIFAR-100 and TinyImagenet) and use Fast Gradient Sign Method (ϵ = 0.05 to 0.3) and Projected Gradient Descent (ϵ = $\frac{2}{255}$ to $\frac{32}{255}$, α = $\frac{2}{255}$) adversarial attacks. We show that SwitchX combined with state-aware training can yield upto ~35% improvements in clean accuracy and ~6–16% in adversarial accuracies against conventional BNNs. Furthermore, an important by-product of SwitchX mapping is increased crossbar power savings, owing to an increased proportion of HRS synapses, which is furthered with state-aware training. We obtain upto ~21–22% savings in crossbar power consumption for state-aware trained BNN mapped via SwitchX on 16 × 16 and 32 × 32 crossbars using the CIFAR-10 and CIFAR-100 datasets.

97 MATHEMATICS AND COMPUTING↗

Phasor Based Control with the Distributed, Extensible Grid Control Platform

This paper describes how to implement Phasor Based Control (PBC) using the Distributed, Extensible Grid Control (DEGC) Platform. PBC is a novel method for controlling distributed energy resources (DER) that coordinates a centralized optimization with distributed feedback controllers to enforce voltage phasor targets. DEGC is an open source software and communication platform designed for general DER control. We deployed PBC at Lawrence Berkeley Lab's FLEXLAB test site, conducting multiple hardware-in-the-loop test runs. Here, we describe how DEGC was used to implement PBC on hardware, and results demonstrating successful deployment.

24 POWER TRANSMISSION AND DISTRIBUTION↗

IEEE 1547-2018 Based Interoperable PV Inverter with Advanced Grid-Support Functions

Grid integration of photovoltaic (PV) inverters has been increasing in the past decade. As a result of the uncertainties introduced with high penetrations of PV, better monitoring and control of the PV inverters becomes crucial for improving overall system stability. This paper focuses on the communications capability of the inverter controller and on enabling interoperability. Multiple standards are available to enable interoperability in PV inverters. In this paper, an interoperable controller, enabled by Distributed Network Protocol 3 (DNP3) communications protocols, is developed for a grid-connected, three-phase PV inverter. The DNP3 server for the PV inverter is programmed on the real-time layer of the field-programmable gate array (FPGA)-based inverter controller. Set points for advanced inverter control functions, such as volt/VAr curves, ride-through curves, are sent from a DNP3 client, a simulated distribution management system application, to the PV inverter through DNP3. This communications capability of the inverter controller is validated using a controller-hardware-in-the-loop experimental setup. The code developed to achieve the interoperability is available in the public domain through open-source software licensing. This interoperability will enable smoother grid integration of smart PV inverters with advanced grid-support functions as well as allow better monitoring and control of PV inverters for grid stability.

14 SOLAR ENERGY↗

Analysis of Threading Libraries for High Performance Computing

With the appearance of multi-/many core machines, applications and runtime systems have evolved in order to exploit the new on-node concurrency brought by new software paradigms. POSIX threads (Pthreads) was widely-adopted for that purpose and it remains as the most used threading solution in current hardware. Lightweight thread (LWT) libraries emerged as an alternative offering lighter mechanisms to tackle the massive concurrency of current hardware. In this article, we analyze in detail the most representative threading libraries including Pthread- and LWT-based solutions. In addition, to examine the suitability of LWTs for different use cases, we develop a set of microbenchmarks consisting of OpenMP patterns commonly found in current parallel codes, and we compare the results using threading libraries and OpenMP implementations. Moreover, we study the semantics offered by threading libraries in order to expose the similarities among different LWT application programming interfaces and their advantages over Pthreads. This article exposes that LWT libraries outperform solutions based on operating system threads when tasks and nested parallelism are required.

GLT↗

Optimization and Portability of a Fusion OpenACC-based FORTRAN HPC Code from NVIDIA to AMD GPUs

NVIDIA has been the main provider of GPU hardware in HPC systems for over a decade. Most applications that benefit from GPUs have thus been developed and optimized for the NVIDIA software stack. Recent exascale HPC systems are, however, introducing GPUs from other vendors, e.g. with the AMD GPU-based OLCF Frontier system just becoming available. AMD GPUs cannot be directly accessed using the NVIDIA software stack, and require a porting effort by the application developers. This paper provides an overview of our experience porting and optimizing the CGYRO code, a widely-used fusion simulation tool based on FORTRAN with OpenACC-based GPU acceleration. While the porting from the NVIDIA compilers was relatively straightforward using the CRAY compilers on the AMD systems, the performance optimization required more fine-tuning. In the optimization effort, we uncovered code sections that had performed well on NVIDIA GPUs, but were unexpectedly slow on AMD GPUs. After AMD-targeted code optimizations, performance on AMD GPUs has increased to meet our expectations. Modest speed improvements were also seen on NVIDIA GPUs, which was an unexpected benefit of this exercise.

Sfiligoi, Igor↗

Future Vision for Autonomous Ocean Observations

Autonomous platforms already make observations over a wide range of temporal and spatial scales, measuring salinity, temperature, nitrate, pressure, oxygen, biomass; and many other parameters. However, the observations are not comprehensive. Future autonomous systems need to be more affordable, more modular, more capable and easier to operate. Creative new types of platforms and new compact, low power, calibrated and stable sensors are under development to expand autonomous observations. Communications and recharging need bandwidth and power which can be supplied by standardized docking stations. In situ power generation will also extend endurance for many types of autonomous platforms, particularly autonomous surface vehicles. Standardized communications will improve ease of use, interoperability, and enable coordinated behaviors. Improved autonomy and communications will enable adaptive networks of autonomous platforms. Improvements in autonomy will have three aspects: hardware, control, and operations. As sensors and platforms have more onboard processing capability and energy capacity, more measurements become possible. Control systems and software will have the capability to address more complex states and sophisticated reactions to sensor inputs, which allows the platform to handle a wider variety of circumstances without direct operator control. Operational autonomy is increased by reducing operating costs. To maximize the potential of autonomous observations new standards and best practices are needed. In some applications, focus on common platforms and volume purchases could lead to significant cost reductions. Cost reductions could enable order-of-magnitude increases in platform operations and increase sampling resolution for a given level of investment. Energy harvesting technologies should be integral to the system design, for sensors, platforms, vehicles, and docking stations. Connections are needed between the marine energy and ocean observing communities to coordinate among funding sources, researchers, and end users. Regional teams should work with global organizations such as IOC/GOOS in governance development. International networks such as EGO for the emerging glider operations should also provide a forum for addressing governance. Networks of multiple vehicles can improve operational efficiencies and transform operational patterns. There is a need to develop operational architectures at regional and global scales to provide a backbone for active networking of autonomous platforms.

47 OTHER INSTRUMENTATION↗

Design-Technology Co-Optimization for NVM-based Neuromorphic Processing Elements

An emerging use-case of machine learning (ML) is to train a model on a high-performance system and deploy the trained model on energy-constrained embedded systems. Neuromorphic hardware platforms, which operate on principles of the biological brain, can significantly lower the energy overhead of a machine learning inference task, making these platforms an attractive solution for embedded ML systems. In this paper, we present a design-technology tradeoff analysis to implement such inference tasks on the processing elements (PEs) of a Non-Volatile Memory (NVM)-based neuromorphic hardware. Through detailed circuit-level simulations at scaled process technology nodes, we show the negative impact of technology scaling on the information-processing latency, which impacts the quality-of-service (QoS) of an embedded ML system. At a finer granularity, the latency inside a PE depends on 1) the delay introduced by parasitic components on its current paths, and 2) the varying delay to sense different resistance states of its NVM cells. Based on these two observations, we make the following three contributions. First, on the technology front, we propose an optimization scheme where the NVM resistance state that takes the longest time to sense is set on current paths having the least delay, and vice versa, reducing the average PE latency, which improves the QoS. Second, on the architecture front, we introduce isolation transistors within each PE to partition it into regions that can be individually power-gated, reducing both latency and energy. Finally, on the system-software front, we propose a mechanism to leverage the proposed technological and architectural enhancements when implementing a machine-learning inference task on neuromorphic PEs of the hardware. Evaluations with a recent neuromorphic hardware architecture show that our proposed design-technology co-optimization approach improves both performance and energy efficiency of machine-learning inference tasks without incurring high cost-per-bit.

42 ENGINEERING↗