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At least 685 records · Page 38
All sourcesNASA NTRSDOE OSTI
NASA NTRS2002

Low-Loss, High-Isolation Microwave Microelectromechanical Systems (MEMS) Switches Being Developed

Switches, electrical components that either permit or prevent the flow of electricity, are the most important and widely used electrical devices in integrated circuits. In microwave systems, switches are required for switching between the transmitter and receiver; in communication systems, they are needed for phase shifters in phased-array antennas, for radar and communication systems, and for the new class of digital or software definable radios. Ideally, switches would be lossless devices that did not depend on the electrical signal's frequency or power, and they would not consume electrical power to change from OFF to ON or to maintain one of these two states. Reality is quite different, especially at microwave frequencies. Typical switches in microwave integrated circuits are pin diodes or gallium arsenide (GaAs) field-effect transistors that are nonlinear, with characteristics that depend on the power of the signal. In addition, they are frequency-dependent, lossy, and require electrical power to maintain a certain state. A new type of component has been developed that overcomes most of these technical difficulties. Microelectromechanical (MEMS) switches rely on mechanical movement as a response to an applied electrical force to either transmit or reflect electrical signal power. The NASA Glenn Research Center has been actively developing MEMS for microwave applications for over the last 5 years. Complete fabrication procedures have been developed so that the moving parts of the switch can be released with near 100-percent yield. Moreover, the switches fabricated at Glenn have demonstrated state-of-the-art performance. A typical MEMS switch is shown. The switch extends over the signal and ground lines of a finite ground coplanar waveguide, a commonly used microwave transmission line. In the state shown, the switch is in the UP state and all the microwave power traveling along the transmission line proceeds unimpeded. When a potential difference is applied between the cantilever and the transmission line, the cantilever is pulled downward until it connects the signal line to the ground planes, creating a short circuit. In this state, all the microwave power is reflected. The graph shows the measured performance of the switch, which has less than 0.1 dB of insertion loss and greater than 30dB of isolation. These switches consume negligible electrical power and are extremely linear. Additional research is required to address reliability and to increase the switching speed.

Ponchak, George E.↗
NASA NTRS2000

Radio Frequency (RF) Micro-Electromechanical Systems (MEMS) Switches for Space Communications

Micro-electromechanical systems (MEMS) is an emerging technology for radio frequency (RF) systems because it has the potential to dramatically decrease loss and improve efficiency. In this paper, we address the design and fabrication of novel MEMS switches being developed at NASA Glenn Research Center. Two types of switches are being developed: a microstrip series single pole single throw (SPST) switch and a coplanar waveguide (CPW) series SPST and single pole double throw (SPDT) switches. These are being fabricated as an integral part of 50 Ohm microstrip and CPW RF integrated circuits using microfabrication techniques. The construction of the switch relies on a cantilever beam that is partially supported by a dielectric post. The cantilever beam is electro-magnetically actuated. To decrease stiction, a Si3N4 thin film is deposited over the contact area. Thus, when the switch is closed, the ON-state insertion loss is governed by the parallel plate capacitance formed by the two contacts. The isolation in the OFF-state is governed by the parasitic capacitance when the cantilever is in the up position. RF MEMS switches have been demonstrated with 80% lower insertion loss than conventional solid state devices (GaAs Metal Semiconductor Field Effect Transistors (MESFETs) and Silicon PIN diodes) based switches. For example, a conventional GaAs five-bit phase shifter which is required for beam steering in a phased array antenna has approximately 7 dB of insertion loss at 26.5 GHz where as a comparable MEMS based phase shifter is expected to have only 2 dB of insertion loss. This translates into 56% lower power dissipation and therefore decreases the thermal load on the spacecraft and also reduces the power amplifier requirements. These benefits will enable NASA to build the next generation of deep space science crafts and micro/nano satellites.

Simons, Rainee N.↗
NASA NTRS2003

Power Electronics Being Developed for Deep Space Cryogenic Applications

Electronic circuits and systems designed for deep space missions need to operate reliably and efficiently in harsh environments that include very low temperatures. Spacecraft that operate in such cold environments carry a large number of heaters so that the ambient temperature for the onboard electronics remains near 20 C. Electronics that can operate at cryogenic temperatures will simplify system design and reduce system size and weight by eliminating the heaters and their associated structures. As a result, system development and launch cost will be reduced. At the NASA Glenn Research Center, an ongoing program is focusing on the development of power electronics geared for deep space low-temperature environments. The research and development efforts include electrical components design, circuit design and construction, and system integration and demonstration at cryogenic temperatures. Investigations are being carried out on circuits and systems that are targeted for use in NASA missions where low temperatures will be encountered: devices such as ceramic and tantalum capacitors, metal film resistors, semiconductor switches, magnetics, and integrated circuits including dc/dc converters, operational amplifiers, voltage references, and motor controllers. Test activities cover a wide range of device and circuit performance under simple as well as complex test conditions, such as multistress and thermal cycling. The effect of low-temperature conditions on the switching characteristics of an advanced silicon-on-insulator field effect transistor is shown. For gate voltages (VGS) below 2.6 V, drain currents at -190 C are lower than drain currents at room temperature (20 C).

Patterson, Richard L.↗
NASA NTRS1999

Excitation Spectroscopy as a Tool of Microelectronics Reliability

The main objective of this task was to experimentally determine the feasibility of using a non-contact IR emission spectroscopy technique to measure the hot spot channel temperature of sub-micron GaAs metal semiconductor field effect transistor gate during operation.

Excitation Spectroscopy Microspot Temperature Asse↗
NASA NTRS2000

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Fossum, Eric R.↗
NASA NTRS1995

Active pixel sensor with intra-pixel charge transfer

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Fossum, Eric R.↗
NASA NTRS2005

High-efficiency solid state power amplifier

A high-efficiency solid state power amplifier (SSPA) for specific use in a spacecraft is provided. The SSPA has a mass of less than 850 g and includes two different X-band power amplifier sections, i.e., a lumped power amplifier with a single 11-W output and a distributed power amplifier with eight 2.75-W outputs. These two amplifier sections provide output power that is scalable from 11 to 15 watts without major design changes. Five different hybrid microcircuits, including high-efficiency Heterostructure Field Effect Transistor (HFET) amplifiers and Monolithic Microwave Integrated Circuit (MMIC) phase shifters have been developed for use within the SSPA. A highly efficient packaging approach enables the integration of a large number of hybrid circuits into the SSPA.

Wallis, Robert E.↗
NASA NTRS1983

FET commutated current-FED inverter

A shunt switch comprised of a field-effect transistor (Q.sub.1) is employed to commutate a current-fed inverter (10) using thyristors (SCR1, SCR2) or bijunction transistors (Q.sub.2, Q.sub.3) in a full bridge (1, 2, 3, 4) or half bridge (5, 6) and transformer (T.sub.1) configuration. In the case of thyristors, a tapped inverter (12) is employed to couple the inverter to a dc source to back bias the thyristors during commutation. Alternatively, a commutation power supply (20) may be employed for that purpse. Diodes (D.sub.1, D.sub.2) in series with some voltage dropping element (resistor R.sub.12 or resistors R.sub.1, R.sub.2 or Zener diodes D.sub.4, D.sub.5) are connected in parallel with the thyristors in the half bridge and transformer configuration to assure sharing the back bias voltage. A clamp circuit comprised of a winding (18) negatively coupled to the inductor and a diode (D.sub.3) return stored energy from the inductor to the power supply for efficient operation with buck or boost mode.

Rippel, Wally E.↗
NASA NTRS2003

Active pixel sensor with intra-pixel charge transfer

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Fossum, Eric R.↗
NASA NTRS2004

Active pixel sensor with intra-pixel charge transfer

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Fossum, Eric R.↗
NASA NTRS2003

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Fossum, Eric R.↗
NASA NTRS2006

Method of acquiring an image from an optical structure having pixels with dedicated readout circuits

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Fossum, Eric R.↗
NASA NTRS2007

Nonvolatile Analog Memory

A nonvolatile analog memory uses pairs of ferroelectric field effect transistors (FFETs). Each pair is defined by a first FFET and a second FFET. When an analog value is to be stored in one of the pairs, the first FFET has a saturation voltage applied thereto, and the second FFET has a storage voltage applied thereto that is indicative of the analog value. The saturation and storage voltages decay over time in accordance with a known decay function that is used to recover the original analog value when the pair of FFETs is read.

MacLeod, Todd C.↗
NASA NTRS1989

Thin film memory matrix using amorphous and high resistive layers

Memory cells in a matrix are provided by a thin film of amorphous semiconductor material overlayed by a thin film of resistive material. An array of parallel conductors on one side perpendicular to an array of parallel conductors on the other side enable the amorphous semiconductor material to be switched in addressed areas to be switched from a high resistance state to a low resistance state with a predetermined level of electrical energy applied through selected conductors, and thereafter to be read out with a lower level of electrical energy. Each cell may be fabricated in the channel of an MIS field-effect transistor with a separate common gate over each section to enable the memory matrix to be selectively blanked in sections during storing or reading out of data. This allows for time sharing of addressing circuitry for storing and reading out data in a synaptic network, which may be under control of a microprocessor.

Thakoor, Anilkumar P.↗
NASA NTRS2008

Vertical Isolation for Photodiodes in CMOS Imagers

In a proposed improvement in complementary metal oxide/semi conduct - or (CMOS) image detectors, two additional implants in each pixel would effect vertical isolation between the metal oxide/semiconductor field-effect transistors (MOSFETs) and the photodiode of the pixel. This improvement is expected to enable separate optimization of the designs of the photodiode and the MOSFETs so as to optimize their performances independently of each other. The purpose to be served by enabling this separate optimization is to eliminate or vastly reduce diffusion cross-talk, thereby increasing sensitivity, effective spatial resolution, and color fidelity while reducing noise.

Pain, Bedabrata↗