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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 667 records · Page 37
All sourcesNASA NTRSDOE OSTI
NASA NTRS1980

Modeling and Analysis of Power Processing Systems (MAPPS). Volume 1: Technical report

Computer aided design and analysis techniques were applied to power processing equipment. Topics covered include: (1) discrete time domain analysis of switching regulators for performance analysis; (2) design optimization of power converters using augmented Lagrangian penalty function technique; (3) investigation of current-injected multiloop controlled switching regulators; and (4) application of optimization for Navy VSTOL energy power system. The generation of the mathematical models and the development and application of computer aided design techniques to solve the different mathematical models are discussed. Recommendations are made for future work that would enhance the application of the computer aided design techniques for power processing systems.

Lee, F. C.↗
DOE OSTI2021

A High-Efficiency Isolated PFC AC-DC Topology with Reduced Number of Semiconductor Devices

A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum number of semiconductor devices is the focus of this paper. This topology provides a high input power factor (PF), soft-switching, and higher efficiency than existing isolated ac-dc converters. Furthermore, the proposed circuit has lower voltage rating requirements for the secondary side devices, which leads to a lower total cost and minimizes total converter losses. This article presents a theoretical analysis describing the complete characterization of this new topology, and experimental results on a 1-kW prototype showing high PF and efficiency throughout the operating range.

42 ENGINEERING↗
NASA NTRS1992

Description of the SSF PMAD DC testbed control system data acquisition function

The NASA LeRC in Cleveland, Ohio has completed the development and integration of a Power Management and Distribution (PMAD) DC Testbed. This testbed is a reduced scale representation of the end to end, sources to loads, Space Station Freedom Electrical Power System (SSF EPS). This unique facility is being used to demonstrate DC power generation and distribution, power management and control, and system operation techniques considered to be prime candidates for the Space Station Freedom. A key capability of the testbed is its ability to be configured to address system level issues in support of critical SSF program design milestones. Electrical power system control and operation issues like source control, source regulation, system fault protection, end-to-end system stability, health monitoring, resource allocation, and resource management are being evaluated in the testbed. The SSF EPS control functional allocation between on-board computers and ground based systems is evolving. Initially, ground based systems will perform the bulk of power system control and operation. The EPS control system is required to continuously monitor and determine the current state of the power system. The DC Testbed Control System consists of standard controllers arranged in a hierarchical and distributed architecture. These controllers provide all the monitoring and control functions for the DC Testbed Electrical Power System. Higher level controllers include the Power Management Controller, Load Management Controller, Operator Interface System, and a network of computer systems that perform some of the SSF Ground based Control Center Operation. The lower level controllers include Main Bus Switch Controllers and Photovoltaic Controllers. Power system status information is periodically provided to the higher level controllers to perform system control and operation. The data acquisition function of the control system is distributed among the various levels of the hierarchy. Data requirements are dictated by the control system algorithms being implemented at each level. A functional description of the various levels of the testbed control system architecture, the data acquisition function, and the status of its implementationis presented.

Baez, Anastacio N.↗
NASA NTRS1973

ASDTIC control and standardized interface circuits applied to buck, parallel and buck-boost dc to dc power converters

Versatile standardized pulse modulation nondissipatively regulated control signal processing circuits were applied to three most commonly used dc to dc power converter configurations: (1) the series switching buck-regulator, (2) the pulse modulated parallel inverter, and (3) the buck-boost converter. The unique control concept and the commonality of control functions for all switching regulators have resulted in improved static and dynamic performance and control circuit standardization. New power-circuit technology was also applied to enhance reliability and to achieve optimum weight and efficiency.

Schoenfeld, A. D.↗
DOE OSTI2024

LENS: Learning Enabled Network Synthesis

RTRC and UMD have developed novel machine learning based methods under the ARPA-E DIFFERENTIATE program for rapid acceleration of hypothesis generation in complex architecture design spaces involving both discrete choices of component inclusion and interconnection and continuous parametric decisions. The project named Learning Enabled Network Synthesis (LENS) further demonstrated the developed methods on challenging electrical power converter design problems by identifying the most suitable circuit topologies and simultaneously selecting the most appropriate components to achieve optimized design of power converter with improved performances. We demonstrated that LENS could enable exploration of very large design space of circuit topologies and components by addressing the limitations of conventional design process in non-linear, high switching speed, multi-dimensional power converter design and optimization. The key innovation developed in LENS is the seamless integration of statistical learning and logical reasoning techniques and building on the individual strengths of these techniques for rapid hypothesis discovery. The main component of LENS comprises of: 1) Graph Reasoning Engine (GRE) to enforce composition rules that rapidly reject all discrete architectures that are composed incorrectly and generates an adaptive database of feasible designs which can be used by ML modules, 2) Graph Generative Learning module which is a deep neural network based generative model for graph architectures which can enable design space exploration beyond the dataset generated by the GRE, 3) Graph Reduced Order Model (ROM) for graph domains for accelerating computation of output metrics, and 4) Active learning and Rule Discovery module for sample efficient learning and extracting logical rules from the learned ML models which will be integrated in the GRE to enhance the filtering effectiveness. LENS approach can be applied to any design domains where designs can be represented as multi-attribute graphs. The LENS team integrated the various technical innovations listed above into an optimization pipeline and exercised the optimization pipeline on the converter design problem. The LENS project demonstrated that the developed AI/ML technologies can be used to generate novel converter circuits >45x faster than experts on chosen use-cases. This can enable faster design space exploration and identification of new designs which are not considered by experts due to the increasing design space complexity. This has significant potential impact on the public and energy needs of the country. It is currently estimated that 30% of all electrical powers generated passes through power converters. The future estimate is that 80% of all power generated would be passing through converters. LENS fills a critical gap in this space since by accelerating the design process the designers would be able to generate more efficient converters which can lead to significant energy savings for the country.

42 ENGINEERING↗
NASA NTRS2000

Highly Parallel Computing Architectures by using Arrays of Quantum-dot Cellular Automata (QCA): Opportunities, Challenges, and Recent Results

There has been significant improvement in the performance of VLSI devices, in terms of size, power consumption, and speed, in recent years and this trend may also continue for some near future. However, it is a well known fact that there are major obstacles, i.e., physical limitation of feature size reduction and ever increasing cost of foundry, that would prevent the long term continuation of this trend. This has motivated the exploration of some fundamentally new technologies that are not dependent on the conventional feature size approach. Such technologies are expected to enable scaling to continue to the ultimate level, i.e., molecular and atomistic size. Quantum computing, quantum dot-based computing, DNA based computing, biologically inspired computing, etc., are examples of such new technologies. In particular, quantum-dots based computing by using Quantum-dot Cellular Automata (QCA) has recently been intensely investigated as a promising new technology capable of offering significant improvement over conventional VLSI in terms of reduction of feature size (and hence increase in integration level), reduction of power consumption, and increase of switching speed. Quantum dot-based computing and memory in general and QCA specifically, are intriguing to NASA due to their high packing density (10(exp 11) - 10(exp 12) per square cm ) and low power consumption (no transfer of current) and potentially higher radiation tolerant. Under Revolutionary Computing Technology (RTC) Program at the NASA/JPL Center for Integrated Space Microelectronics (CISM), we have been investigating the potential applications of QCA for the space program. To this end, exploiting the intrinsic features of QCA, we have designed novel QCA-based circuits for co-planner (i.e., single layer) and compact implementation of a class of data permutation matrices, a class of interconnection networks, and a bit-serial processor. Building upon these circuits, we have developed novel algorithms and QCA-based architectures for highly parallel and systolic computation of signal/image processing applications, such as FFT and Wavelet and Wlash-Hadamard Transforms.

Fijany, Amir↗
NASA NTRS2007

High-Voltage Power Supply With Fast Rise and Fall Times

A special-purpose high-voltage power supply can be electronically switched on and off with fast rise and fall times, respectively. The output potential is programmable from 20 to 1,250 V. An output current of 50 A can be sustained at 1,250 V. The power supply was designed specifically for electronically shuttering a microchannel plate in an x-ray detector that must operate with exposure times as short as 1 ms. The basic design of the power supply is also adaptable to other applications in which there are requirements for rapid slewing of high voltages. The power-supply circuitry (see figure) includes a preregulator, which is used to program the output at 1/30 of the desired output potential. After the desired voltage has been set, the outputs of a pulse width modulator (PWM) are enabled and used to amplify the preregulator output potential by 30. The amplification is achieved by use of two voltage doublers with a transformer that has two primary and two secondary windings. A resistor is used to limit the current by controlling the drive voltage of two field-effect transistors (FETs) during turn-on of the PWM. A pulse transformer is used to turn on four FETs to short-circuit four output capacitors when the outputs of the PWM have been disabled. The most notable aspects of the performance of the power supply are a rise time of only 80 s and a fall time of only 60 s at a load current of 50 A or less. Another notable aspect is that the application of a 0-to-5-V square wave to a shutdown pin of the PWM causes the production of a 0-to-1,250-V square wave at the output terminals.

Bearden, Douglas B.↗
NASA NTRS1988

The role of power integrated circuits in lightweight spacecraft

This paper will present definitions for smart power and power integrated circuits and show how, for a typical planetary spacecraft power system, a 37 percent reduction in mass, 89 percent reduction in parts and a 50 percent reduction in volume can be attained. Also discussed are the technology needs for isolation, monolithic current sensing, and high efficiency switching necessary to enable monolithic power structures, as well as various applications of power integrated circuits. A specific example will verify the projected reductions expected when power integrated circuits are implemented in future spacecraft designs. In conclusion, power-integrated circuits can impact the overall design of the spacecraft in all subsystems, not just the power sybsystem.

Klein, John W.↗
DOE OSTI2022

The BREKTRIA 500 – A Breakthrough in Technology and Power Density for an Advanced 500kW Utility-Scale String Inverter (Final Technical Report)

The primary goal of this development project, planned to be 36 months in duration, was to create a 500kW utility-scale string inverter, demonstrating an advanced hybrid architecture that would achieve unprecedented high power density, and bring the inverter to the stage of production readiness. Specific key objectives for the 500kW utility-scale string inverter were: Create a 500kW 3-phase 600Vac inverter that was similar in overall size to the existing 250kW string inverters in the market, thereby demonstrating dramatically increased power density; Achieve a cost of goods, including all manufacturing-related costs and overheads, at or below 2.5¢/Wac ($12,500); Demonstrate full-power operation at a 45-50C ambient temperature with no power de-rating; Accommodate a PV array DC input of up to 1MWdc, aka a DC/AC Ratio of 2.0; Demonstrate peak efficiency greater than 99% at any operating dc voltage, and a CEC weighted average efficiency greater than or equal to 98.5%. The motivation for this project was to leapfrog the competition by creating the world’s most powerful string inverter, utilizing an innovative topology and achieving a step change increase in power density. Achieving the goals of the project would have enabled Yaskawa Solectria Solar to demonstrate its technology leadership, manufacture the utility-scale string inverter in the company’s facilities in Illinois, and bring to the market a highly-differentiated and compelling product to help the company grow its share in the large and growing utility market segment. During the course of this project, BREK Electronics’ hybrid architecture inverter was taken from an early-stage 125kW prototype, to a more mature and successfully demonstrated power stage at twice the power. Two 250kW power stages were planned to build the 500kW inverter. Significant progress was made in the inverter controls, achieving a clean AC sinewave and closed-loop operation into the grid, and improved efficiency by control of the high-speed switching. Further, the updated 250kW power stage was on track to achieve full power operation at an ambient temperature of 50C. At the time of the project’s closure in September 2022, global semiconductor supply remained limited, with shortages creating dramatic swings in both availability and price. Given this situation, our ability to predict cost-of-goods two years out with any accuracy or confidence was limited. As a result, the probability of attaining the target cost of 2.5¢/Wac for the 500kW inverter remained uncertain at the closure of the project. This project successfully demonstrated the potential for the advanced hybrid architecture inverter that emerged from a decade of university research on Si IGBTs and SiC mosfets, leading to this unique inverter topology. The team has taken the first steps toward an evolutionary advancement in inverter technology that remains to be fully realized.

14 SOLAR ENERGY↗
NASA NTRS1992

High repetition-rate Q-switched and intracavity doubled diode-pumped Nd:YAG laser

A Nd:YAG laser was end pumped with 2.2 W of continuous-wave (CW) diode laser output. Efficient operation of the laser at high repetition rates was emphasized. This laser provides 890 mW of TEM00 CW output at 1064 nm, and 340 mW of 532 nm average power at a Q-switched repetition rate of 25 kHz. Experimental data are compared with analysis.

Hemmati, Hamid↗
DOE OSTI2021

Soft-switching, high performance single-phase AC-DC converter

A soft-switching, high-performance single-phase alternating current (AC)-direct current (DC) converter is provided. The AC-DC converter described herein provides a new circuit topology for single-stage, single-phase or multi-phase AC-DC power conversion with power factor correction (PFC) and galvanic isolation using a high-frequency isolation transformer. The AC-DC converter improves power conversion efficiency and power density—two of the most important metrics for a power converter. It achieves soft switching for high frequency switches in the circuit, leading to higher efficiency and lower electromagnetic interference (EMI).

Ayyanar, Rajapandian↗
NASA NTRS2011

Qualification of emerging point-of-load regulators for next generation power systems

As demand for high-speed, on-board, digital-processing integrated circuits (ICs) on spacecraft increases (FPGAs and DSPs in particular), the need for the next generation point-of-load (POL) regulator becomes a prominent design issue. Shrinking process nodes have resulted in core rails dropping to values close to 1.0 V, drastically reducing margin to standard switching converters or regulators that power digital ICs. The objectives of this study are to first identify reliability issues or additional space reliability requirements that might not be addressed for commercial application of POL converters; second, to study the performances of existing or emerging POL converters (including linear regulators) within a practical two-stage power distribution architecture; and, finally, to identify points of failure at extreme temperatures (low and high) beyond specifications.

Leon, Rosa↗
NASA NTRS1975

Research study on multi-KW DC distribution system

Power distribution system noise and transient stress on switchgear in large space vehicle power systems were investigated in terms of the effect of flight designs of long power distribution cables on load interface EMI requirements. A fifty meter cable pair was simulated to study interactions between the cable, load, and power source terminations. Power system noise characteristics were evaluated based on current spacecraft data, interface hardware filter designs, and power cable parameters. Parametric approaches were defined for evaluating switching transients at various distribution voltage levels. It is concluded that the state-of-the-art semiconductor switches represent a viable approach toward the implementation of power system design with distribution voltages of 120 VDC or less. The interface definition and design for the bus control unit was updated to be consistent with the established requirements.

Berkery, E. A.↗
DOE OSTI2026

PowerMappeR: Power-Optimized Mapping of SNNs onto ReRAM Crossbars coupled via Packet-Switched NoCs

Many recent efforts in developing hardware-accelerated spiking neural networks (SNNs) are characterized by deep co-design between algorithms, architectures, and devices. Architectural advances overcome device constraints by coupling together many small resistive-RAM (ReRAM) crossbars via a network-on-chip (NoC) for neuromorphic component operation. Concurrently, improved SNN training methods increase accuracy and structural sparsity in networks despite growing problem sizes. Finally, compilers leverage these attributes to minimize area and inter-crossbar communication while mapping large SNNs to sophisticated architectures. However, for compiler-driven co-design to realize increasingly complex and profitable optimizations, a compile-time view of power consumption is critical. We present PowerMappeR to express and optimize over mapping-, architecture-, and device-specific power consumption information. By modeling the dynamic power of well-established components, we develop an integer linear programming (ILP)-based, encoding-agnostic, parametric power estimation model. Using this model, we demonstrate practical improvements in area and inter-crossbar communication by 0%–9.5% and 1.4%–5.1%, respectively. We also limit hotspot formation during optimization, achieving comparable or better results in targeted metrics with up to 96.4%–97.1% restriction of hotspot magnitude. Finally, we introduce profile-guided formulations to reduce worst-case and expected-case hotspot magnitude by 40.7%–69.5% and 40.6%–56.3%, respectively. Optimizing worst-case hotspot magnitude incidentally improves expected-case magnitude by 10.85%–33.45%. Reciprocally, optimizing expected-case magnitude incidentally improves worst-case magnitude by 4.33%–39.87%. Validation against hardware simulators confirms that PowerMappeR can decrease dynamic power consumption by 12.6%–27.3%.

Pohl, Devin [ORNL] (ORCID:0009000040149027)↗
NASA NTRS1986

Communications technology

The technologies for optimized, i.e., state of the art, operation of satellite-based communications systems are surveyed. Features of spaceborne active repeater systems, low-noise signal amplifiers, power amplifiers, and high frequency switches are described. Design features and capabilities of various satellite antenna systems are discussed, including multiple beam, shaped reflector shaped beam, offset reflector multiple beam, and mm-wave and laser antenna systems. Attitude control systems used with the antenna systems are explored, along with multiplexers, filters, and power generation, conditioning and amplification systems. The operational significance and techniques for exploiting channel bandwidth, baseband and modulation technologies are described. Finally, interconnectivity among communications satellites by means of RF and laser links is examined, as are the roles to be played by the Space Station and future large space antenna systems.

Cuccia, C. Louis↗
DOE OSTI2020

A 150-kW 99% Efficient All-Silicon-Carbide Triple-Active-Bridge Converter for Solar-Plus-Storage Systems

Solar-plus-storage systems could effectively mitigate the uncertainties of the photovoltaic (PV) generation and improve system reliability by adding an integrated battery energy storage system. As a three-port bidirectional isolated dc–dc converter with soft-switching capability, the triple-active-bridge (TAB) converter inherently matches the requirements of the solar-plus-storage system. However, challenges still remain in the TAB converter design to further improve system efficiency. In this article, the detailed design, implementation, and demonstration for a silicon carbide (SiC) 150-kW TAB converter are presented. Starting from a brief review of the TAB converter, the modulation scheme, power characteristics, and soft-switching region are analyzed. Then, the detailed design of the H-bridge converter building block is given. Here, to improve the system efficiency, a comprehensive characterization of the SiC gate driver with various external gate resistances is performed to address tradeoffs between switching loss and voltage overshoot during transients, as well as the thermal performance of the H-bridge building block. In addition, the design and characterization of the 20-kHz three-port transformer are also given. Comprehensive experimental studies are conducted on a full-power prototype to verify the proposed design. With a measured 99.1% peak efficiency, the proposed TAB converter can fulfill the requirements for solar-plus-storage applications.

14 SOLAR ENERGY↗
NASA NTRS1987

HSPICE modelling of a solar array circuit controlled by a fet switch

This paper presents a method of modeling a solar array circuit controlled by a hexfet switch on HSPICE. HSPICE models are developed for the solar array current voltage (IV) characteristic and the IRF150 hexfet. Computer simulations are made to verify rate of current change at the load. The equivalent LC circuit for the same current control is modeled to show savings in weight and power in choosing the fet switch over an LC circuit.

Cox, Deanna D.↗