Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Memory device”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 667 records · Page 37
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

Unexpected Giant Microwave Conductivity in a Nominally Silent BiFeO 3 Domain Wall

Nanoelectronic devices based on ferroelectric domain walls (DWs), such as memories, transistors, and rectifiers, have been shown in recent years. Practical high-speed electronics, on the other hand, usually demand operation frequencies in the gigahertz (GHz) regime, where the effect of dipolar oscillation is important. Herein, an unexpected giant GHz conductivity on the order of 10 3 S m -1 is observed in certain BiFeO 3 DWs, which is about 100 000 times greater than the carrier-induced direct current (dc) conductivity of the same walls. Surprisingly, the nominal configuration of the DWs precludes the alternating current (ac) conduction under an excitation electric field perpendicular to the surface. Theoretical analysis reflects that the inclined DWs are stressed asymmetrically near the film surface, whereas the vertical walls in a control sample are not. The resultant imbalanced polarization profile can then couple to the out-of-plane microwave fields and induce power dissipation, which is confirmed by the phase-field modeling. Since the contributions from mobile-carrier conduction and bound-charge oscillation to the ac conductivity are equivalent in a microwave circuit, the research on local structural dynamics may open a new avenue to implement DW nano-devices for radio-frequency applications.

36 MATERIALS SCIENCE↗
NASA NTRS2018

MT29F512G08AUCBBH8-6IT:B NAND Flash Memory Total Ionizing Dose Test Report

The purpose of this test was to characterize the Micron 512 GB NAND (MT29F512G08AUCBBH8-6IT:B) flash memory parameter degradation for total dose response. In the test, the device was exposed to high dose rate (HDR) irradiations using gamma radiation. Device parameters such as leakage currents, quantity of upset bits and overall chip and die health were investigated.

TID↗
NASA NTRS1984

The future scientific CCD

Since the first introduction of charge-coupled devices (CCDs) in 1970, CCDs have been considered for applications related to memories, logic circuits, and the detection of visible radiation. It is pointed out, however, that the mass market orientation of CCD development has left largely untapped the enormous potential of these devices for advanced scientific instrumentation. The present paper has, therefore, the objective to introduce the CCD characteristics to the scientific community, taking into account prospects for further improvement. Attention is given to evaluation criteria, a summary of current CCDs, CCD performance characteristics, absolute calibration tools, quantum efficiency, aspects of charge collection, charge transfer efficiency, read noise, and predictions regarding the characteristics of the next generation of silicon scientific CCD imagers.

Janesick, J. R.↗
DOE OSTI2023

Experimental Characterization of OpenMP Offloading Memory Operations and Unified Shared Memory Support

The OpenMP specification recently introduced support for unified shared memory, allowing implementation to leverage underlying system software to provide a simpler GPU offloading model where explicit mapping of variables is optional. Support for this feature is becoming more available in different OpenMP implementations on several hardware platforms. A deeper understanding of the different implementation’s execution profile and performance is crucial for applications as they consider the performance portability implications of adopting a unified memory offloading programming style. This work introduces a benchmark tool to characterize unified memory support in several OepnMP compilers and runtimes, with emphasis on identifying discrepancies between different OpenMP implementations as to how they various memory allocation strategies interact with unified shared memory. The benchmark tool is used to characterize OpenMP compilers on three leading High Performance Computing platforms supporting different CPU and device architectures. The benchmark tool is used to assess the impact of enabling unified shared memory on the performance of memory-bound code, highlighting implementation differences that should be accounted for when applications consider performance portability across platforms and compilers.

Elwasif, Wael↗
DOE OSTI2024

Variation Tolerant and Energy-Efficient Charge Domain Compute-in-Memory Array with Binary and Multi-Level Cell Ferroelectric FET

Here, in this work, we present a variation-tolerant and energy-efficient charge-domain Ferroelectric FET (FeFET) based Compute-in-Memory (CiM) array design that is compatible with both binary and multi-level cell memory sensing. We demonstrate that: 1) by exploiting FeFET as a nonvolatile switch, its high ON/OFF ratio in the subthreshold region can suppress the error introduced by the inaccurate ON state conductance, thus realizing robust CiM operations, unlike the current-domain CiM design where the computation results is highly sensitive to the device conductance variation; 2) by leveraging a dense dynamic random access memory (DRAM)-like 1FeFET1C cell structure, the proposed design benefits from the existing high density DRAM establishment while also significantly relaxing the capacitor retention and transistor leakage requirement; 3) the charge-domain CiM supports both binary FeFET with minimum overhead and MLC FeFET with tolerable latency for MLC state sensing, whose efficacy is validated experimentally on both cell-level and array-level; 4) the proposed CiM shows much better device variation resilience than conventional current-domain CiM, and also improves inference accuracy. Macro-level evaluation results demonstrate significantly higher energy efficiency and area efficiency compared to prior CiM works.

Duan, Jiahui [University of Notre Dame, IN (United↗
DOE OSTI2023

Room temperature polar and weak-ferromagnetic oxide with low dielectric loss

Single-phase materials that are simultaneously ferroelectric and ferromagnetic at room temperature are promising for devices such as non-volatile random-access memory. Perovskite BiFeO 3 which crystallizes in the polar rhombohedral structure (R3c) is ferroelectric and antiferromagnetic at room temperature. Here, we report a family of perovskite oxides in the BiFeO 3 – Bi 2/3 TiO 3 – ATiO 3 (where A 2+ is divalent alkaline earth metal ions e.g., Ca 2+ , Sr 2+ , Ba 2+ ) ternary phase diagram that is polar as well as weak ferromagnetic above room temperature. The composition (Bi 0.9167 A 0.075 )(Fe 0.9 Ti 0.1 )O 3 crystallizes in the polar rhombohedral structure space group R3c as corroborated by powder X-ray and neutron diffraction analysis. The nearly pure A-site perovskite possesses a long-range magnetic ordering above room temperature. Finally, these perovskites show a low dielectric loss, and the electrical response is dominated by grain contributions below 723 K.

42 ENGINEERING↗
NASA NTRS1976

Serial-to-parallel color-TV converter

Solid analog-to-digital converter eliminates flicker and problems with time base stability and gain variation in sequential color TV cameras. Device includes 3-bit delta modulator; two-field memory; timing, switching, and sync network; and three 3-bit delta demodulators

Doak, T. W.↗
NASA NTRS1976

Microchannel detector array for X-rays and UV

Device employs sensitive photoelectric electrodes and solid-state memory, can be used at visible UV and X ray wavelengths, includes nonmagnetic proximity focusing, and is immune to high energy charged-particle background.

Timothy, J. G.↗
NASA NTRS1980

Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft

Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.

Barry, R. C.↗
NASA NTRS2012

Systems and methods for reconfiguring input devices

A system includes an input device having first and second input members configured to be activated by a user. The input device is configured to generate activation signals associated with activation of the first and second input members, and each of the first and second input members are associated with an input function. A processor is coupled to the input device and configured to receive the activation signals. A memory coupled to the processor, and includes a reconfiguration module configured to store the input functions assigned to the first and second input members and, upon execution of the processor, to reconfigure the input functions assigned to the input members when the first input member is inoperable.

Lancaster, Jeff↗
DOE OSTI2022

Feasibility Study of Millimeter Wave Radars For Safeguards Applications

Containment and surveillance are fundamental measures in nuclear safeguards. Techniques such as video surveillance and laser curtain for containment provide effective monitoring in areas where maintaining continuity of knowledge is required. These systems, however, can be susceptible to loss of monitoring capabilities under certain environmental conditions such as poor visibility (i.e. low light conditions, smoke, fog, etc.) or extended power loss past the duration that the backup power system is designed for. Brookhaven National Laboratory has been investigating the feasibility of millimeter waves (mmWave) as a new perimeter seal in which radio frequency waves in the range of 60-64 GHz are used to detect and monitor objects of interest. Signals in this frequency range are not susceptible to environmental conditions. For proof-of-concept tests, mmWave sensors from Texas Instruments (TI), specificallyIWR6843, are used in a test bed at BNL's Waste Management facility to simulate the operations at nuclear facilities. The unique design of TI mmWave sensors requires less memory and power consumption compared to counterpart systems. These devices are capable of exporting 3D point-cloud data, which is visualized graphically and compared to videos recorded at the same time to validate the performance of the mmWave sensor. A set of experiments were planned to test the feasibility of the mmWave in this application, including monitoring static containers in a storage area and detecting intrusions at the boundaries of the area. In addition, the experiments also identify potential blind spots relative to sensor position and utilize multiple operating sensors simultaneously to reduce or eliminate such blind spots. The optimal positioning of multiple sensors was determined for the experimental room configuration. In this paper, we will discuss the details of this novel perimeter sealing concept and present the test results.

98 NUCLEAR DISARMAMENT, SAFEGUARDS, AND PHYSICAL P↗
NASA NTRS1995

Weaves as an Interconnection Fabric for ASIM's and Nanosatellites

Many of the micromachines under consideration require computer support, indeed, one of the appeals of this technology is the ability to intermix mechanical, optical, analog, and digital devices on the same substrate. The amount of computer power is rarely an issue, the sticking point is the complexity of the software required to make effective use of these devices. Micromachines are the nano-technologist's equivalent of 'golden screws'. In other words, they will be piece parts in larger assemblages. For example, a nano-satellite may be composed of stacked silicon wafers where each wafer contains hundreds to thousands of micromachines, digital controllers, general purpose computers, memories, and high-speed bus interconnects. Comparatively few of these devices will be custom designed, most will be stock parts selected from libraries and catalogs. The novelty will lie in the interconnections. For example, a digital accelerometer may be a component part in an adaptive suspension, a monitoring element embedded in the wrapper of a package, or a portion of the smart skin of a launch vehicle. In each case, this device must inter-operate with other devices and probes for the purposes of command, control, and communication. We propose a software technology called 'weaves' that will permit large collections of micromachines and their attendant computers to freely intercommunicate while preserving modularity, transparency, and flexibility. Weaves are composed of networks of communicating software components. The network, and the components comprising it, may be changed even while the software, and the devices it controls, are executing. This unusual degree of software plasticity permits micromachines to dynamically adapt the software to changing conditions and allows system engineers to rapidly and inexpensively develop special purpose software by assembling stock software components in custom configurations.

Gorlick, Michael M.↗
NASA NTRS1990

Integrating Commercial Off-The-Shelf (COTS) graphics and extended memory packages with CLIPS

This paper addresses the question of how to mix CLIPS with graphics and how to overcome PC's memory limitations by using the extended memory available in the computer. By adding graphics and extended memory capabilities, CLIPS can be converted into a complete and powerful system development tool, on the other most economical and popular computer platform. New models of PCs have amazing processing capabilities and graphic resolutions that cannot be ignored and should be used to the fullest of their resources. CLIPS is a powerful expert system development tool, but it cannot be complete without the support of a graphics package needed to create user interfaces and general purpose graphics, or without enough memory to handle large knowledge bases. Now, a well known limitation on the PC's is the usage of real memory which limits CLIPS to use only 640 Kb of real memory, but now that problem can be solved by developing a version of CLIPS that uses extended memory. The user has access of up to 16 MB of memory on 80286 based computers and, practically, all the available memory (4 GB) on computers that use the 80386 processor. So if we give CLIPS a self-configuring graphics package that will automatically detect the graphics hardware and pointing device present in the computer, and we add the availability of the extended memory that exists in the computer (with no special hardware needed), the user will be able to create more powerful systems at a fraction of the cost and on the most popular, portable, and economic platform available such as the PC platform.

Callegari, Andres C.↗
NASA NTRS2006

CMOS imager for pointing and tracking applications

Systems and techniques to realize pointing and tracking applications with CMOS imaging devices. In general, in one implementation, the technique includes: sampling multiple rows and multiple columns of an active pixel sensor array into a memory array (e.g., an on-chip memory array), and reading out the multiple rows and multiple columns sampled in the memory array to provide image data with reduced motion artifact. Various operation modes may be provided, including TDS, CDS, CQS, a tracking mode to read out multiple windows, and/or a mode employing a sample-first-read-later readout scheme. The tracking mode can take advantage of a diagonal switch array. The diagonal switch array, the active pixel sensor array and the memory array can be integrated onto a single imager chip with a controller. This imager device can be part of a larger imaging system for both space-based applications and terrestrial applications.

Pain, Bedabrata↗
DOE OSTI2022

Charge Transport Characteristics of Molecular Electronic Junctions Studied by Transition Voltage Spectroscopy

The field of molecular electronics is prompted by tremendous opportunities for using a single-molecule and molecular monolayers as active components in integrated circuits. Until now, a wide range of molecular devices exhibiting characteristic functions, such as diodes, transistors, switches, and memory, have been demonstrated. However, a full understanding of the crucial factors that affect charge transport through molecular electronic junctions should yet be accomplished. Remarkably, recent advances in transition voltage spectroscopy (TVS) elucidate that it can provide key quantities for probing the transport characteristics of the junctions, including, for example, the position of the frontier molecular orbital energy relative to the electrode Fermi level and the strength of the molecule–electrode interactions. These parameters are known to be highly associated with charge transport behaviors in molecular systems and can then be used in the design of molecule-based devices with rationally tuned electronic properties. This article highlights the fundamental principle of TVS and then demonstrates its major applications to study the charge transport properties of molecular electronic junctions.

36 MATERIALS SCIENCE↗
NASA NTRS2016

Single Event Testing of SDRAM, DDR2 and DDR3 Memories

SEE test results are presented for SDRAM, DDR2, and DDR3. No tested devices exhibited SEL. SBUs were observed, but no MBUs were observed in data words. SEFI data were taken at low and high speed.

Guertin, Steven M.↗
DOE OSTI2025

Self‐Strain Suppression of the Metal‐to‐Insulator Transition in Phase‐Change Oxide Devices

Strongly correlated materials exhibiting phase transitions which can be controlled through external stimuli, such as electric fields, are promising for future computing technologies beyond conventional semiconductor transistors. Devices that take advantage of structural phase transitions have inherent built‐in memory, reminiscent of synapses and neurons, and are thus natural candidates for neuromorphic computing. Of particular interest are phase‐change oxides, which allow for control over the metal‐to‐insulator transition. Here, X‐ray nano‐diffraction structural imaging of micro‐devices fabricated with the archetypal phase‐change material vanadium sesquioxide (V 2 O 3 ) is reported. The devices contain a Ga ion‐irradiated region where the metal‐to‐insulator transition critical temperature is lowered, a useful feature for controlling neuron‐like spiking behavior. Results show that strain, induced by crystal lattice mismatch between the pristine and irradiated material, leads to a suppression of the metal‐to‐insulator‐transition. Suppression occurs within the irradiated region or along its edges, depending on the defect‐distribution and the size of the region. The observed self‐straining effect can extend to other phase‐change oxides and dominate as device dimensions are reduced and become too small to dissipate strain within the irradiated region. The findings are important for phase engineering in phase‐change devices and highlight the necessity to study phase transitions at the nanoscale.

77 NANOSCIENCE AND NANOTECHNOLOGY↗