Apollo guidance and navigation electronics.
Guidance computer of Apollo guidance and navigation system discussing setup, keyboard console and memory design
COMPUTER DESIGN↗
SEARCH · Engineering Papers
Results for “memory controller”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Performance measurements of the first RAID prototype
The performance is examined of Redundant Arrays of Inexpensive Disks (RAID) the First, a prototype disk array. A hierarchy of bottlenecks was discovered in the system that limit overall performance. The most serious is the memory system contention on the Sun 4/280 host CPU, which limits array bandwidth to 2.3 MBytes/sec. The array performs more successfully on small random operations, achieving nearly 300 I/Os per second before the Sun 4/280 becomes CPU limited. Other bottlenecks in the system are the VME backplane, bandwidth on the disk controller, and overheads associated with the SCSI protocol. All are examined in detail. The main conclusion is that to achieve the potential bandwidth of arrays, more powerful CPU's alone will not suffice. Just as important are adequate host memory bandwidth and support for high bandwidth on disk controllers. Current disk controllers are more often designed to achieve large numbers of small random operations, rather than high bandwidth. Operating systems also need to change to support high bandwidth from disk arrays. In particular, they should transfer data in larger blocks, and should support asynchronous I/O to improve sequential write performance.
Chervenak, Ann L.↗
LSAFE: a Lightweight Static Analysis Framework for binary Executables
Static analysis is a widely used technique for analyzing various aspects of programs. However, as programs become more complex, static analysis tools require larger resources, such as CPU time and memory, to perform the same tasks. Moreover, the source code of programs may not always be accessible, requiring static analysis to be performed on the binary executable code directly. To overcome these challenges, we propose a lightweight static analysis framework called LSAFE, which constructs control flow graphs (CFGs) and data dependency graphs (DDGs) of target programs with optimized performance in terms of CPU and memory usage. We evaluated the proposed framework using both Spec benchmark programs and real-world industrial applications, and found that it outperformed Angr, an existing state-of-the-art static analysis tool. Additionally, we demonstrate a case study that utilizes the CFG generated by LSAFE to detect memory leaks.
Qu, Guangzhi↗
Method and apparatus for providing thermal wear leveling
Exemplary embodiments provide thermal wear spreading among a plurality of thermal die regions in an integrated circuit or among dies by using die region wear-out data that represents a cumulative amount of time each of a number of thermal die regions in one or more dies has spent at a particular temperature level. In one example, die region wear-out data is stored in persistent memory and is accrued over a life of each respective thermal region so that a long term monitoring of temperature levels in the various die regions is used to spread thermal wear among the thermal die regions. In one example, spreading thermal wear is done by controlling task execution such as thread execution among one or more processing cores, dies and/or data access operations for a memory.
Roberts, David A.↗
Method and apparatus for providing thermal wear leveling
Exemplary embodiments provide thermal wear spreading among a plurality of thermal die regions in an integrated circuit or among dies by using die region wear-out data that represents a cumulative amount of time each of a number of thermal die regions in one or more dies has spent at a particular temperature level. In one example, die region wear-out data is stored in persistent memory and is accrued over a life of each respective thermal region so that a long term monitoring of temperature levels in the various die regions is used to spread thermal wear among the thermal die regions. In one example, spreading thermal wear is done by controlling task execution such as thread execution among one or more processing cores, dies and/or data access operations for a memory.
Roberts, David A.↗
Hysteretic Responses of Skyrmion Lattices to Electric Fields in Magnetoelectric Cu 2 OSeO 3
Electric field control of topologically nontrivial magnetic textures, such as skyrmions, provides a paradigm shift for future spintronics beyond current silicon-based technology. While significant progress has been made by X-ray and neutron scattering studies, direct observation of such nanoscale spin structures and their dynamics driven by external electric fields remains a challenge to understand underlying mechanisms and harness functionalities. Here, using Lorentz transmission electron microscopy combined with in situ electric and magnetic fields at liquid helium temperatures, we report the crystallographic-orientation dependent skyrmion responses to electric fields in thin slabs of magnetoelectric Cu 2 OSeO 3 . We show electric fields not only stabilize the hexagonally packed skyrmion lattices in the entire sample in a hysteretic manner but also induce the rotation of their reciprocal vector discretely by 30°. Furthermore, the nonvolatile and energy-efficient skyrmion-lattice control by electric fields demonstrated in this work provides an important foundation for designing skyrmion-based qubits and memory devices.
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
Radiation-hard miniature optical engine with high bandwidth
Future silicon trackers will be operated in an intense radiation environment and require large volumes of data to be transmitted off detector. In addition, the optical modules must be of low mass in order to limit multiple scattering and nuclear interactions that would degrade the overall performance of the detector. Here, we present a miniature optical engine that satisfies these constraints. The optical engine consists of an ASIC driving a VCSEL (Vertical Cavity Surface Emitting Laser) array in an optical package. Two ASICs are designed to operate a 12-channel VCSEL array at 1.28 or 5.12 Gb/s per channel, which yields a total data rate of up to 60 Gb/s. The core transistors are fabricated in a 65 nm CMOS process which enhance the radiation-hardness. Each channel contains equalizer (CTLE) and clock-data recovery circuits (CDR) so that the ASIC can restore the highly distorted electrical signal after propagating through several meters of cables of small diameter. The equalizer, CDR, and VCSEL driver are configured via a digital I 2 C chip interface with triple redundant memory to mitigate single event upset (SEU) effects. The bias and modulation currents are controlled by a digital-to-analog converter (DAC). We present the design of the circuit together with the results of the simulations and preliminary measurements.
47 OTHER INSTRUMENTATION↗
Giant field-like torque by the out-of-plane magnetic spin Hall effect in a topological antiferromagnet
Abstract Spin-orbit torques (SOT) enable efficient electrical control of the magnetic state of ferromagnets, ferrimagnets and antiferromagnets. However, the conventional SOT has severe limitation that only in-plane spins accumulate near the surface, whether interpreted as a spin Hall effect (SHE) or as an Edelstein effect. Such a SOT is not suitable for controlling perpendicular magnetization, which would be more beneficial for realizing low-power-consumption memory devices. Here we report the observation of a giant magnetic-field-like SOT in a topological antiferromagnet Mn 3 Sn, whose direction and size can be tuned by changing the order parameter direction of the antiferromagnet. To understand the magnetic SHE (MSHE)- and the conventional SHE-induced SOTs on an equal footing, we formulate them as interface spin-electric-field responses and analyzed using a macroscopic symmetry analysis and a complementary microscopic quantum kinetic theory. In this framework, the large out-of-plane spin accumulation due to the MSHE has an inter-band origin and is likely to be caused by the large momentum-dependent spin splitting in Mn 3 Sn. Our work demonstrates the unique potential of antiferromagnetic Weyl semimetals in overcoming the limitations of conventional SOTs and in realizing low-power spintronics devices with new functionalities.
72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
Large-scale integration of artificial atoms in hybrid photonic circuits
A central challenge in developing quantum computers and long-range quantum networks is the distribution of entanglement across many individually controllable qubits. Colour centres in diamond have emerged as leading solid-state ‘artificial atom’ qubits because they enable on-demand remote entanglement, coherent control of over ten ancillae qubits with minute-long coherence times and memory-enhanced quantum communication. A critical next step is to integrate large numbers of artificial atoms with photonic architectures to enable large-scale quantum information processing systems. So far, these efforts have been stymied by qubit inhomogeneities, low device yield and complex device requirements. Here we introduce a process for the high-yield heterogeneous integration of ‘quantum microchiplets’—diamond waveguide arrays containing highly coherent colour centres—on a photonic integrated circuit (PIC). We use this process to realize a 128-channel, defect-free array of germanium-vacancy and silicon-vacancy colour centres in an aluminium nitride PIC. Photoluminescence spectroscopy reveals long-term, stable and narrow average optical linewidths of 54 megahertz (146 megahertz) for germanium-vacancy (silicon-vacancy) emitters, close to the lifetime-limited linewidth of 32 megahertz (93 megahertz). We show that inhomogeneities of individual colour centre optical transitions can be compensated in situ by integrated tuning over 50 gigahertz without linewidth degradation. The ability to assemble large numbers of nearly indistinguishable and tunable artificial atoms into phase-stable PICs marks a key step towards multiplexed quantum repeaters and general-purpose quantum processors
36 MATERIALS SCIENCE↗
Magnetic droplet solitons
Magnetic droplet solitons are dynamical magnetic textures that form due to an attractive interaction between spin waves in thin films with perpendicular magnetic anisotropy. Spin currents and the spin torques associated with these currents enable their formation as they provide a means to excite non-equilibrium spin-wave populations and compensate their decay. Recent years have seen rapid advances in experiments that realize and study magnetic droplets. Important advances include the first direct x-ray images of droplets, determination of their threshold and sustaining currents, measurement of their generation and annihilation time, and evidence for drift instabilities, which can limit their lifetime. This perspective discusses these studies and contrasts these solitons to other types of spin-current excitations, such as spin-wave bullets, and static magnetic textures, including magnetic vortices and skyrmions. Magnetic droplet solitons can also serve as current controlled microwave frequency oscillators with potential applications in neuromorphic chips as nonlinear oscillators with memory.
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
Day-Ahead Forecasting with Federated LSTM to Plan Energy Sharing in a Community Microgrid
Energy balancing in microgrids is a key enabler of resilience. Community microgrids located close to each other have the added benefit of networking and sharing surplus energy, if available. Such complex decision-making runs on optimization that requires reliable short-term (up to very-short-term) forecasts of energy generation and consumption for scheduling or trading. Each microgrid may also opt to not expose their sensitive data such as consumption patterns of individual businesses or residences. This paper investigates a federated approach to dayahead forecasting that trains naive long short-term memory (LSTM) at each business in a microgrid and aggregates weights at the microgrid controller using proximal regularization. This approach ensures that the controller has access only to energy surplus/deficit and not the actual generation or consumption values, avoiding unwanted exposure of sensitive data. A community microgrid in Adjuntas, Puerto Rico with 3 businesses is selected as a case study with a laboratory-scale computing setup. A central LSTM forecaster, where sensitive data from businesses are aggregated at the controller, is implemented as a baseline for qualifying the results. This work serves as a proof-of-concept for scaling the approach to networked and nested microgrids with more complex control options.
Sundararajan, Aditya [ORNL] (ORCID:000000033577854↗
Towards Superior Software Portability with SHAD and HPX C++ Libraries
As hardware architectures and software stacks complexity grows, development productivity, performance and software portability, quickly evolve from desirable features to actual needs. SHAD, the Scalable High-performance Algorithms and Data-structures C++ library is designed to mitigate these issues: it provides general purpose building blocks as well as high-level custom utilities, and offers a shared-memory programming abstraction which facilitates the programming of complex systems, scaling up to High Performance Computing clusters. SHAD’s portability is achieved through an abstract runtime interface, which decouples the upper layers of the library and hides the low level details of the underlying architecture. This layer enables SHAD to interface with different runtime/threading systems, e.g. Intel TBB and Global Memory and Threading (GMT). However, current backends targeting distributed systems, rely on a centralized controller which may possibly limit scalability up to hundreds of nodes and creates a network hot spot due to all to one communication for synchronization, and possibly resulting in degraded performance at high process counts. In this research, we explore HPX, the C++ standard library for parallelism and concurrency, as an additional backend in support of the SHAD library, and present the methodologies in support of local and remote task executions in SHAD with respect to HPX. Finally, we evaluate the proposed system by comparing against existing backends of SHAD and analyzing their performance on C++ Standard Template Library algorithms.
Wu, Nanmiao↗
CRADA Final Report: Open Microgrid Platform
Current microgrid control technology is mostly proprietary, expensive, and inflexible. An open-source, vendor-neutral, publish-subscribe controller will significantly lower the barrier to entry for new technologies and market entrants: inverter, battery, and load control manufacturers; cloud and services providers; and energy aggregators. An OpenFMB controller can significantly reduce the acquisition, integration, and ongoing operating and maintenance costs and increase revenue opportunities for energy producers and consumers. It allows distributed energy resource (DER) owners to replace individual DER components as richer-function, lower-cost devices become available or to incorporate new forecast and optimization algorithms as they are developed. A standard, secure, full-function DER field controller will also provide a low-cost means for grid operators to effectively manage the variability and uncertainty of solar photovoltaics (PV). Under the terms of this CRADA, ORNL has worked with Open Energy Solutions (OES) to advance the transition of ORNL’s existing open-source microgrid controller into a platform geared toward mainstream implementation. Using a more prevalent and memory-safe programming language, Rust, OES has converted ORNL’s current generation on-grid optimization into an application more suitable for industry use. The results of the ported optimization were analyzed by inputting the same arguments in both the current-generation and next-generation optimizers and verifying that the results were equivalent.
24 POWER TRANSMISSION AND DISTRIBUTION↗
“Smarter” NICs for faster algorithms [Slides]
The basic building block of a distributed-memory cluster or supercomputer is a node. Each node includes a host, which is a processor (xPU) + memory hierarchy. The host can communicate with other hosts via its NIC (network interface controller). A network connects the nodes. The nodes may be arranged in some topology, which determines the network’s carrying capacity and cost.
97 MATHEMATICS AND COMPUTING↗
The automation of the stellar proper motion survey
A microdensitometer, scanning pairs of star plates of identical areas of the sky taken a decade apart, is coupled to a magnetic tape unit through a data acquisition system. This system performs an image density threshold level selection for each plate and a buffer memory system to smooth the data flow as well as analog and digital display controls. The data from the tape are processed later by a large scale high speed computer which reconstructs the scanned images, discovers, measures, and documents stellar proper motions by precise comparison of corresponding areas of the two star plates to detect those images which have moved at least 0.10 seconds annually in the time interval between the exposures.
Newcomb, J. S.↗
Automatically Reconfigurable Computer
Modular system changes its architecture to maximize either reliability or capacity. Reconfigurable computer is assembled from four kinds of modules: organizer/scheduler, memory, input/output processor, and central processor. Reconfiguration is initiated by a signal from a control panel or by fault interrupt from one of the modules.
Source record↗
Application of microprocessors in an upper atmosphere instrument package
A servo-driven magnetometer table measuring offset from magnetic north has been developed by NASA to calculate payload azimuth required to point at a celestial target. Used as an aid to the study of gamma-ray phenomena, the high-altitude balloon-borne instrument determines a geocentric reference system, and calculates a set of pointing directions with respect to the system. Principal components include the magnetometer, stepping motor, microcomputer, and gray code shaft encoder. The single-chip microcomputer is used to control the orientation of the system, and consists of a central processing unit, program memory, data memory and input/output ports. Principal advantages include a low power requirement, consuming 6 watts, as compared to 30 watts consumed by the previous system.
Lim, T. S.↗
Photocurrent Imaging Detects Solar-Module Defects
Raster-scanned laser beam excites photocurrents in thin-film amorphous silicon devices. Solar-cell laser scanner uses two galvanometer-driven mirrors to scan laser-beam spot over surface of module or cell under test. Position signals from scan controllers used to index storage of photocurrent signal data in scan-converter image memory. Stored image displayed on television monitor.
Kim, Q.↗