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At least 631 records · Page 35

Navigator GPS Receiver for Fast Acquisition and Weak Signal Space Applications

NASA Goddard Space Flight Center (GSFC) is developing a new space-borne GPS receiver that can operate effectively in the full range of Earth orbiting missions from Low Earth Orbit (LEO) to geostationary and beyond. Navigator is designed to be a fully space flight qualified GPS receiver optimized for fast signal acquisition and weak signal tracking. The fast acquisition capabilities provide exceptional time to first fix performance (TIFF) with no a priori receiver state or GPS almanac information, even in the presence of high Doppler shifts present in LEO (or near perigee in highly eccentric orbits). The fast acquisition capability also makes it feasible to implement extended correlation intervals and therefore significantly reduce Navigator s acquisition threshold. This greatly improves GPS observability when the receiver is above the GPS constellation (and satellites must be tracked from the opposite side of the Earth) by providing at least 10 dB of increased acquisition sensitivity. Fast acquisition and weak signal tracking algorithms have been implemented and validated on a hardware development board. A fully functional version of the receiver, employing most of the flight parts, with integrated navigation software is expected by mid 2005. An ultimate goal of this project is to license the Navigator design to an industry partner who will then market the receiver as a commercial product.

Winternitz, Luke↗

Evolving circuits in seconds: experiments with a stand-alone board-level evolvable system

The purpose of this paper is twofold: first, to illustrate a stand-alone board-level evolvable system (SABLES) and its performance, and second to illustrate some problems that occur during evolution with real hardware in the loop, or when the intention of the user is not completely reflected in the fitness function.

evolvable hardware FPTA DSP evolutionary algorithm↗

Experiments on the evolution of digital to analog converters

Currently, there is a research effort in Evolvable Hardware being driven towards two purposes: the synthesis of circuits of medium to high complexity; and the design of reconfigurable architectures that facilitate the system evolvability and on-chip implementation of the evolved circuits. This work addresses these issues by describing the evolution of Digital to Analog Converters (DACs).

DACs evolvable hardware hierarchical evolution gen↗

Guidance and Control System for a Satellite Constellation

A distributed guidance and control algorithm was developed for a constellation of satellites. The system repositions satellites as required, regulates satellites to desired orbits, and prevents collisions. 1. Optimal methods are used to compute nominal transfers from orbit to orbit. 2. Satellites are regulated to maintain the desired orbits once the transfers are complete. 3. A simulator is used to predict potential collisions or near-misses. 4. Each satellite computes perturbations to its controls so as to increase any unacceptable distances of nearest approach to other objects. a. The avoidance problem is recast in a distributed and locally-linear form to arrive at a tractable solution. b. Plant matrix values are approximated via simulation at each time step. c. The Linear Quadratic Gaussian (LQG) method is used to compute perturbations to the controls that will result in increased miss distances. 5. Once all danger is passed, the satellites return to their original orbits, all the while avoiding each other as above. 6. The delta-Vs are reasonable. The controller begins maneuvers as soon as practical to minimize delta-V. 7. Despite the inclusion of trajectory simulations within the control loop, the algorithm is sufficiently fast for available satellite computer hardware. 8. The required measurement accuracies are within the capabilities of modern inertial measurement devices and modern positioning devices.

Bryson, Jonathan Lamar↗

Multi-Axis Independent Electromechanical Load Control for Docking System Actuation Development and Verification Using dSPACE

The development of highly complex and advanced actuation systems to meet customer demands has accelerated as the use of real-time testing technology expands into multiple markets at Moog. Systems developed for the autonomous docking of human rated spacecraft to the International Space Station (ISS), envelope multi-operational characteristics which place unique constraints on an actuation system. Real-time testing hardware has been used as a platform for incremental testing and development for the linear actuation system which controls initial capture and docking for vehicles visiting the ISS. This presentation will outline the role of dSPACE hardware as a platform for rapid control-algorithm prototyping as well as an Electromechanical Actuator (EMA) system dynamic loading simulator, both conducted at Moog to develop the safety critical Linear Actuator System (LAS) of the NASA Docking System (NDS).

Oesch, Christopher↗

SLS Navigation Model-Based Design Approach

The SLS Program chose to implement a Model-based Design and Model-based Requirements approach for managing component design information and system requirements. This approach differs from previous large-scale design efforts at Marshall Space Flight Center where design documentation alone conveyed information required for vehicle design and analysis and where extensive requirements sets were used to scope and constrain the design. The SLS Navigation Team has been responsible for the Program-controlled Design Math Models (DMMs) which describe and represent the performance of the Inertial Navigation System (INS) and the Rate Gyro Assemblies (RGAs) used by Guidance, Navigation, and Controls (GN&C). The SLS Navigation Team is also responsible for the navigation algorithms. The navigation algorithms are delivered for implementation on the flight hardware as a DMM. For the SLS Block 1-B design, the additional GPS Receiver hardware is managed as a DMM at the vehicle design level. This paper provides a discussion of the processes and methods used to engineer, design, and coordinate engineering trades and performance assessments using SLS practices as applied to the GN&C system, with a particular focus on the Navigation components. These include composing system requirements, requirements verification, model development, model verification and validation, and modeling and analysis approaches. The Model-based Design and Requirements approach does not reduce the effort associated with the design process versus previous processes used at Marshall Space Flight Center. Instead, the approach takes advantage of overlap between the requirements development and management process, and the design and analysis process by efficiently combining the control (i.e. the requirement) and the design mechanisms. The design mechanism is the representation of the component behavior and performance in design and analysis tools. The focus in the early design process shifts from the development and management of design requirements to the development of usable models, model requirements, and model verification and validation efforts. The models themselves are represented in C/C++ code and accompanying data files. Under the idealized process, potential ambiguity in specification is reduced because the model must be implementable versus a requirement which is not necessarily subject to this constraint. Further, the models are shown to emulate the hardware during validation. For models developed by the Navigation Team, a common interface/standalone environment was developed. The common environment allows for easy implementation in design and analysis tools. Mechanisms such as unit test cases ensure implementation as the developer intended. The model verification and validation process provides a very high level of component design insight. The origin and implementation of the SLS variant of Model-based Design is described from the perspective of the SLS Navigation Team. The format of the models and the requirements are described. The Model-based Design approach has many benefits but is not without potential complications. Key lessons learned associated with the implementation of the Model Based Design approach and process from infancy to verification and certification are discussed

Oliver, T. Emerson↗

SLS Model Based Design: A Navigation Perspective

The SLS Program has implemented a Model-based Design (MBD) and Model-based Requirements approach for managing component design information and system requirements. This approach differs from previous large-scale design efforts at Marshall Space Flight Center where design documentation alone conveyed information required for vehicle design and analysis and where extensive requirements sets were used to scope and constrain the design. The SLS Navigation Team is responsible for the Program-controlled Design Math Models (DMMs) which describe and represent the performance of the Inertial Navigation System (INS) and the Rate Gyro Assemblies (RGAs) used by Guidance, Navigation, and Controls (GN&C). The SLS Navigation Team is also responsible for navigation algorithms. The navigation algorithms are delivered for implementation on the flight hardware as a DMM. For the SLS Block 1B design, the additional GPS Receiver hardware model is managed as a DMM at the vehicle design level. This paper describes the models, and discusses the processes and methods used to engineer, design, and coordinate engineering trades and performance assessments using SLS practices as applied to the GN&C system, with a particular focus on the navigation components.

Oliver, T. Emerson↗

Biomimetic Fly Eye Sensor for Real-Time Target Tracking

The project objective is to design, build, and demonstrate a biomimetic (inspired by biology) smart sensor based on the common house fly eye for real-time target tracking in three dimensions (3-D). The sensor makes use of revolutionary optical sensor design resulting in significantly improved motion detection capabilities when compared with conventional optical sensors. The design is motivated by the parallel nature of the flys vision system and its demonstrated hyperacuity or precision of visual localization beyond the conventional resolution limit. This means that the sensor is able to accurately detect very fast motion and small changes in motion. The analog architecture of the sensor allows for real-time solution at adjustable bandwidths depending on the application. The low cost, exceptionally lightweight, small form factor, low power requirements, and low computation requirements of the sensor make it ideally suited to many aeronautics applications that have limitations on weight, power, and processing time. The sensor is modular and can be easily adapted in scale and manufactured for a wide variety of sensing applications. Advanced target tracking algorithms will be developed to allow the sensor to track a target in 3-D. These algorithms will be implemented in the smart sensors hardware to enable real-time target tracking.

wing position measurement system↗

An Evolvable Multi-Agent Approach to Space Operations Engineering

A complex system of spacecraft and ground tracking stations, as well as a constellation of satellites or spacecraft, has to be able to reliably withstand sudden environment changes, resource fluctuations, dynamic resource configuration, limited communication bandwidth, etc., while maintaining the consistency of the system as a whole.

Intelligent↗

Real-Time Optimization and Control of Next-Generation Distribution Infrastructure

This presentation highlights the key developments of the ARAP-e NODES project, including the innovative real-time optimal power flow (RT-OPF) algorithm for distributed energy resource (DER) management, trip planning for T+D coordination, and extensive validation of the RT-OPF algorithm in NREL ESIF laboratory with 100+ physical hardware devices, controller-hardware-in-the-loop test at Southern California Edison (SCE), and two field demonstrations.

hardware-in-the-loop↗

Neural network accelerator for quantum control

Efficient quantum control is necessary for practical quantum computing implementations with current technologies. Conventional algorithms for determining optimal control parameters are computationally expensive, largely excluding them from use outside of the simulation. Existing hardware solutions structured as lookup tables are imprecise and costly. By designing a machine learning model to approximate the results of traditional tools, a more efficient method can be produced. Such a model can then be synthesized into a hardware accelerator for use in quantum systems. In this study, we demonstrate a machine learning algorithm for predicting optimal pulse parameters. This algorithm is lightweight enough to fit on a low-resource FPGA and perform inference with a latency of 175 ns and pipeline interval of 5 ns with > 0.99 gate fidelity. In the long term, such an accelerator could be used near quantum computing hardware where traditional computers cannot operate, enabling quantum control at a reasonable cost at low latencies without incurring large data bandwidths outside of the cryogenic environment.

43 PARTICLE ACCELERATORS↗

Long decoding runs for Galileo's convolutional codes

Decoding results are described for long decoding runs of Galileo's convolutional codes. A 1 k-bit/sec hardware Viterbi decoder is used for the (15, 1/4) convolutional code, and a software Viterbi decoder is used for the (7, 1/2) convolutional code. The output data of these long runs are stored in data files using a data compression format which can reduce file size by a factor of 100 to 1 typically. These data files can be used to replicate the long, time-consuming runs exactly and are useful to anyone who wants to analyze the burst statistics of the Viterbi decoders. The 1 k-bit/sec hardware Viterbi decoder was developed in order to demonstrate the correctness of certain algorithmic concepts for decoding Galileo's experimental (15, 1/4) code, and for the long-constraint-length codes in general. The hardware decoder can be used both to search for good codes and to measure accurately the performance of known codes.

Lahmeyer, C. R.↗

The Other Artificial Intelligence Hardware Problem

The consolidation of leading-edge semiconductor manufacturing in one company in one country poses two problems: a short-term strategic risk and a long-term innovation risk. Furthermore, both problems remain underexplored because advances in artificial intelligence (AI) algorithms have compensated for a relative lack of advances in AI hardware.

97 MATHEMATICS AND COMPUTING↗

OpenMP Target Task: Tasking and Target Offloading on Heterogeneous Systems

This work evaluated the use of OpenMP tasking with target GPU offloading as a potential solution for programming productivity and performance on heterogeneous systems. Also, it is proposed a new OpenMP specification to make the implementation of heterogeneous codes simpler by using OpenMP target task, which integrates both OpenMP tasking and target GPU offloading in a single OpenMP pragma. As a test case, the authors used one of the most popular and widely used Basic Linear Algebra Subprogram Level-3 routines: triangular solver (TRSM). To benefit from the heterogeneity of the current high-performance computing systems, the authors propose a different parallelization of the algorithm by using a nonuniform decomposition of the problem. This work used target GPU offloading inside OpenMP tasks to address the heterogeneity found in the hardware. This new approach can outperform the state-of-the-art algorithms, which use a uniform decomposition of the data, on both the CPU-only and hybrid CPU-GPU systems, reaching speedups of up to one order of magnitude. The performance that this approach achieves is faster than the IBM ESSL math library on CPU and competitive relative to a highly optimized heterogeneous CUDA version. One node of Oak Ridge National Laboratory’s supercomputer, Summit, was used for performance analysis.

Valero Lara, Pedro↗

Practical Scalability of LuGo: Benchmarking the HHL Algorithm Using an Enhanced QPE Algorithm

The HHL algorithm is a prominent quantum algorithm that offers exponential speedup over its classical counterparts for solving a system of linear equations. However, synthesizing and executing HHL circuits demand significant computational resources from both classical and quantum systems. In this paper, we benchmark the HHL algorithm using the optimized Quantum Phase Estimation (QPE) generation algorithm, LuGo \cite{lu2025lugo}, to enhance its scalability and efficiency. We leverage the National Energy Research Scientific Computing Center's (NERSC) Perlmutter supercomputer to evaluate the scalability of generating HHL circuits and to measure the time to simulate the generated circuits. Additionally, we provide a comprehensive analysis of the algorithm's performance on various state-of-the-art superconducting and trapped-ion quantum devices, including studies on qubit connectivity, fidelity comparisons, and hardware compatibility and robustness. Our results offer preliminary insights into potential practical applications of the HHL algorithm enabled by LuGo and the performance of various types of quantum hardware.

Lu, Chao [ORNL] (ORCID:0000000179346933)↗

Dendritic Computing with Multigate Ferroelectric Field-Effect Transistors

Although inspired by neuronal systems in the brain, artificial neural networks generally employ point-neurons, which offer computational complexity far less than that of their biological counterparts. Neurons have dendritic arbors that connect to different sets of synapses and offer local nonlinear accumulation – playing a pivotal role in processing and learning. Inspired by this, we propose a novel neuron design based on a multigate ferroelectric field-effect transistor that mimics dendrites. It leverages ferroelectric nonlinearity for local computations within dendritic branches while utilizing the transistor action to generate the neuronal output. The branched architecture enables smaller crossbar arrays in hardware integration, improving efficiency. Using an experimentally calibrated device-circuit-algorithm cosimulation framework, we demonstrate that networks incorporating our dendritic neurons achieve superior performance compared to much larger networks without dendrites (∼ 17× fewer trainable weight parameters). These findings suggest that dendritic hardware can significantly improve computational efficiency and learning capacity of neuromorphic systems optimized for edge applications.

36 MATERIALS SCIENCE↗

Using Reinforcement Learning to Optimize Quantum Circuits in thePresence of Noise

Many quantum computing frameworks currently use noise aware algorithms for implementing quantum circuits which do not scale efficiently as the size of the hardware architecture increases. As we move towards devices which utilize more qubits, it becomes increasing more important to map quantum circuits in a way that uses resources efficiently as well as maximizes the reliability of the results of that circuit. However, as the hardware increases to the point where Quantum supremacy is attainable, it will infeasible for a brute-force algorithm to find the most optimal circuit layout for circuits of medium to large depth sizes. To this end, we will to rely on reinforcement learning (RL) as a method of building quantum circuits based on observations of the noise characteristics in its environment. In this work, we create a working reinforcement learning environment in which an agent is able to make action which will build the class of circuits which creates the GHZ state. In addition to this, we also get preliminary results of the performance of a Deep Q Neural Network, which initially does not perform as well as we believe it can. In the future, we want to improve the performance of the agent and potentially generalize this environment to more classes of circuits.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Noise analysis for the Sorkin and Peres tests performed on a quantum computer

We use quantum computers to test the foundations of quantum mechanics through quantum algorithms that implement some of the experimental tests as the basis of the theory's postulates. These algorithms can be used as a test of the physical theory under the premise of a perfect hardware or as a test of the hardware under the premise that quantum theory is correct. In this paper, we show how the algorithms can be used to test the efficacy of a quantum computer in obeying the postulates of quantum mechanics. We study the effect of different types of errors on the results of experimental tests of the postulates. A salient feature of this error analysis is that it is deeply rooted in the fundamentals of quantum mechanics as it highlights how systematic errors affect the quantumness of the quantum computer.

Sadana, Simanraj↗