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At least 631 records · Page 35
All sourcesNASA NTRSDOE OSTI
NASA NTRS1996

Planet-B: Technical notes and drawings

The design of the transformer designated as T101 (061-0351) in the Filament/Bias module (061-0119) in the Planet-B NMS instrument was verified because of the differences from the GCMS and INMS instrument designs. A breadboard of a representation of the Hybrid 2301065, Bias Drive A driving a 2N3700 NPN transistor, with dual 75V secondaries, with loads, was used to test the circuit. The initial transformer design that was wound with bifilar secondaries was too unstable to test. The second 1408 transformer with a split bobbin and the feedback winding below the primary was also found to be unstable. (It was nearly impossible to keep the circuit from squeeging). The third transformer tested has the feedback on the outside of the resonant winding. The primary goal of the design was to have as tight a magnetic coupling as possible to the resonant winding, and as loose a coupling as possible to the primary. Further, the circuit AC ground is connected to the winding at the feedback end of the secondary winding. This transformer proved to be very stable - it is virtually impossible to make this design squeg. An emitter resistor (Rl29A) was added to this circuit, as referenced to the GCMS design, to protect Q102 from thermal runaway in the event of a turn on with a non- resonate circuit or load short. This was verified to protect Q102 for at least 30 seconds in the event of a short. Approximately 1% of the 4lmW input power is lost in this protection resistor under normal operation. The circuit was verified to operate normally when a radiated Q102 (2N3700), (low Beta) transistor was substituted for the normal 2N3700. It should be noted that the monitored drive voltage went to approximately 2.7V with this low gain transistor.

Carignan, George R.↗
NASA NTRS1973

Low phase noise digital frequency divider

A low phase noise frequency divider composed of a grating arrangement is disclosed. The grating arrangement supplies selected portions of an input reference signal to be divided to a tuned circuit without any phase noise due to the grating action. The arrangement which in one embodiment consists of an FET is connected to the tuned circuit input to short out the input except when the input reference signal amplitude crosses ground level in a positive direction and a gate enabling signal is present at the gate electrode of the FET. The gate enabling signal alone does not decouple the tuned circuit input from ground, therefore phase noise, due to the leading and trailing edges of each gate-enabling signal, is substantially eliminated.

Lutes, G. F., Jr.↗
NASA NTRS1989

Inductively-Activated Short-Interval Timer

Timing circuit in pneumatically launched projectile triggers explosive charge in projectile at specified delay after launch. Both power and control signals coupled inductively to timer from stationary launcher circuitry. Eliminates need for direct electrical contacts, which are unreliable and generate sparks that trigger explosive accidentally. Inductive coupling also provides higher reliability in field operation than contacts. Concept useful in such other safety-related applications as remotely or automatically controlling flow of bottled flammable gas.

Wiker, Gordon A.↗
NASA NTRS1984

A comparison of IMPATT oscillator power and frequency above 100 GHz with results derived from theoretical models

This investigation is concerned with a comparison of measured 117-GHz IMPATT oscillator frequency and output power with results derived from theoretical circuit models. It is pointed out that previous millimeter-wave oscillator models are unsuitable for studying circuit behavior, such as oscillator tuning as a function of waveguide short position or other circuit parameters. In the current study, oscillator circuit modeling techniques, successfully applied at X-band, are applied for the first time to a millimeter-wave IMPATT oscillator circuit. Attention is given to an oscillator circuit description, an IMPATT diode circuit model, a circuit model, and an oscillator analysis.

Bates, B. D.↗
NASA NTRS1978

Some failure modes and analysis techniques for terrestrial solar cell modules

Analysis data are presented on failed/defective silicon solar cell modules of various types and produced by different manufacturers. The failure mode (e.g., internal short and open circuits, output power degradation, isolation resistance degradation, etc.) are discussed in detail and in many cases related to the type of technology used in the manufacture of the modules; wherever applicable, appropriate corrective actions are recommended. Consideration is also given to some failure analysis techniques that are applicable to such modules, including X-ray radiography, capacitance measurement, cell shunt resistance measurement by the shadowing technique, steady-state illumination test station for module performance illumination, laser scanning techniques, and the SEM.

Shumka, A.↗
NASA NTRS1984

Hot-spot investigations of utility scale panel configurations

The causes of array faults and efforts to mitigate their effects are examined. Research is concentrated on the panel for the 900 kw second phase of the Sacramento Municipal Utility District (SMUD) project. The panel is designed for hot spot tolerance without comprising efficiency under normal operating conditions. Series/paralleling internal to each module improves tolerance in the power quadrant to cell short or open circuits. Analtyical methods are developed for predicting worst case shade patterns and calculating the resultant cell temperature. Experiments conducted on a prototype panel support the analytical calculations.

Arnett, J. C.↗
NASA NTRS1990

Estimation of minority carrier diffusion lengths in InP/GaAs solar cells

Minority carrier diffusion length is one of the most important parameters affecting the solar cell performance. An attempt is made to estimate the minority carrier diffusion lengths is the emitter and base of InP/GaAs heteroepitaxial solar cells. The PC-1D computer model was used to simulate the experimental cell results measured at NASA Lewis under AMO (air mass zero) spectrum at 25 C. A 16 nm hole diffusion length in the emitter and a 0.42 micron electron diffusion length in the base gave very good agreement with the I-V curve. The effect of varying minority carrier diffusion lengths on cell short current, open circuit voltage, and efficiency was studied. It is also observed that the front surface recombination velocity has very little influence on the cell performance. The poor output of heteroepitaxial cells is caused primarily by the large number of dislocations generated at the interfaces that propagate through the bulk indium phosphide layers. Cell efficiency as a function of dislocation density was calculated and the effect of improved emitter bulk properties on cell efficiency is presented. It is found that cells with over 16 percent efficiencies should be possible, provided the dislocation density is below 10(exp 6)/sq cm.

Jain, R. K.↗
NASA NTRS1992

Slot antenna SIS mixers for submillimeter wavelengths

We are developing improved versions of a slot antenna SIS mixer which we have previously described. The initial work demonstrated a double sideband noise temperature of 420 K for a 500 GHz quasi-optical SIS mixer employing a twin-slot antenna on a quartz dielectric substrate. A quartz hyperhemispherical lens is used to focus the incoming radiation onto the twin-slot antenna. The advantages of a twin-slot antenna include a low impedance (35 omega) and a clean, symmetric beam pattern into the dielectric with a 70 percent efficiency. In our original mixer, the radiation was coupled from the two slot antennas onto superconducting microstrip lines which fed the SIS junction. By performing an impedance transformation using tapered lines and by feeding the radiation from the two slots to the junction in parallel, the effective (real) impedance seen by the junction was reduced to just 4 omega. This very low impedance allowed a junction area of 2.3 sq micron to be used at 500 GHz, which was manufactured using optical lithography. However, no attempt was made to tune out the junction capacitance. We estimate that this capacitance reduces the impedance coupling efficiency to eta(sub Z) approx. equals 0.23, for our junction with omega R(sub N) C = 5.3 at 500 GHz. The recent development of techniques using electron-beam lithography to manufacture junctions with very small areas (approx. equals 0.1 sq microns) now allows considerably more flexibility in the design of SIS mixer circuits. We have redesigned the slot-antenna mixer to take advantage of this possibility. In particular, we have included a novel circuit which allows the junction capacitance to be tune out over a broad bandwidth. For instance, mixers designed for 800 GHz using NbN/MgO/NbN junctions with realistic parameters achieve a 3 dB impedance bandwidth of nearly 400 GHz. Furthermore, our circuit uses only short lengths of microstrip and should be less sensitive to RF losses than other designs. The improved impedance match should give a large reduction in noise temperature as compared to our previous mixer. The new devices are currently under fabrication. Further details of the design and any available experimental results are discussed.

Zmuidzinas, Jonas↗
NASA NTRS2004

Improved Method of Locating Defects in Wiring Insulation

An improved method of locating small breaches in insulation on electrical wires combines aspects of the prior dielectric withstand voltage (DWV) and time-domain reflectometry (TDR) methods. The method was invented to satisfy a need for reliably and quickly locating insulation defects in spacecraft, aircraft, ships, and other complex systems that contain large amounts of wiring, much of it enclosed in structures that make it difficult to inspect. In the DWV method, one applies a predetermined potential (usually 1.5 kV DC) to the wiring and notes whether the voltage causes any arcing between the wiring and ground. The DWV method does not provide an indication of the location of the defect (unless, in an exceptional case, the arc happens to be visible). In addition, if there is no electrically conductive component at ground potential within about 0.010 in. (approximately equal to 0.254 mm) of the wire at the location of an insulation defect, then the DWV method does not provide an indication of the defect. Moreover, one does not have the option to raise the potential in an effort to increase the detectability of such a defect because doing so can harm previously undamaged insulation. In the TDR method as practiced heretofore, one applies a pulse of electricity having an amplitude of less than 25 V to a wire and measures the round-trip travel time for the reflection of the pulse from a defect. The distance along the wire from the point of application of the pulse to the defect is then calculated as the product of half the round-trip travel time and the characteristic speed of a propagation of an electromagnetic signal in the wire. While the TDR method as practiced heretofore can be used to locate a short or open circuit, it does not ordinarily enable one to locate a small breach in insulation because the pulse voltage is too low to cause arcing and thus too low to induce an impedance discontinuity large enough to generate a measurable reflection. The present improved method overcomes the weaknesses of both the prior DWV and the prior TDR method.

Greulich, Owen R.↗
NASA NTRS1984

Process Research on Polycrystalline Silicon Material (PROPSM)

Results of hydrogen-passivated polycrystalline silicon solar cells are summarized. Very small grain or short minority-carrier diffusion length silicon was used. Hydrogenated solar cells fabricated from this material appear to have effective minority-carrier diffusion lengths that are still not very long, as shown by the open-circuit voltages of passivated cells that are still significantly less than those of single-crystal solar cells. The short-circuit current of solar cells fabricated from large-grain cast polycrystalline silicon is nearly equivalent to that of single-crystal cells, which indicates long bulk minority-carrier diffusion length. However, the open-circuit voltage, which is sensitive to grain boundary recombination, is sometimes 20 to 40 mV less. The goal was to minimize variations in open-circuit voltage and fill-factor caused by defects by passivating these defects using a hydrogenation process. Treatments with molecular hydrogen showed no effect on large-grain cast polycrystaline silicon solar cells.

Culik, J. S.↗
NASA NTRS1985

Protective Cover for IC Packages

Aluminized plastic protects integrated circuits from static discharge. Snap-on cover shorts leads of integrated-circuit flatpack to prevent damage from electrostatic discharges during transport, installation, or other handling before final testing. Cover removed only during lead bending and testing.

Borden, T. J.↗
NASA NTRS2004

Options Studied for Managing Space Station Solar Array Electrical Hazards for Sequential Shunt Unit Replacement

The U.S. solar array strings on the International Space Station are connected to a sequential shunt unit (SSU). The job of the SSU is to shunt, or short, the excess current from the solar array, such that just enough current is provided downstream to maintain the 160-V bus voltage while meeting the power load demand and recharging the batteries. Should an SSU fail on-orbit, it would be removed and replaced with the on-orbit spare during an astronaut space walk or extravehicular activity (EVA) (see the photograph). However, removing an SSU during an orbit Sun period with input solar array power connectors fully energized could result in substantial hardware damage and/or safety risk to the EVA astronaut. The open-circuit voltage of cold solar-array strings can exceed 320 V, and warm solar-array strings could feed a short circuit with a total current level exceeding 240 A.

Delleur, Ann M.↗
NASA NTRS2007

Multiloop Rapid-Rise/Rapid Fall High-Voltage Power Supply

A proposed multiloop power supply would generate a potential as high as 1.25 kV with rise and fall times <100 s. This power supply would, moreover, be programmable to generate output potentials from 20 to 1,250 V and would be capable of supplying a current of at least 300 A at 1,250 V. This power supply is intended to be a means of electronic shuttering of a microchannel plate that would be used to intensify the output of a charge-coupled-device imager to obtain exposure times as short as 1 ms. The basic design of this power supply could also be adapted to other applications in which high voltages and high slew rates are needed. At the time of reporting the information for this article, there was no commercially available power supply capable of satisfying the stated combination of voltage, rise-time, and fall-time requirements. The power supply would include a preregulator that would be used to program a voltage 1/30 of the desired output voltage. By means of a circuit that would include a pulse-width modulator (PWM), two voltage doublers, and a transformer having two primary and two secondary windings, the preregulator output voltage would be amplified by a factor of 30. A resistor would limit the current by controlling a drive voltage applied to field-effect transistors (FETs) during turn-on of the PWM. Two feedback loops would be used to regulate the high output voltage. A pulse transformer would be used to turn on four FETs to short-circuit output capacitors when the outputs of the PWM were disabled. Application of a 0-to-5-V square to a PWM shut-down pin would cause a 20-to-1,250-V square wave to appear at the output.

Bearden, Douglas↗
NASA NTRS1991

Sliding backshorts for planar circuits

An adjustable planar imbedding circuit based on coplanar transmission lines is presented to deal with the impedance mismatch associated with the use of the Superconductor-Insulator-Superconductor tunnel junction. The planar embedding circuit is developed with movable noncontacting shorting elements that consist of thin metallic plates with optimized arrangements of rectangular holes. The rectangular holes are placed along the insulated metallic transmission line to provide a periodic variation of the line impedance. A large reflection coefficient is demonstrated with a scale model of the sliding backshort, and values of more than -0.5 dB are reported. The shorting elements are incorporated into a low-frequency tuning circuit to test the practical tuning ranges. The backshort can be used to fashion tuning stubs with variable post-fabrication electrical lengths which relaxes the design constraints of planar integrated circuits.

Lubecke, Victor M.↗
NASA NTRS1969

Bias circuit oscillations in Gunn devices.

Bias circuit LF oscillations in short Gunn devices, analyzing sinusoidal and relaxation oscillations and stable bias in terms of terminal I-V characteristics

Rosenbaum, F. J.↗
NASA NTRS1972

Evaluation program for secondary spacecraft cells: Acceptance test of Eagle-Picher 100 ampere-hour nickel-cadmium cells with auxiliary electrodes

Tests were conducted on a group of 29 cells for the purpose of removing from the life cycle program all cells found to have electrolyte leakage, internal shorts, low capacity, or inability to recover open circuit voltage above 1.150 volts after the cell short test. The test findings include the following: (1) All the cells exceeded the rated capacity of 103.5 to 119.0 ampere-hours on all three capacity checks. (2) All cells recovered above the 1.150 volt requirement after the cell short test. (3) The cells cannot be overcharged at the c/10 rate without exceeding 1.500 volts after approximately 12 to 13 hours of charge. (4) The resistance value necessary to provide maximum signal power across the auxiliary electrode was found to be 10 ohms. (5) One cell revealed a definite leak at the negative terminal.

Christy, D. E.↗